Abstract: The semiconductor substrate includes a high-ohmic semiconductor material with a conduction band edge and a valence band edge, separated by a bandgap, wherein the semiconductor material includes acceptor or donor impurity atoms or crystal defects, whose energy levels are located at least 120 meV from the conduction band edge, as well as from the valence band edge in the bandgap; and wherein the concentration of the impurity atoms or crystal defects is larger than 1×1012 cm?3.

Abstract: According to example embodiments, a field effect transistor includes a graphene channel layer on a substrate. The graphene channel layer defines a slit. A source electrode and a drain electrode are spaced apart from each other and arranged to apply voltages to the graphene channel layer. A gate insulation layer is between the graphene channel layer and a gate electrode.

Abstract: A method for manufacturing a memory device includes forming a plurality of active layers alternating with insulating layers on a substrate where the active layers include an active material, etching the active layers and insulating layers to define a plurality of stacks of active strips, and after the etching, causing crystal growth in the active strips. The substrate can have a single crystalline surface with a crystal structure orientation, and the crystal growth in the active material can form crystallized material having the crystal structure orientation of the substrate at least near side surfaces of the active strips. Causing crystal growth includes depositing a seeding layer over the plurality of stacks and the substrate, where the seeding layer is in contact with the side surfaces of the active strips, and in contact with the substrate. The method can include, after causing crystal growth, removing the seeding layer.

Abstract: A three-dimensional graphene structure, and methods of manufacturing and transferring the same including forming at least one layer of graphene having a periodically repeated three-dimensional shape. The three-dimensional graphene structure is formed by forming a pattern having a three-dimensional shape on a surface of a substrate, and forming the three-dimensional graphene structure having the three-dimensional shape of the pattern by growing graphene on the substrate on which the pattern is formed. The three-dimensional graphene structure is transferred by injecting a gas between the three-dimensional graphene structure and the substrate, separating the three-dimensional graphene structure from the substrate by bonding the three-dimensional graphene structure to an adhesive support, combining the three-dimensional graphene structure with an insulating substrate, and removing the adhesive support.

Abstract: A method for manufacturing a memory device includes forming a plurality of active layers alternating with insulating layers on a substrate where the active layers include an active material, etching the active layers and insulating layers to define a plurality of stacks of active strips, and after the etching, causing crystal growth in the active strips. The substrate can have a single crystalline surface with a crystal structure orientation, and the crystal growth in the active material can form crystallized material having the crystal structure orientation of the substrate at least near side surfaces of the active strips. Causing crystal growth includes depositing a seeding layer over the plurality of stacks and the substrate, where the seeding layer is in contact with the side surfaces of the active strips, and in contact with the substrate. The method can include, after causing crystal growth, removing the seeding layer.

Abstract: A method for fabricating an electronic component, comprising providing a substrate; and depositing a graphene layer; wherein the substrate is either provided with a van-der-Waals functional layer or a van-der-Waals functional layer is deposited on the substrate before depositing the graphene layer; a surface step contour is formed; and growth of the graphene layer is seeded at the step contour.

Abstract: Exemplary embodiments provide semiconductor nanowires and nanowire devices/applications and methods for their formation. In embodiments, in-plane nanowires can be epitaxially grown on a patterned substrate, which are more favorable than vertical ones for device processing and three-dimensional (3D) integrated circuits. In embodiments, the in-plane nanowire can be formed by selective epitaxy utilizing lateral overgrowth and faceting of an epilayer initially grown in a one-dimensional (1D) nanoscale opening. In embodiments, optical, electrical, and thermal connections can be established and controlled between the nanowire, the substrate, and additional electrical or optical components for better device and system performance.

Abstract: In a semiconductor device having a recessed gate electrode and a method of fabricating the same, a channel trench is formed in a semiconductor substrate by etching the semiconductor substrate. A first semiconductor layer is formed on the semiconductor substrate that fills the channel trench. A second semiconductor layer is formed on the first semiconductor layer, the second semiconductor layer having a lower impurity concentration than the first semiconductor layer.

Abstract: A layer including a semiconductor film is formed over a glass substrate and is heated. A thermal expansion coefficient of the glass substrate is greater than 6×10?7/° C. and less than or equal to 38×10?7/° C. The heated layer including the semiconductor film is irradiated with a pulsed ultraviolet laser beam having a width of less than or equal to 100 ?m, a ratio of width to length of 1:500 or more, and a full width at half maximum of the laser beam profile of less than or equal to 50 ?m, so that a crystalline semiconductor film is formed. As the layer including the semiconductor film formed over the glass substrate, a layer whose total stress after heating is ?500 N/m to +50 N/m, inclusive is formed.

Abstract: A method for preparing a polysilicon rod using a metallic core means, including: installing a core means in an inner space of a deposition reactor used for preparing a silicon rod, the core means being constituted by forming at least one separation layer on the surface of a metallic core element and being connected to an electrode means, heating the core means by supplying electricity through the electrode means, and supplying a reaction gas into the inner space for silicon deposition, thereby forming a deposition output in an outward direction on the surface of the core means. The deposition output and the core means can be separated easily from the silicon rod output obtained by the process of silicon deposition, and the contamination of the deposition output caused by impurities of the metallic core element can be minimized, thereby a high-purity silicon can be prepared more economically and conveniently.

Abstract: The invention relates to a measuring arrangement, a semiconductor arrangement and a method for operating a reference source, wherein at least one semiconductor component and a voltage source are connected to a measuring unit and the measuring unit provides a measured value that is proportional to the number of defects.

Abstract: Methods and apparatus for hot wire chemical vapor deposition (HWCVD) are provided herein. In some embodiments, an inline HWCVD tool may include a linear conveyor for moving a substrate through the linear process tool; and a multiplicity of HWCVD sources, the multiplicity of HWCVD sources being positioned parallel to and spaced apart from the linear conveyor and configured to deposit material on the surface of the substrate as the substrate moves along the linear conveyor; wherein the substrate is coated by the multiplicity of HWCVD sources without breaking vacuum. In some embodiments, methods of coating substrates may include depositing a first material from an HWCVD source on a substrate moving through a first deposition chamber; moving the substrate from the first deposition chamber to a second deposition chamber; and depositing a second material from a second HWCVD source on the substrate moving through the second deposition chamber.

Abstract: A pattern film forming method includes a step of producing a transfer sheet in which a thin film is formed on a surface of a sheet-shaped material and a step of pressing the thin film against a pattern film formation surface of the substrate with a pressing member having convex portions corresponding to the pattern film from a reverse surface of the transfer sheet opposite to the thin film or a reverse surface of the substrate opposite to the pattern film formation surface to transfer the thin film to the substrate. A pattern film forming apparatus includes a sheet supply device, a pressing device and a substrate transport device. A high-definition pattern film having a desired pattern and a sharp edge can be formed with high productivity.

Abstract: Devices and methods for electrical interconnection for microelectronic circuits are disclosed. One method of electrical interconnection includes forming a bundle of microfilaments, wherein at least two of the microfilaments include electrically conductive portions extending along their lengths. The method can also include bonding the microfilaments to corresponding bond pads of a microelectronic circuit substrate to form electrical connections between the electrically conductive portions and the corresponding bond pads. A microelectronic circuit can include a bundle of microfilaments bonded to corresponding bond pads to make electrical connection between corresponding bonds pads and electrically-conductive portions of the microfilaments.

Abstract: A layer including a semiconductor film is formed over a glass substrate and is heated. A thermal expansion coefficient of the glass substrate is greater than 6×10?7/° C. and less than or equal to 38×10?7/° C. The heated layer including the semiconductor film is irradiated with a pulsed ultraviolet laser beam having a width of less than or equal to 100 ?m, a ratio of width to length of 1:500 or more, and a full width at half maximum of the laser beam profile of less than or equal to 50 ?m, so that a crystalline semiconductor film is formed. As the layer including the semiconductor film formed over the glass substrate, a layer whose total stress after heating is ?500 N/m to +50 N/m, inclusive is formed.

Abstract: A method and apparatus involve providing a substrate having a dielectric layer formed thereon, forming a photoresist mask over the dielectric layer, the photoresist mask defining an opening, etching the dielectric layer through the at least one opening in the photoresist mask, treating a portion of the photoresist mask with an etching species, and removing the treated photoresist mask with a supercritical fluid. The etching, treating, and removing can be performed in one chamber.

Abstract: The present invention provides methods, systems and system components for transferring, assembling and integrating features and arrays of features having selected nanosized and/or microsized physical dimensions, shapes and spatial orientations. Methods of the present invention utilize principles of ‘soft adhesion’ to guide the transfer, assembly and/or integration of features, such as printable semiconductor elements or other components of electronic devices. Methods of the present invention are useful for transferring features from a donor substrate to the transfer surface of an elastomeric transfer device and, optionally, from the transfer surface of an elastomeric transfer device to the receiving surface of a receiving substrate. The present methods and systems provide highly efficient, registered transfer of features and arrays of features, such as printable semiconductor element, in a concerted manner that maintains the relative spatial orientations of transferred features.

Abstract: The present invention relates to a method for preparing a polysilicon rod using a metallic core means, comprising: installing a core means in an inner space of a deposition reactor used for preparing a silicon rod, wherein the core means is constituted by forming one or a plurality of separation layer(s) on the surface of a metallic core element and is connected to an electrode means; heating the core means by supplying electricity through the electrode means; and supplying a reaction gas into the inner space for silicon deposition, thereby forming a deposition output in an outward direction on the surface of the core means. According to the present invention, the deposition output and the core means can be separated easily from the silicon rod output obtained by the process of silicon deposition, and the contamination of the deposition output caused by impurities of the metallic core element can be minimized, thereby a high-purity silicon can be prepared in a more economic and convenient way.

Abstract: Disclosed is a semiconductor light emitting device comprising a seed layer, a first conductive semiconductor layer into which the seed layer is partially inserted, a first electrode electrically connected to the first conductive semiconductor layer, an active layer under the first conductive semiconductor layer, a second conductive semiconductor layer under the active layer, and a second electrode layer under the second conductive semiconductor layer.

Abstract: A solid-phase sheet growing substrate (100) includes a main surface (1) and a side surface (2A, 2B) surrounding the main surface (1). The main surface (1) is divided by a peripheral groove (10A) into a surrounding portion (12) located at the outer side of the peripheral groove (10A) and an inner portion (11) located at the inner side of the peripheral groove (10A), and a slit groove (2) separated from the peripheral groove (10A) is formed on the side surface (2A) of the surrounding portion (12).

Abstract: In one embodiment, a method of fabricating a semiconductor device having a crystalline semiconductor layer includes preparing a semiconductor substrate and forming a preliminary active pattern on the semiconductor substrate. The preliminary active pattern includes a barrier pattern and a non-single crystal semiconductor pattern. A sacrificial non-single crystal semiconductor layer covers the preliminary active pattern and the semiconductor substrate. By crystallizing the sacrificial non-single crystal semiconductor layer and the non-single crystal semiconductor pattern, using the semiconductor substrate as a seed layer, the sacrificial non-single crystal semiconductor layer and the non-single crystal semiconductor pattern are changed to a sacrificial crystalline semiconductor layer and a crystalline semiconductor pattern, respectively. The crystalline semiconductor pattern and the barrier pattern constitute an active pattern. The sacrificial crystalline semiconductor layer is removed.

Abstract: In methods of fabricating a semiconductor device having multiple channel transistors and semiconductor devices fabricated thereby, the semiconductor device includes an isolation region disposed within a semiconductor substrate and defining a first region. A plurality of semiconductor pillars self-aligned with the first region and spaced apart from each other are disposed within the first region, and each of the semiconductor pillars has at least one recessed region therein. At least one gate structure may be disposed across the recessed regions, which crosses the semiconductor pillars and extends onto the isolation region.

Abstract: Improvement in characteristics of a SELAX-TFT and throughput of ELA crystallization is achieved. When a thin film transistor using pseudo single crystal semiconductor and a thin film transistor using particulate polysilicon semiconductor are formed on a single substrate, the film thickness of an amorphous semiconductor film before crystallization in the pseudo single crystal semiconductor portion is greater than that in the polysilicon semiconductor portion.

Abstract: In a method of making a c-Si-based cell or a ?c-Si-based cell, the improvement of increasing the minority charge carrier's lifetime, comprising: a) placing a c-Si or polysilicon wafer into CVD reaction chamber under a low vacuum condition and subjecting the substrate of the wafer to heating; and b) passing mixing gases comprising NH3/H2 through the reaction chamber at a low vacuum pressure for a sufficient time and at a sufficient flow rate to enable growth of an a-Si:H layer sufficient to increase the lifetime of the c-Si or polysilicon cell beyond that of the growth of an a-Si:H layer without treatment of the wafer with NH3/H2.

Abstract: The present invention provides a method of recrystallizing a silicon sheet, and in particular recrystallizing a small grained silicon sheet to improve material properties such as grain size and orientation. According to one aspect, the method includes using rapid thermal processing (RTP) to melt and recrystallize one or more entire silicon sheet(s) in one heating sequence. According to another aspect, the method includes directionally controlling a temperature drop across the thickness of the sheet so as to facilitate the production of a small number of nuclei in the melted material and their growth into large grains. According to a further aspect, the invention includes a re-crystallization chamber in an overall process flow that enables high-throughput processing of silicon sheets having desired properties for applications such as photovoltaic modules.

Abstract: A method of forming a lattice-tuning semiconductor substrate comprises the steps of defining parallel strips of a Si surface by the provision of spaced parallel oxide walls (2) on the surface, selectively growing a first SiGe layer on the strips such that first dislocations (3) extend preferentially across the first SiGe layer between the walls (2) to relieve the strain in the first SiGe layer in directions transverse to the walls (2), and growing a second SiGe layer on top of the first SiGe layer to overgrow the walls (2) such that second dislocations form preferentially within the second SiGe layer above the walls (2) to relieve the strain in the second SiGe layer in directions transverse to the first dislocations (3). The dislocations so produced serve to relax the material in two mutually transverse directions whilst being spatially separated so that the two sets of dislocations cannot interact with one another.

Abstract: A method for making an integrated circuit is disclosed as comprising depositing alternating regions of electrically conductive and dielectric materials on a substrate, wherein an area of dielectric material is formed by: a silane precursor having a fully or partially fluorinated first organic group comprising an unsaturated carbon-carbon double bond, the fully or partially fluorinated organic group bound to silicon in the silane precursor; forming from the silane precursor a hybrid organic-inorganic material having a molecular weight of at least 500 on a substrate; and increasing the molecular weight of the hybrid material by exposure to heat, electromagnetic radiation or electron beam so as to break the unsaturated carbon-carbon double bond and cross link via the fully or partially fluorinated organic group.

Abstract: By adding a novel improvement to the technique disclosed in JP 8-78329 A, a manufacturing method in which film characteristics of a semiconductor film having a crystalline structure are improved is provided. In addition, a TFT having superior TFT characteristics, such as field effect mobility, which uses the semiconductor film as an active layer, and a method of manufacturing the TFT, are also provided. A metallic element which promotes the crystallization of silicon is added to a semiconductor film having an amorphous structure and an oxygen concentration within the film of less than 5×1018/cm3. The semiconductor film having an amorphous structure is then heat-treated, forming a semiconductor film having a crystalline structure. Subsequently, an oxide film on the surface is removed. Oxygen is introduced to the semiconductor film having a crystalline structure, and processing is performed such that the concentration of oxygen within the film is from 5×1018/cm3 to 1×1021/cm3.

Abstract: A method and an apparatus for manufacturing a device are provided. The method and the apparatus can form micro wiring without undesired wetting and spreading using an inexpensive functional-liquid supplying method. A method for forming a device, such as a radiofrequency identification tag, includes: making patterns at a plurality of sections having different degrees of affinity to the functional liquid on a substrate to form the device; and supplying the functional liquid to the selected section having high affinity to the functional liquid. Forming the plurality of sections having different degrees of affinity to the functional liquid includes, for example: supplying an organosiloxane film on the substrate, and exposing the organosiloxane film through an optical mask.

Abstract: An inexpensive sheet with excellent evenness and a desired uniform thickness can be obtained by cooling a base having protrusions, dipping the surfaces of the protrusions of the cooled base into a melt material containing at least one of a metal material and a semiconductor material for crystal growth of the material on the surfaces of the protrusions. In addition, by rotating a roller having on its peripheral surface protrusions and a cooling portion for cooling said protrusions, the surfaces of the cooled protrusions can be dipped into a melt material containing at least one of a metal material and a semiconductor material for crystal growth of the material on the surfaces of the protrusions. Thus, a sheet with a desired uniform thickness can be obtained without slicing process.

Abstract: With a conventional cylindrical can method, a region used as a film formation ground electrode is a portion of the cylindrical can, and an apparatus becomes larger in size in proportion to the surface area of the electrode. A conveyor device and a film formation apparatus having the conveyor device are provided, which have a unit for continuously conveying a flexible substrate from one end to the other end, and which are characterized in that a plurality of cylindrical rollers are provided between the one end and the other end along an arc with a radius R, the cylindrical rollers being arranged such that their center axes run parallel to each other, and that a mechanism for conveying the flexible substrate while the substrate is in contact with each of the plurality of cylindrical rollers is provided.

Abstract: Systems and methods for reducing a surface roughness of a polycrystalline or single crystal thin film produced by the sequential lateral solidification process are disclosed.

Abstract: The present invention relates to a method of fabricating a liquid crystal display panel that involves patterning a silicon film crystallized by sequential lateral solidification. The method comprises the steps of preparing a silicon film, crystallizing the silicon film by growing silicon grains on a slant with respect to a horizontal direction of the silicon film, and forming a driver and a pixel part using the crystallized silicon film wherein the driver and pixel part comprise devices having channels arranged in horizontal and perpendicular directions relative to the silicon film. The crystallized silicon film has uniform grain boundaries in the channels of the devices, thereby improving the products by providing uniform electrical characteristics of devices that comprise a driver and a pixel part of an LCD panel.

Abstract: The present invention provides a process for producing a polycrystal silicon film which comprises a step of forming a polycrystal silicon film by light irradiation of a silicon film set on a substrate, and a step of selecting substrate samples having an average grain size in a plane of the sample of 500 nm or more. According to the present invention, stable production of a high-performance poly-silicon TFT liquid crystal display becomes possible.

Abstract: The present invention provides a method of forming a functional film pattern which allows the forming of fine film patterns with simplified steps. The present invention also provides a method of forming a functional film pattern where such defects as disconnection and short circuit rarely occurs, and forming a pattern which has a large thickness and is good for exhibiting a function such as electric conduction can be formed.

Abstract: In pre-treating a surface of a substrate in a process of forming a narrowed thin film pattern on the surface of the substrate from a solution such as a plating liquid, a mask with an opening corresponding to the thin film pattern to be formed later is formed on the surface of the substrate. Then, by micronizing a pre-treating liquid such as a water, a plating liquid, an acidic liquid ad an alkaline liquid, an atmosphere containing microparticles having diameters smaller than the minimum distance of the opening of the mask is produced. The substrate is positioned into the atmosphere, and the microparticles of the pre-treating liquid are stuck on the surface of the substrate exposing to the lower part of the opening of the mask. In using a water as the pre-treating liquid, the substrate is positioned into an atmosphere containing moisture vapor and the water particles are stuck on the surface of the substrate through their condensation.

Abstract: Disclosed herein is a method of forming a microcrystalline silicon film by using a raw gas containing at least a silicon compound by a high-frequency plasma CVD method, wherein the formation of the film is conducted in such a manner that the residence time, &tgr; (ms) of the raw gas in a film deposition chamber, which is defined as &tgr; (ms)=78.9×V×P/M, in which V is a volume (cm3) of the deposition chamber, P is a deposition pressure (Torr), and M is a total flow rate (sccm) of the raw gas, satisfies &tgr;<40. The method permits the formation of a good-quality microcrystalline silicon film at low cost.

Abstract: A method for producing formed semiconductor articles with predefined shapes such as core tubes for CVD production of bulk polysilicon. The method is characterized by thermal spray deposition of the semiconductor material in a on a temperature controlled rotating mandrel that is shaped complementarily to the desired article shape, and by later separation of the formed semiconductor body from the mandrel by thermal contraction, melting, or chemical reduction of the mandrel size.

Abstract: A power integrated circuit device with multiple guard rings and field plates overlying regions between each of the guard rings. Each of the field plates form overlying a dielectric layer also between each of the guard rings. Multiple field plates can exist between each of such guard rings. At least one field plate couples to a main junction region, and another field plate couples to a peripheral region, typically a scribe line. The present power device structure with multiple guard rings and field plates provides a resulting guard ring structure which allows for such device to achieve higher voltage applications.

Abstract: A semiconductor device comprises a semiconductor substrate and a silicon nitride film formed on the semiconductor substrate. The silicon nitride film is substantially free from an Si—H bond and has an Si—H density per unit area of 1×1015 cm−2 or less.

Abstract: A process for depositing polycrystalline silicon, including exposing a semiconductor substrate on which the polycrystalline silicon is to be deposited to a silicon containing gas and a temperature of about 680° C. to about 800° C.

Abstract: A semiconductor device manufacturing method capable of proceeding semiconductor device manufacturing processes according to predetermined schedules or while correcting them without testpieces is provided. The method includes the steps of collecting actually observed data during at least one of plural steps, obtaining prediction data in at least one of plural steps by using an ab initio molecular dynamics process simulator or a molecular dynamics simulator, comparing and verifying the prediction data and the actually observed data sequentially at real time, and correcting and processing the plural manufacturing process factors sequentially at real time if a difference in significance is recognized between set values for the plural manufacturing process factors and the plural manufacturing process factors estimated from the actually observed data according to comparison and verification.

Abstract: A method of making a semiconductor body includes the steps of preparing a sheet-like substrate having an insulating film and holes which pass through the insulating film, the holes being disposed at a uniform density, preparing a solution in which a semiconductor material is dissolved, and conveying the sheet-like substrate along a surface of the solution so as to grow a single crystal nucleus from each of the holes and thereby form a set of single crystal semiconductors on the sheet-like substrate. A solar cell can be manufactured by forming a semiconductor active area on the sheet-like support member made of a conductive material by a process containing the above-described semiconductor body forming method, and then by forming an electrode which makes a pair with the sheet-like support member.