Abstract: High p-type impurity concentration levels are achieved in Group III nitride semiconductor layers by depositing a nitrogen-rich surface onto a supporting layer while impeding the flow of Group III element reactant. Thereafter, the Group III element source is introduced into the reactor to generate a p-type region having a high impurity concentration. The flow of the reactant from the active nitrogen source is kept below about 300 sccm and the temperature of the reactor is reduced below 1075.degree. C. in order to provide improved surface characteristics.

Abstract: A method for fabricating a semiconductor device includes a step of depositing a first compound semiconductor layer by a MOVPE process to have a first conductivity type, doping a surface of the first compound semiconductor layer to the same, first conductivity type, by implementing a planar doping process as a result of decomposition of a gaseous dopant, such that no substantial growth of the first compound semiconductor layer occurs during the planar doping process, and depositing a second compound semiconductor layer of the first conductivity type on the doped surface of the first compound semiconductor layer by a MOVPE process.

Abstract: The present invention relates to an epitaxial wafer including a PN junction, which is improved in terms of light output and can have a good-enough ohmic electrode formed thereon. Epitaxial layers are formed of GaAs.sub.1-x P.sub.x where 0.45 <.times..ltoreq.1). A first P-type layer is formed by a vapor-phase growth process, and a second P-type layer is formed on the first P-type layer by a thermal diffusion process, said second P-type layer having a carrier concentration higher than that of said first P-type layer.

Abstract: A method and apparatus for producing a pattern of nucleation sites is disclosed. The method enables the growth of single crystal layers of a desired orientation on a suitable amorphous and/or non-single crystal surface. The method can be used to produce single crystal Si layers of a desired orientation on an amorphous layer, e.g. of SiO.sub.2 or Si.sub.3 N.sub.4. The method can provide for growth of (100) crystal orientation on SiO.sub.2. Semiconductor films may be accordingly grown on amorphous glass substrates for producing solar cells of high efficiency. A pattern of nucleation sites is created in amorphous layers, e.g. SiO.sub.2 on an IC wafer, by high-dose implantation through a single crystal mask having appropriate channeling directions at the desired lattice constants. Such implantation may be performed in a conventional ion implanter. Subsequent to creation of spaced-apart nucleation sites, epitaxial Si may be grown on such an SiO.sub.2 surface by CVD of Si.

Abstract: A semiconductor processing method of providing a polysilicon layer atop a semiconductor wafer comprises the following sequential steps: a) depositing a first layer of arsenic atop a semiconductor wafer; b) depositing a second layer of silicon over the arsenic layer, the second layer having an outer surface; c) first annealing the wafer at a temperature of at least about 600.degree. C. for a time period sufficient to impart growth of polycrystalline silicon grains in the second layer and providing a predominately polysilicon second layer, the first annealing step imparting diffusion of arsenic within the second layer to promote growth of large polysilicon grains; and d) with the second layer outer surface being outwardly exposed, second annealing the wafer at a temperature effectively higher than the first annealing temperature for a time period sufficient to outgas arsenic from the polysilicon layer.

Abstract: A low threshold voltage power DMOS transistor structure is disclosed having a lightly doped channel region formed in a shallow layer of relatively lightly doped epitaxial silicon. The light doping of the shallow epitaxial layer minimizes variations in threshold voltage and local variations in punch-through susceptibility due to nonuniformities in epitaxial doping concentration. A relatively heavily doped epitaxial layer is disposed underneath the shallow lightly doped epitaxial layer to reduce the drain to source resistance, R.sub.DS. Because the relatively heavily doped epitaxial layer is located below the channel region and not in the regions of the structure most susceptible to body region punch-through, providing the relatively highly doped epitaxial layer does not cause variations in threshold voltage and does not cause variations in the reverse bias voltage at which punch-through across the body region occurs.

Abstract: The invention relates to a method for manufacturing a III-V system compound semiconductor device, provides such a new C dopant as alkyl halide (CH.sub.2 I.sub.2 for example) containing carbon (C), iodine (I), and hydrogen (H) for giving a highly p-type conductivity to a GaAs crystal layer, an InGaAs crystal layer or the like as an object of it, and includes a process of forming a p-type III-V system compound semiconductor layer as using a compound containing carbon (C) as a dopant material for giving a p-type conductivity and further containing iodine (I) and hydrogen (H) as impurity.

Abstract: A method of simultaneously forming a gallium arsenide p-i-n structure having p, i, and n regions, which includes heating to dissolve gallium arsenide in a solvent such as bismuth or gallium to form a saturated solution of gallium arsenide in the solvent, contacting the solution with a gaseous mixture, which mixture includes hydrogen, water vapor and products of reactions between the hydrogen and the water vapor with the solvent and with silicon dioxide, to form a contacted solution, coating a suitably selected substrate, such as a group III-V compound such as gallium arsenide, with the contacted solution, cooling the coated substrate to precipitate gallium arsenide from the contacted solution onto the substrate, and removing the substrate coated with a layer of gallium arsenide having a p-i-n structure which constitutes the product having an i region dopant concentration of less than about 10.sup.12 cm.sup.-3.