Abstract: A composition and method of preparation, to provide silane compounds that are free of chlorine. The compounds are hexakis(monohydrocarbylamino)disilanes with general formula (I) ((R)HN)3—Si—Si—(NH(R))3??(I) wherein each R independently represents a C1 to C4 hydrocarbyl. These disilanes may be synthesized by reacting hexachlorodisilane in organic solvent with at least 6-fold moles of the monohydrocarbylamine RNH2 (wherein R is a C1 to C4 hydrocarbyl). Such compounds have excellent film-forming characteristics at low temperatures. These films, particularly in the case of silicon nitride and silicon oxynitride, also have excellent handling characteristics.

Abstract: According to the invention, while performing plasma-enhanced chemical vapor deposition on a substrate by exposing the substrate in a vacuum to a flow of particles generated by a plasma, which particles react to form a passivation layer on the substrate, a grid is interposed between the plasma and the substrate, thereby reducing the flow of charged particles towards the substrate while conserving a flow of neutral particles. The grid is formed of metal wires that are crossed at a pitch that is less than two or three times the Debye length (?D) of the plasma used, at least at the beginning of deposition. The aging properties of semiconductor components made by such a method is thereby improved.

Abstract: In one aspect, the invention includes a semiconductor processing method, comprising: a) providing a silicon nitride material having a surface; b) forming a barrier layer over the surface of the material, the barrier layer comprising silicon and nitrogen; and c) forming a photoresist over and against the barrier layer.

Abstract: To provide a semiconductor device, such as semiconductor laser, having no need of complicated process, ensuring a high yield and mass-productivity necessary for cost reduction, and exhibiting excellent initial characteristics and reliability, nitride semiconductor layers containing a plurality of group III elements are formed on a base body surface having recess (opening) such that the nitride semiconductor layer varies in at least one of composition ratio of the group III elements, band gap energy, refractive index, electrical conductivity and specific resistance within the layer in response to the recess of the base body. In addition, by heating the structure in an atmosphere containing hydrogen and using a layer containing Al as an etching stop layer, controllability and production yield can be improved without influences from fluctuation in etching depth, or the like. Further, etching and re-growth can be conducted consecutively to provide an inexpensive process.

Abstract: A method comprising providing a substrate having an NMOS device adjacent a PMOS device and forming a first stress layer over the NMOS and PMOS devices, wherein the first stress layer comprises a first tensile-stress layer or a compression-stress layer. An etch stop layer is formed over the first stress layer, and portions of the first stress layer and the etch stop layer are removed from over the NMOS device, leaving the first stress layer and the etch stop layer over the PMOS device. A second tensile-stress layer is formed over the NMOS device and over the first stress layer and the etch stop layer, and portions of the second tensile-stress layer and the etch stop layer are removed from over the PMOS device, leaving the second tensile-stress layer over the NMOS device.

Abstract: A method of chemical-mechanical polishing for forming a shallow trench isolation is disclosed. A substrate having a number of active regions, including a number of relatively large active regions and a number of relatively small active regions, is provided. The method comprises the following steps. A silicon nitride layer on the substrate is first formed. A number of shallow trenches are formed between the active regions. An oxide layer is formed over the substrate, so that the shallow trenches are filled with the oxide layer. A partial reverse active mask is formed on the oxide layer. The partial reverse active mask has an opening at a central part of each relatively large active region. The opening exposes a portion of the oxide layer. The opening has at least a dummy pattern. The oxide layer on the central part of each large active region is removed to expose the silicon nitride layer. The partial reverse active mask is removed. The oxide layer is planarized to expose the silicon nitride layer.

Abstract: A semiconductor device of this invention includes a silicon nitride film formed on a semiconductor substrate and having a density of 2.2 g/cm3 or less, and a silicon oxide film formed on the silicon nitride film in an ambient atmosphere containing TEOS and O3.

Abstract: A deposition method includes forming a nucleation layer over a substrate, forming a layer of a first substance at least one monolayer thick chemisorbed on the nucleation layer, and forming a layer of a second substance at least one monolayer thick chemisorbed on the first substance. The chemisorption product of the first and second substance may include silicon and nitrogen. The nucleation layer may comprise silicon nitride. Further, a deposition method may include forming a first part of a nucleation layer on a first surface of a substrate and forming a second part of a nucleation layer on a second surface of the substrate. A deposition layer may be formed on the first and second parts of the nucleation layer substantially non-selectively on the first part of the nucleation layer compared to the second part. The first surface may be a surface of a borophosphosilicate glass layer. The second surface may be a surface of a rugged polysilicon layer.

Abstract: A method of forming oxide-nitride-oxide (ONO) dielectric of a SONOS-type nonvolatile storage device is disclosed. According to a first embodiment, a method may include the steps of forming a tunneling dielectric (step 102), forming a charge storing dielectric (step 104), and forming a top insulating layer (step 106) all in the same wafer processing tool. According to various aspects of the embodiments, all layers of an ONO dielectric of a SONOS-type device may be formed in the same general temperature range. Further, a tunneling dielectric may include a tunnel oxide formed with a long, low pressure oxidation, and a top insulating layer may include silicon dioxide formed with a preheated source gas.

Abstract: A method of forming dual gate insulator layers, each with a specific insulator thickness, featuring a HF type pre-clean procedure performed prior to formation of each of the gate insulator layers, has been developed. After a first HF type pre-clean procedure a silicon nitride layer is deposited on the native oxide free, semiconductor substrate followed by selective removal of silicon nitride layer from a second portion of the semiconductor substrate. After a second HF type pre-clean procedure a silicon dioxide gate insulator layer is formed on the second portion of the native oxide free, semiconductor substrate, with the silicon dioxide gate insulator layer comprised with a different thickness than the silicon nitride gate insulator layer, located on a first portion of the semiconductor substrate. The procedure used to form the silicon dioxide gate insulator layer also removes bulk traps in the silicon nitride gate insulator layer.

Abstract: A method of forming capacitors with geometric deep trenches. First, a substrate with a pad structure formed thereon is provided, and a first hard mask layer is formed on the pad structure. Next, a second hard mask layer is formed on the first hard mask layer. Next, a spacer layer is formed in the first opening on the first hard mask layer to expose a second opening. Next, a third hard mask layer is filled the second opening, and the spacer layer is removed. Next, the first hard mask layer is etched to expose a third opening with a salient of the first hard mask layer, with the second hard mask layer and the third hard mask layer acting as masks. Finally, the first hard mask layer, the pad structure, and the substrate are etched to form a geometric deep trench.

Abstract: A method for forming a low-k dielectric layer for a semiconductor device using an ALD process including (a) forming predetermined interconnection patterns on a semiconductor substrate, (b) supplying a first and a second reactive material to a chamber having the substrate therein, thereby adsorbing the first and second reactive materials on a surface of the substrate, (c) supplying a first gas to the chamber to purge the first and second reactive materials that remain unreacted, (d) supplying a third reactive material to the chamber, thereby causing a reaction between the first and second materials and the third reactive material to form a monolayer, (e) supplying a second gas to the chamber to purge the third reactive material that remains unreacted in the chamber and a byproduct; and (f) repeating (b) through (e) a predetermined number of times to form a SiBN ternary layer having a predetermined thickness on the substrate.

Abstract: Thin, smooth silicon-containing films are prepared by deposition methods that utilize a silicon-containing precursor. In preferred embodiments, the methods result in Si-containing films that are continuous and have a thickness of about 150 ? or less, a surface roughness of about 5 ? rms or less, and a thickness non-uniformity of about 20% or less. Preferred silicon-containing films display a high degree of compositional uniformity when doped or alloyed with other elements. Preferred deposition methods provide improved manufacturing efficiency and can be used to make various useful structures such as wetting layers, HSG silicon, quantum dots, dielectric layers, anti-reflective coatings (ARC's), gate electrodes and diffusion sources.

Abstract: A high k dielectric film and methods for forming the same are disclosed. The high k material includes two peaks of impurity concentration, particularly nitrogen, such as at a lower interface and upper interface, making the layer particularly suitable for transistor gate dielectric applications. The methods of formation include low temperature processes, particularly CVD using a remote plasma generator and atomic layer deposition using selective incorporation of nitrogen in the cyclic process. Advantageously, nitrogen levels are tailored during the deposition process and temperatures are low enough to avoid interdiffusion and allow maintenance of the desired impurity profile.

Abstract: A method for forming a local oxidation of silicon (LOCOS) isolation region on a silicon substrate. A series of patterned graded oxidation mask layers formed of a material comprising silicon, oxygen and nitrogen is formed. The series of patterned graded oxidation mask layers has a comparatively high nitrogen:oxygen atomic ratio within a series of first contiguous sub-layers; a comparatively high nitrogen:oxygen atomic ratio within a series of third contiguous sub-layers; and a comparatively low nitrogen:oxygen atomic ratio within a series of second contiguous sub-layers.

Abstract: Disclosed is a method for depositing a silicon nitride layer of a semiconductor device. The method includes the steps of providing Al-based compound as a catalyst, and reacting DCS with NH3 by using the Al catalyst, thereby depositing the silicon nitride layer. DCS is reacted with NH3 by using the Al catalyst when depositing the silicon nitride layer, so dissolution of DCS is promoted by means of the Al catalyst, so that the silicon nitride layer is deposited at a high speed, thereby improving productivity of semiconductor devices. The silicon nitride layer is deposited by using DCS under a low-temperature condition of about 500 to 800° C., without deteriorating device characteristics.

Abstract: A method of fabricating a semiconductor device includes depositing a dielectric film and subjecting the dielectric film to a wet oxidation in a rapid thermal process chamber. The technique can be used, for example, in the formation of various elements in an integrated circuit, including gate dielectric films as well as capacitive elements. The tight temperature control provided by the RTP process allows the wet oxidation to be performed quickly so that the oxidizing species does not diffuse significantly through the dielectric film and diffuse into an underlying layer. In the case of capacitive elements, the technique also can help reduce the leakage current of the dielectric film without significantly reducing its capacitance.

Abstract: A method for the passivation of a semiconductor substrate, wherein a SiNx:H layer is deposited on the surface of the substrate (1) by means of a PECVD process comprising the following steps: the substrate (1) is placed in a processing chamber (5) which has specific internal processing chamber dimensions; the pressure in the processing chamber is maintained at a relatively low value; the substrate (1) is maintained at a specific treatment temperature; a plasma (P) is generated by at least one plasma cascade source (3) mounted on the processing chamber (5) at a specific distance (L) from the substrate surface; at least a part of the plasma (P) generated by each source (3) is brought into contact with the substrate surface; and flows of silane and ammonia are supplied to said part of the plasma (P).

Abstract: A method of manufacturing a semiconductor device according to the present invention involves forming two layers of silicon nitride films as an insulating film by reacting a nitrogen containing gas with dichlorosilane to form one silicon nitrogen film, and reacting the nitrogen containing gas with a compound composed of silicon and chlorine to form the other silicon nitride film. One silicon nitride film excels in the leak current characteristic, while the other silicon nitride film is deposited faster than the one silicon nitride film, resulting in improved insulating properties of the silicon nitride films as well as a higher throughput in the formation of the simulating film.

Abstract: A method of forming a semiconductor structure comprises forming an etch-stop layer comprising nitride, on a stack. The stack is on a semiconductor substrate, and the stack comprises (i) a gate layer. The forming is by CVD with a gas comprising a first compound which is SixL2x, and a second compound comprising nitrogen and deuterium, L is an amino group, and X is 1 or 2.

Abstract: An advanced back-end-of-line (BEOL) metallization structure is disclosed. The structure includes a diffusion barrier or cap layer having a low dielectric constant (low-k), where the cap layer is formed of silicon nitride by a plasma-enhanced chemical vapor deposition (PE CVD) process. The metallization structure also includes an inter-layer dielectric (ILD) formed of a carbon-containing dielectric material having a dielectric constant of less than about 4, and a continuous hardmask layer overlying the ILD which is preferably formed of silicon nitride or silicon carbide. A method for forming the BEOL metallization structure is also disclosed. The method includes a pre-clean or pre-activation step to improve the adhesion of the cap layer to the underlying copper conductors. The pre-clean or pre-activation step comprises exposing the copper surface to a reducing plasma including hydrogen, ammonia, nitrogen and/or noble gases.

Abstract: Enhanced carrier mobility in transistors of differing (e.g. complementary) conductivity types is achieved on a common chip by provision of two or more respective stressed layers, such as etch stop layers, overlying the transistors with stress being wholly or partially relieved in portions of the respective layers, preferably by implantations with heavy ions such as germanium, arsenic, xenon, indium, antimony, silicon, nitrogen oxygen or carbon in accordance with a block-out mask. The distribution and small size of individual areas of such stressed structures also prevents warping or curling of even very thin substrates.

Abstract: The instant invention is a method for forming a smooth interface between the upper surface of a silicon substrate and a dielectric layer. The invention comprises forming a thin amorphous region (180) on the upper surface (170) of a silicon substrate prior to forming the dielectric layer on the upper silicon surface.

Abstract: A process of manufacturing a semiconductor device uses catalytic chemical vapor deposition. In the process, a reaction chamber containing a catalyzer and a substrate has gasses, including silane, ammonia, and hydrogen supplied to the reaction chamber. The gases are brought into contact with the catalyzer and then with the substrate to deposit a silicon nitride film.

Abstract: A manufacturing method for semiconductor devices that can improve uniformity in the surface of a silicon nitride film or a nitride film to be formed and improve production efficiency is provided. A step of forming a first film that is a silicon oxide film or a silicon oxynitride film on a silicon substrate, a step of forming a second film that is a tetrachlorosilane monomolecular layer, and a step of forming a third film that is a silicon nitride monomolecular layer by performing a nitriding process on the second film are included. A silicon nitride film having a predetermined film thickness is formed by repeating the step of forming the second film and the step of forming the third film for a predetermined number of times. In a manufacturing apparatus, a plurality of silicon substrates are arranged on a stair-like wafer boat, and a process gas is supplied toward the upper side of a reaction tube from a process gas supply pipe.

Abstract: A method for forming a semiconductor device having improved characteristics and reliability by forming a hard mask layer on a bit line to prevent degradation of characteristics of the device in a self-alignment contact process of a storage electrode is disclosed. The hard mask layer utilizes over-hang formed at the upper portion of the bit line so as to provide sufficient protection for the bit line in the subsequent etching processes.

Abstract: A method of manufacturing an integrated circuit having a gate structure above a substrate that includes germanium utilizes at least one layer as a seal. The layer advantageously can prevent back sputtering and outdiffusion. A transistor can be formed in the substrate by doping through the layer. Another layer can be provided below the first layer. Layers of silicon dioxide, silicon carbide, silicon nitride, titanium, titanium nitride, titanium/titanium nitride, tantalum nitride, and silicon carbide can be used.

Abstract: Methods and apparatuses are disclosed that can introduce deliberate semiconductor film variation during semiconductor manufacturing to compensate for radial processing differences, to determine optimal device characteristics, or produce small production runs. The present invention radially varies the thickness and/or composition of a semiconductor film to compensate for a known radial variation in the semiconductor film that is caused by performing a subsequent semiconductor processing step on the semiconductor film.

Abstract: A method for fabricating a capacitor for a semiconductor device is disclosed, which comprises the steps of: forming a storage node electrode on a semiconductor wafer, forming a dielectric layer made of a cyclic silicon nitride layer on the surface of the storage node electrode, and forming an upper electrode on the dielectric layer; lowering the thickness Teff of the dielectric layer and improving leakage current characteristics through use of a cyclic Si3N4 or a cyclic SiOxNy (wherein x falls between 0.1 and 0.9 and y falls between 0.1 and 2), having a large oxidation resistance and high dielectric ratio, as a dielectric.

Abstract: Methods for forming an electronic device can include forming a capacitor structure on a portion of a substrate with the capacitor structure including a first electrode on the substrate, a capacitor dielectric on the first electrode, a second electrode on the dielectric, and a hard mask on the second electrode. More particularly, the capacitor dielectric can be between the first and second electrodes, the first electrode and the capacitor dielectric can be between the second electrode and the substrate, and the first and second electrodes and the capacitor dielectric can be between the hard mask and the substrate. An interlayer dielectric layer can be formed on the hard mask and on portions of the substrate surrounding the capacitor structure, and portions of the interlayer dielectric layer can be removed to expose the hard mask while maintaining portions of the interlayer dielectric layer on portions of the substrate surrounding the capacitor structure.

Abstract: An antireflective coating (ARC) layer for use in the manufacture of a semiconductor device. The ARC layer has a bottom portion that has a lower percentage of silicon than a portion of the ARC layer located above it. The ARC layer is formed on a metal layer, wherein the lower percentage of silicon of the ARC layer inhibits the unwanted formation of suicides at the metal layer/ARC layer interface. In some embodiments, the top portion of the ARC layer has a lower percentage of silicon than the middle portion of the ARC layer, wherein the lower percentage of silicon at the top portion may inhibit the poisoning of a photo resist layer on the ARC layer. In one embodiment, the percentage of silicon can be increased or decreased by decreasing or increasing the ratio of the flow rate of a nitrogen containing gas with respect to the flow rate of a silicon containing gas during a deposition process.

Abstract: A CVD device (100) used for depositing a silicon nitride has a structure in which a hot wall furnace (103) for thermally degrading a source gas and a chamber (101) for forming a film over a surface of a wafer (1) are separated from each other. The hot wall furnace (103) for thermally degrading the source gas is provided above the chamber (101), and a heater (104) capable of setting the inside of the furnace at a high temperature atmosphere of approximately 1200° C. is provided at the outer periphery thereof. The source gas, supplied to the hot wall furnace (103) through pipes (105) and (106), is thermally degraded in this furnace in advance, and degraded components thereof are supplied on a stage (102) of the chamber (101) to form a film on the surface of the wafer (1).

Abstract: An anti-reflective coating is formed between a material layer which is to be patterned on a semiconductor structure using photolithography, and an overlying photoresist layer. The anti-reflective coating suppresses reflections from the material layer surface into the photoresist layer that could degrade the patterning. The anti-reflective coating includes an anti-reflective layer of silicon oxime, silicon oxynitride, or silicon nitride, and a barrier layer which is grown on the anti-reflective layer using a nitrous oxide plasma discharge to convert a surface portion of the anti-reflective layer into silicon dioxide. The barrier layer prevents interaction between the anti-reflective layer and the photoresist layer that could create footing. The anti-reflective layer is deposited on the material layer using Plasma Enhanced Chemical Vapor Deposition (PECVD) in a reactor. The barrier layer is grown on the anti-reflective layer in-situ in the same reactor, thereby maximizing throughput.

Abstract: A film-forming surface reforming method includes the steps of bringing a gas or an aqueous solution containing ammonia, hydrazine, an amine, an amino compound or a derivative thereof into contact with the film-forming surface before an insulating film is formed on the film-forming surface, and bringing a gas or an aqueous solution containing Hydrogen peroxide, ozone, Oxygen, nitric acid, sulfuric acid or a derivative thereof into contact with the film-forming surface.

Abstract: Methods and apparatus for forming word line stacks comprise forming a thin nitride layer coupled between a bottom silicon layer and a conductor layer. In a further embodiment, a diffusion barrier layer is coupled between the thin nitride layer and the bottom silicon layer. The thin nitride layer is formed by annealing a silicon oxide film in a nitrogen-containing ambient.

Abstract: A method for fabricating a non-volatile memory is provided. A stacked structure including a tunneling layer, a trapping layer, a barrier layer, and a control gate is formed on a substrate. A source region and a drain region are formed beside the stacked structure in the substrate. A silicon oxide spacer is formed on the sidewalls of the stacked structure. An ultraviolet-resistant lining layer is formed on the surfaces of the substrate and the stacked structure to prevent the ultraviolet light from penetrating into the trapping layer. A dielectric layer is formed on the ultraviolet-resistant lining layer. A contact being electrically connected to the control gate is formed in the dielectric layer. A conducting line electrically connected to the contact is formed on the dielectric layer. A lost-surface-charge lining layer is formed on the surfaces of the dielectric layer and the conducting line to reduce the antenna effect.

Abstract: A plate high-frequency electrode for supplying a high-frequency power of the VHF band and a grounding electrode are disposed in opposition to each other at an interval of less than 8 mm in a vacuum vessel; at least a silane-based gas and nitrogen gas as source gases are introduced into a reaction space of the vacuum vessel, and a silicon nitride deposited film is formed with the pressure of the reaction space being kept at 40 to 133. Thereby, a silicon nitride film with good quality can be obtained.

Abstract: A method of forming a capacitor includes forming first and second capacitor electrodes over a substrate. A capacitor dielectric region is formed intermediate the first and second capacitor electrodes, and includes forming a silicon nitride comprising layer over the first capacitor electrode. A silicon oxide comprising layer is formed over the silicon nitride comprising layer. The silicon oxide comprising layer is exposed to an activated nitrogen species generated from a nitrogen-containing plasma effective to introduce nitrogen into at least an outermost portion of the silicon oxide comprising layer. Silicon nitride is formed therefrom effective to increase a dielectric constant of the dielectric region from what it was prior to said exposing. Capacitors and methods of forming capacitor dielectric layers are also disclosed.

Abstract: A method of fabricating a semiconductor device, having a nitride/high-k material/nitride gate dielectric stack with good thermal stability which does not diffuse into a silicon substrate, a polysilicon gate, or a polysilicon-germanium gate when experiencing subsequent high temperature processes, involving: (a) providing a substrate; (b) initiating formation of the nitride/high-k material/nitride gate dielectric stack by depositing a first ultra-thin nitride film on the substrate; (c) depositing a high-k material, such as a thin metal film, on the first ultra-thin nitride film; (d) depositing a second ultra-thin nitride film on the high-k material, thereby forming a sandwich structure; (e) completing formation of the nitride/high-k material/nitride gate dielectric stack from the sandwich structure; and (f) completing fabrication of the semiconductor device.

Abstract: A method of enhancing adhesion strength of a boro-silicate glass (BSG) film to a silicon nitride film is provided. A semiconductor substrate with a silicon nitride film formed thereon is provided. The silicon nitride film is then exposed to oxygen-containing plasma such as ozone plasma. A thick BSG film is then deposited onto the treated surface of the silicon nitride film. By pre-treating the silicon nitride film with ozone plasma for about 60 seconds, an increase of near 50% of Kapp of the BSG film is obtained.

Abstract: A method for forming an improved etching hardmask oxide layer in a polysilicon etching process including providing a planarized semiconductor wafer process surface including adjacent first exposed polysilicon portions and exposed oxide portions; selectively etching through a thickness portion of the exposed oxide portions; thermally growing an oxide hardmask layer over the exposed polysilicon portions to form oxide hardmask portions; exposing second exposed polysilicon portions adjacent at least one oxide hardmask portion; and, etching through a thickness portion of the second exposed polysilicon portions.

Abstract: A process of forming a nitride film on a semiconductor substrate including exposing a surface of the substrate to a rapid thermal process to form the nitride film.

Abstract: A method for depositing a low k dielectric film comprising silicon, carbon, and nitrogen is provided. The low k dielectric film is formed by a gas mixture comprising a silicon source, a carbon source, and NR1R2R3, wherein R1, R2, and R3 are selected from the group consisting of alkyl and phenyl groups. The low k dielectric film may be used as a barrier layer, an etch stop, an anti-reflective coating, or a hard mask.

Abstract: A thermal processing system (1) includes a reaction vessel (2) capable of forming a silicon nitride film on semiconductor wafers (10) through interaction between hexachlorodisilane and ammonia, and an exhaust pipe (16) connected to the reaction vessel (2). The reaction vessel 2 is heated at a temperature in the range of 500 to 900° C. and the exhaust pipe (16) is heated at 100° C. before disassembling and cleaning the exhaust pipe 16. Ammonia is supplied through a process gas supply pipe (13) into the reaction vessel (2), and the ammonia is discharged from the reaction vessel (2) into the exhaust pipe (16).

Abstract: A method of manufacturing a semiconductor device having a storage electrode of a capacitor is provided. The method includes the steps of: forming a contact hole perforating through an interlayer dielectric layer on a semiconductor substrate; forming a conductive plug to fill the contact hole and expose the surface of the interlayer dielectric layer; forming molds on the interlayer dielectric layer to expose the surface of the conductive plug; recessing the upper surface of the conductive plug to expose a portion of the sidewalls of the interlayer dielectric layer; forming an electrode layer to cover the recessed conductive plug, and the sidewalls of the interlayer dielectric layer and the molds; and removing upper surfaces of the electrode layer to make a storage electrode until molds are exposed.

Abstract: A semiconductor device includes a gate insulating film formed on a silicon substrate, a gate electrode formed on the gate insulating film, and an electrical insulating film formed on the gate electrode. The electrical insulating film includes a N—H bond and substantially no Si—H bond. The electrical insulating film is formed by using tetrachlorosilane (SiCl4) that contains no hydrogen (H) as a source gas for a silicon nitride film. Thus, the semiconductor device can suppress residual hydrogen in the gate insulating film and prevent interface defects of the gate insulating film, a shift in the threshold voltage of a transistor, and the degradation of an on-state current. A method for manufacturing the semiconductor device also is provided.

Abstract: The invention includes a method for treating a plurality of discrete semiconductor substrates. The discrete semiconductor substrates are placed within a reactor chamber. While the substrates are within the chamber, they are simultaneously exposed to one or more of H, F and Cl to remove native oxide. After removing the native oxide, the substrates are simultaneously exposed to a first reactive material to form a first mass across at least some exposed surfaces of the substrates. The first reactive material is removed from the reaction chamber, and subsequently the substrates are exposed to a second reactive material to convert the first mass to a second mass. The invention also includes apparatuses which can be utilized for simultaneous ALD treatment of a plurality of discrete semiconductor substrates.

Abstract: A method of forming an insulating film according to the present invention reacts a nitrogen containing gas with a compound composed of silicon and chlorine under the condition that the gas flow ratio of the compound to the nitrogen containing gas is lower than {fraction (1/30)} to form a silicon nitride film. In the present invention, by forming the silicon nitride film at the gas flow ratio lower than {fraction (1/30)}, an insulating film having this silicon nitride film is improved in electric insulating property, so that a smaller leak current flows therethrough.

Abstract: Hexachlorodisilane (Si2Cl6) is used as a Si raw material for forming a silicon nitride film that can be widely different in the etching rate from a silicon oxide film. The silicon nitride film is formed by an LPCVD method.

Abstract: A semiconductor device having a thin film formed by atomic layer deposition and a method for fabricating the same, wherein the semiconductor device includes a liner layer formed on an internal wall and bottom of a trench, gate spacers formed on the sidewalls of gate stack patterns functioning as a gate line, a first bubble prevention layer formed on the gate spacers and the gate stack patterns, bit line spacers formed on the sidewalls of bit line stack patterns functioning as a bit line, and a second bubble prevention layer formed on the bit line spacers and the gate stack patterns and at least one of the above is formed of a multi-layer of a silicon nitride layer and a silicon oxide layer, or a multi-layer of a silicon oxide layer and a silicon nitride layer, thereby filling the trench, gate stack patterns, or bit line stack patterns without a void.