Abstract: Various embodiments include methods and chemistries to etch metal-oxide films. In one embodiment, a method of etching tin oxide (SnO2) films includes using thionyl chloride (SOCl2) chemistry to produce an etch rate of the SnO2 films of up to 10-times higher as compared with Cl2 chemistry for similar flow-rates and process conditions, and gettering oxygen species from the SnO2 films by using the SOCl2, thereby forming volatile SO2 and volatile SnCl4 to provide human safety and machine safety and operations. Other methods, chemistries, and techniques are disclosed.

Abstract: The present invention provides a system and method for manufacturing a semiconductor device including a substrate and a high-? dielectric layer on the substrate. The system comprises a modular track; a substrate-forming chamber connected with the modular track for forming the substrate; and an atomic layer deposition (ALD) chamber connected with the modular track for providing the high-? dielectric layer.

Abstract: Methods of forming contacts for solar cells are described. In one embodiment, a method includes forming a silicon layer above a substrate, forming and patterning a solid-state p-type dopant source on the silicon layer, forming an n-type dopant source layer over exposed regions of the silicon layer and over a plurality of regions of the solid-state p-type dopant source, and heating the substrate to provide a plurality of n-type doped silicon regions among a plurality of p-type doped silicon regions.

Abstract: Methods of forming contacts for back-contact solar cells are described. In one embodiment, a method includes forming a thin dielectric layer on a substrate, forming a polysilicon layer on the thin dielectric layer, forming and patterning a solid-state p-type dopant source on the polysilicon layer, forming an n-type dopant source layer over exposed regions of the polysilicon layer and over a plurality of regions of the solid-state p-type dopant source, and heating the substrate to provide a plurality of n-type doped polysilicon regions among a plurality of p-type doped polysilicon regions.

Abstract: A system for processing a semiconductor substrate is provided. The system includes a mainframe having a plurality of modules attached thereto. The modules include processing modules, storage modules, and transport mechanisms. The processing modules may include combinatorial processing modules and conventional processing modules, such as surface preparation, thermal treatment, etch and deposition modules. In one embodiment, at least one of the modules stores multiple masks. The multiple masks enable in-situ variation of spatial location and geometry across a sequence of processes and/or multiple layers of a substrate to be processed in another one of the modules. A method for processing a substrate is also provided.

Abstract: An integrated processing tool is described comprising a full-wafer processing module and a combinatorial processing module. Chemicals for use in the combinatorial processing module are fed from a delivery system including a set of first manifolds. An output of each first manifold is coupled to at least one mixing vessel. An output of each mixing vessel feeds more than one of a set of second manifolds. An output of each set of second manifolds feeds one of multiple site-isolated reactors of the combinatorial processing module.

Abstract: The present invention provides methods and systems for discretized, combinatorial processing of regions of a substrate such as for the discovery, implementation, optimization, and qualification of new materials, processes, and process sequence integration schemes used in integrated circuit fabrication. A substrate having an array of differentially processed regions thereon is processed by delivering materials to or modifying regions of the substrate.

Abstract: The present invention provides methods and systems for discretized, combinatorial processing of regions of a substrate such as for the discovery, implementation, optimization, and qualification of new materials, processes, and process sequence integration schemes used in integrated circuit fabrication. A substrate having an array of differentially processed regions thereon is processed by delivering materials to or modifying regions of the substrate.

Abstract: A method for fabricating a copper indium diselenide semiconductor film is provided using substrates having a copper and indium composite structure. The substrates are placed vertically in a furnace and a gas including a selenide species and a carrier gas are introduced. The temperature is increased from about 350° C. to about 450° C. to initiate formation of a copper indium diselenide film from the copper and indium composite on the substrates.

Abstract: A liquid film applicator means can apply a photosensitive lyophobic film 18 to a substrate 16. An exposure unit 10 is placed on the back side of the substrate and forms the lyophobic film applied on the substrate into a pattern in alignment with gate electrodes 13. A dropping unit 55 drops a test liquid to a surface of the substrate having a pattern of the lyophobic film formed by the exposure means. A measuring means 58 detects the droplet dropped by the dropping unit. A determining means determines whether the pattern of the lyophobic film formed by the exposure means is proper or not based on the droplet detected by the detecting means.

Abstract: Some embodiments include methods of titanium deposition in which a silicon-containing surface and an electrically insulative surface are both exposed to titanium-containing material, and in which such exposure forms titanium silicide from the silicon-containing surface while not depositing titanium onto the electrically insulative surface. The embodiments may include atomic layer deposition processes, and may include a hydrogen pre-treatment of the silicon-containing surfaces to activate the surfaces for reaction with the titanium-containing material. Some embodiments include methods of titanium deposition in which a semiconductor material surface and an electrically insulative surface are both exposed to titanium-containing material, and in which a titanium-containing film is uniformly deposited across both surfaces.

Abstract: Some embodiments include methods of titanium deposition in which a silicon-containing surface and an electrically insulative surface are both exposed to titanium-containing material, and in which such exposure forms titanium silicide from the silicon-containing surface while not depositing titanium onto the electrically insulative surface. The embodiments may include atomic layer deposition processes, and may include a hydrogen pre-treatment of the silicon-containing surfaces to activate the surfaces for reaction with the titanium-containing material. Some embodiments include methods of titanium deposition in which a semiconductor material surface and an electrically insulative surface are both exposed to titanium-containing material, and in which a titanium-containing film is uniformly deposited across both surfaces.

Abstract: Provided is a substrate processing apparatus and a method of manufacturing a semiconductor device, which are hard to cause a defect in processing a substrate owing to that a pressure inside a process chamber is not kept constant, and which enable a better processing of a substrate.

Abstract: After cleaning the front and back sides of a silicon wafer with a liquid SC-1 and liquid SC-2, the front and back sides of the silicon wafer are cleaned with an HF solution to be water-repellent surfaces. Following that, an epitaxial layer of silicon is formed on the front side. Consequently, there can be reduced stacking faults after formation of the epitaxial layer and occurrence of cloud on the back side. Alternatively, the front and back sides of a silicon wafer are cleaned with the liquid SC-1 and liquid SC-2, and then the back side of the silicon wafer is cleaned with an HF solution to be a water-repellent surface while the front side is cleaned with purified water to be a hydrophilic surf ace. Following that, an epitaxial layer of silicon is formed on the front side. Consequently, there can be reduced mounds on the front side and occurrence of cloud on the back side.

Abstract: Disclosed are PEALD (plasma-enhanced atomic layer deposition) apparatus and PEALD method for manufacturing a semiconductor device, the PEALD apparatus comprising: a housing including a reaction chamber in which a deposition reaction is performed; a rotary disk unit installed in the housing and provided with a plurality of susceptors for receiving wafers thereon so as to move the wafers; a gas spray unit mounted on the upper end of the housing above the rotary disk unit, and provided with first reactive gas sprayers, second reactive gas sprayers and inert gas sprayers on a lower surface of a circular disk for spraying respective gases into the housing; a gas feed unit connected to the gas spray unit for supplying first and second reactive gases and a purge gas into the housing; a gas exhaust port formed around the rotary disk unit; and a plasma generator for generating plasma to excite the second reactive gas.

Abstract: A method is provided wherein a gate dielectric film that is plasma nitrided in a chamber of one system is subsequently heated or “annealed” in another chamber of the same system. Processing delay can be controlled so that all wafers processed in the system experience similar nitrogen content.

Abstract: A method for seasoning a chamber and depositing a low dielectric constant layer on a substrate in the chamber is provided. In one aspect, the method includes seasoning the chamber with a first mixture comprising one or more organosilicon compounds and one or more oxidizing gases and depositing a low dielectric constant layer on a substrate in the chamber from a second mixture comprising one or more organosilicon compounds and one or more oxidizing gases, wherein a ratio of the total flow rate of the organosilicon compounds to the total flow rate of the oxidizing gases in the first mixture is lower than the total flow rate of the organosilicon compounds to the total flow rate of the oxidizing gases in the second mixture.

Abstract: A vapor phase growth method for growing a semiconductor single crystal thin film on a front surface of a semiconductor single crystal substrate (1) while introducing gas into a reaction chamber (11), has a step of performing heating output power control in a gas introduction region (R1) according to a temperature detected in a region other than the gas introduction region (R1) in the reaction chamber (11).

Abstract: A system for processing wafers includes a robot moveable within an enclosure to load and unload workpieces into and out of workpiece processors. A processor includes an upper rotor having alignment pins, and a lower rotor having one or more openings for receiving the alignment pins to form a processing chamber around the workpiece. The alignment pins center the workpiece relative to a rotor spin axis and to an etch or drain groove in the upper rotor. A first fluid outlet delivers processing fluid to a central region of the workpiece. The processing fluid is distributed across the workpiece surface via centrifugal force generated by spinning the processing chamber. Purge gas is optionally delivered into the processing chamber through an annular opening around the first fluid outlet to help remove processing fluid from the processing chamber.

Abstract: A system and method for processing a workpiece, includes workpiece processors. A robot is moveable within an enclosure to load and unload workpieces into and out of the processors. A processor includes an upper rotor having a central air flow opening. The upper rotor is magnetically driven into engagement with a lower rotor to form a workpiece processing chamber. A moveable drain mechanism aligns different drain paths with the processing chamber so that different processing fluids may be removed from the processing chamber via different drain paths. A moveable nozzle positioned in the air flow opening distributes processing fluid to the workpiece. The processing fluid is distributed across the workpiece surface, via centrifugal force generated by spinning the processing chamber, and removed from the processing chamber via the moveable drain mechanism.

Abstract: A system for processing semiconductor wafers has process units on a deck of a frame. The process units and the deck have precision locating features, such as tapered pins, for precisely positioning the process units on the deck. Process units can be removed and replacement process units installed on the deck, without the need for recalibrating the load/unload robot. This reduces the time needed to replace process units and restart processing operations. Liquid chemical consumption during processing is reduced by drawing unused liquid out of supply lines and pumping it back to storage.

Abstract: A process for epitaxially coating the front surface of a semiconductor wafer in a CVD reactor, the front surface of the semiconductor wafer being exposed to a process gas which contains a source gas and a carrier gas, and the back surface of the semiconductor wafer being exposed to a displacement gas, wherein the displacement gas contains no more than 5% by volume of hydrogen, with the result that diffusion of dopants out of the back surface of the semiconductor wafer, which is intensified by hydrogen, is substantially avoided. With this process, it is possible to produce a semiconductor wafer with a substrate resistivity of ?100 m?cm and a resistivity of the epitaxial layer of >1 ?cm without back-surface coating, the epitaxial layer of which semiconductor wafer has a resistance inhomogeneity of <10%.

Abstract: A process for fabricating a semiconductor device having a buried layer comprises the steps of implanting an impurity ion into where the buried layer to be formed in a substrate, providing the substrate inside a reactor furnace, preparing a nonoxidizing atmosphere inside of the reactor furnace, annealing the substrate to activate and diffuse the implanted impurity ion region while increasing inside temperature of the reactor furnace up to a first temperature, and shifting the inside temperature of the reactor furnace from the first temperature to a second temperature in which a epitaxial crystal starts to grow and introducing a epitaxial growth gas into the reactor furnace to grow an epitaxial layer on a surface of the substrate.

Abstract: A method for annealing an SOI in which two annealing steps are followed by a cooling step. During the second annealing step, the annealing temperature is from 993° C. to the melting point of silicon. During the cooling step, the cooling rate is not less than 0.12° C./sec when a temperature is from 993° C. to 775° C.

Abstract: Embodiments of the present invention include a method of depositing an improved seasoning film. In one embodiment the method includes, prior to performing a substrate processing operation, forming a layer of silicon over an interior surface of the substrate processing chamber as opposed to a layer of silicon oxide. In certain embodiments, the layer of silicon comprises at least 70% atomic silicon, is deposited from a high density silane (SinH2n+2) process gas and/or is deposited from a plasma having a density of at least 1×1011 ions/cm3.

Abstract: Systems and methods for insitu post atomic layer deposition (ALD) destruction of active species are provided. ALD processes deposit multiple atomic layers on a substrate. Pre-cursor gases typically enter a reactor and react with the substrate resulting in a monolayer of atoms. After the remaining gas is purged from the reactor, a second pre-cursor gas enters the reactor and the process is repeated. The active species of some pre-cursor gases do not readily purge from the reactor, thus increasing purge time and decreasing throughput. A high-temperature surface placed in the reactor downstream from the substrate substantially destroys the active species insitu. Substantially destroying the active species allows the reactor to be readily purged, increasing throughput.

Abstract: It is an object of the present invention to adjust the transfer environment of a substrate in order to prevent contamination of the substrate surface by impurities. A semiconductor manufacturing apparatus comprises a load-lock chamber 1 in which substrate exchange with the outside is performed, a wafer process chamber 2 in which the wafer is subjected to a predetermined processing, and a transfer chamber 3 in which the wafer is transferred between the load-lock chamber 1 and the wafer process chamber 2. In a semiconductor manufacturing method in which this semiconductor manufacturing apparatus is used to treat a substrate, an inert gas (N2) is supplied to and exhausted from the load-lock chamber 1, the transfer chamber 3, and the wafer process chamber 2 while the substrate is being transferred from the load-lock chamber 1 to the wafer process chamber 2 through the transfer chamber 3, and the substrate transfer is carried out with a predetermined pressure maintained.

Abstract: According to the present invention, there are provided a method for heat treatment of silicon wafers wherein a silicon wafer is subjected to a heat treatment at a temperature of from 1000° C. to the melting point of silicon in an inert gas atmosphere, and temperature decreasing in the heat treatment is performed in an atmosphere containing 1-60% by volume of hydrogen, a method for heat treatment of silicon wafers under a reducing atmosphere containing hydrogen by using a rapid heating and rapid cooling apparatus, wherein temperature decreasing rate from the maximum temperature in the heat treatment to 700° C. is controlled to be 20° C./sec or less, and a silicon wafer which has a crystal defect density of 1.0×104 defects/cm3 or more in a wafer bulk portion, a crystal defect density of 1.0×104 defects/cm3 or less in a wafer surface layer of a depth of 0.5 &mgr;m from the surface, a crystal defect density of 0.15 defects/cm2 or less on a wafer surface and surface roughness of 1.

Abstract: A system for processing a workpiece includes a head attached to a head lifter. A workpiece is supported in the head between an upper rotor and a lower rotor. A base has a bowl for containing a liquid. The head is movable by the head lifter from a first position vertically above the bowl, to a second position where the workpiece is at least partially positioned in the bowl. The bowl has a contour section with a sidewall having a radius of curvature which increases adjacent to a drain outlet in the bowl, to help rapid draining of liquid from the bowl. The head has a load position, where the rotors are spaced apart by a first amount, and a process position, where the rotors are engaged and sealed against each other. For rapid evacuation of fluid, the head also has a fast drain position, where the rotors are moved apart sufficiently to create an annular drain gap.

Abstract: The present invention relates to a method for improving an interface of a semiconductor device. The method comprises providing a first and second substrate having an oxidized region, and establishing a first loading position in a first process chamber. The first and second substrates are consecutively inserted into the first process chamber and generally simultaneously processed, wherein the oxidized region is reduced by exposure to a first plasma. The first and second substrates are then consecutively removed and the first substrate is inserted into a second process chamber and subsequently processed. The second substrate is then inserted into the second process chamber and the first and second substrates are simultaneously processed. The first substrate is the removed, and the second substrate is processed again.

Abstract: A process system for processing a semiconductor wafer or other similar flat workpiece has a head including a workpiece holder. A motor in the head spins the workpiece. A head lifter lowers the head to move the workpiece into a bath of liquid in a bowl. Sonic energy is introduced into the liquid and travels through the liquid to the workpiece, to assist in processing. The head is lifted to bring the workpiece to a rinse position. The bath liquid is drained. The workpiece is rinsed via radial spray nozzles in the base. The head is lifted to a dry position. A reciprocating swing arm sprays a drying fluid onto the bottom surface of the spinning wafer, to dry the wafer.

Abstract: Methods for reducing contamination of semiconductor substrates after processing are provided. The methods include heating the processed substrate to remove absorbed chemical species from the substrate surface by thermal desorption. Thermal desorption can be performed either in-situ or ex-situ. The substrate can be heated by convection, conduction, and/or radiant heating. The substrate can also be heated by treating the surface of the processed substrate with an inert plasma during which treatment ions in the plasma bombard the substrate surface raising the temperature thereof. Thermal desorption can also be performed ex-situ by applying thermal energy to the substrate during transport of the substrate from the processing chamber and/or by transporting the substrate to a transport module (e.g., a load lock) or to a second processing chamber for heating. Thermal desorption during transport can be enhanced by purging an inert gas over the substrate surface.

Abstract: A method used to form a semiconductor device having a capacitor comprises placing a semiconductor wafer assembly into a chamber of a plasma source, the wafer assembly comprising a layer of insulation having at least one contact therein and a surface, and further comprising a conductive layer over the surface and in the contact. Next, in the chamber, a layer of etch resistant material is formed within the contact over the conductive layer, the etch resistant material not forming over the surface.

Abstract: A system for processing a workpiece includes a base having a bowl or recess for holding a liquid. A process reactor or head holds a workpiece between an upper rotor and a lower rotor. A head lifter lowers the head holding the workpiece into contact with the liquid. The head spins the workpiece during or after contact with the liquid. The upper and lower rotors have side openings for loading and unloading a workpiece into the head. The rotors are axially moveable to align the side openings.

Abstract: A semiconductor laser of present invention is constructed by an aluminium oxide (Al2O3) film on an end surface opposed to a beam emission surface of the semiconductor laser, a silicon nitride (SiNx, or Si3N4) film on the aluminium oxide film, and a silicon oxide (SiO2) film on the silicon nitride film. These films are made successively by a method of Electron Cyclotron Resonance (ECR) sputtering.

Abstract: The present invention provides a method of forming a dielectric on a semiconductor substrate. A dielectric is grown at a substrate interface in a plurality of increments. Stress is relieved at the dielectric substrate interface between each increment. In another aspect, stress relief is performed by annealing the substrate. The annealing is performed by placing the substrate in an inert environment and by raising the temperature surrounding the substrate.

Abstract: The integrity of the interface and adhesion between a barrier or capping layer and a Cu or Cu alloy interconnect member is significantly enhanced by delaying and/or slowly ramping up the introduction of silane to deposit a silicon nitride capping layer after treating the exposed planarized surface of the Cu or Cu alloy with an ammonia-containing plasma. Other embodiments include purging the reaction chamber with nitrogen at elevated temperature to remove residual gases prior to introducing the wafer for plasma treatment.

Abstract: Embodiments of the present invention include a method of depositing an improved seasoning film. In one embodiment the method includes, prior to performing a substrate processing operation, forming a layer of silicon over an interior surface of the substrate processing chamber as opposed to a layer of silicon oxide. In certain embodiments, the layer of silicon comprises at least 70% atomic silicon, is deposited from a high density silane (SinH2n+2) process gas and/or is deposited from a plasma having a density of at least 1×1011 ions/cm3.

Abstract: A magnetron sputter source is adapted to fit into a K-cell port in a molecular beam epitaxy apparatus. The MSE source has a protruding cylindrical body for insertion into the K-cell port. The cylindrical body is attached at its proximal end to a flange and has its distal end open. An array of permanent magnets is arranged at the distal end of the cylindrical body. A magnet return piece is mounted behind the permanent magnets. A sputter target is mounted in front of the permanent magnets, and cooling ducts within the cylindrical body carry a cooling medium to the sputter target.

Abstract: A method and apparatus for the electroplating deposition of a metal onto a semiconductor wafer surface (29), including vibrationally scrubbing the wafer surface (29) during an electroplating process. At least one transducer (32) is mounted to a wall (33) of an electroplating tool chamber (22). The transducer (32) intermittently delivers sonic energy pulses lasting for one to two seconds to the electroplating solution during the electroplating process.

Abstract: A system for processing a workpiece includes a head attached to a head lifter. A workpiece is supported in the head between an upper rotor and a lower rotor. A base has a bowl for containing a liquid. The head is movable by the head lifter from a first position vertically above the bowl, to a second position where the workpiece is at least partially positioned in the bowl. The bowl has a contour section with a sidewall having a radius of curvature which increases adjacent to a drain outlet in the bowl, to help rapid draining of liquid from the bowl. The head has a load position, where the rotors are spaced apart by a first amount, and a process position, where the rotors are engaged and sealed against each other. For rapid evacuation of fluid, the head also has a fast drain position, where the rotors are moved apart sufficiently to create an annular drain gap.

Abstract: An apparatus and method for depositing a thin film on a semiconductor substrate. The apparatus includes a chamber or housing suited for holding a plurality of wafer platforms. The wafer platforms are arranged stacked in the chamber equidistant and electrically isolated from each other wafer platform. At least two of the plurality of wafer platforms are electrically coupled to a power source to form a first electrode and a second electrode. The remainder of the plurality of wafer platforms are disposed therebetween. In this manner, the first electrode and the second electrode form a single series capacitor. At least one reactant gas is provided in the chamber and reacted with sufficiently supplied energy to form a plasma. Radicals or ions from the plasma react on the surface of the wafers to cause a thin film layer to be distributed on the equally dispersed wafers positioned on a surface of the wafer platforms.

Abstract: Methods for reducing contamination of semiconductor substrates after processing are provided. The methods include heating the processed substrate to remove adsorbed chemical species from the substrate surface by thermal desorption. Thermal desorption can be performed either in-situ or ex-situ. The substrate can be heated by convection, conduction, and/or radiant heating. The substrate can also be heated by treating the surface of the processed substrate with an inert plasma during which treatment ions in the plasma bombard the substrate surface raising the temperature thereof. Thermal desorption can also be performed ex-situ by applying thermal energy to the substrate during transport of the substrate from the processing chamber and/or by transporting the substrate to a transport module (e.g., a load lock) or to a second processing chamber for heating. Thermal desorption during transport can be enhanced by purging an inert gas over the substrate surface.

Abstract: A system for processing a workpiece includes a base having a bowl or recess for holding a liquid. A sonic energy source, such as a megasonic transducer, provides sonic energy into a liquid in the bowl. A process reactor or head holds a workpiece between an upper rotor and a lower rotor. A head lifter lowers the head holding the workpiece into the liquid. Sonic energy is provided to the workpiece through the liquid, optionally while the head spins the workpiece. The liquid may include de-ionized water and an etchant.

Abstract: The interconnection system of the present invention comprises an interconnection film formed by chemical vapor deposition, wherein the interconnection film comprises an upper layer and a lower layer in which the concentrations of impurities are different. The method of producing an interconnection film comprising an upper layer and a lower layer by chemical vapor deposition using a single chamber, comprises: a lower layer forming step of depositing the lower layer in a recesses by evacuating the chamber and by injecting a reactant gas into the chamber; a cleaning step of subsequently reducing the partial pressure of impurities which are dissociated from the reactant gas; and an upper layer forming step of subsequently depositing an upper layer onto the lower layer by injecting a reactant gas into the chamber.

Abstract: A system for processing a workpiece includes a base having a bowl or recess for holding a liquid. A process reactor or head holds a workpiece between an upper rotor and a lower rotor. A head lifter lowers the head holding the workpiece into contact with the liquid. Sonic energy is introduced into the liquid and acts on the workpiece to improve processing. The head spins the workpiece during or after contact with the liquid. The upper and lower rotors have side openings for loading and unloading a workpiece into the head. The rotors are axially moveable to align the side openings.

Abstract: A method for processing a semiconductor wafer or similar article includes the step of spinning the wafer and applying a fluid to a first side of the wafer, while it is spinning. The fluid flows radially outwardly in all directions, over the first side of the wafer, via centrifugal force. As the fluid flows off of the circumferential edge of the wafer, it is contained in an annular reservoir, so that the fluid also flows onto an outer annular area of the second side of the wafer. An opening allows fluid to flow out of the reservoir. The opening defines the location of a parting line beyond which the fluid will not travel on the second side of the wafer. An apparatus for processing a semiconductor wafer or similar article includes a reactor having a processing chamber formed by upper and lower rotors. The wafer is supported between the rotors. The rotors are rotated by a spin motor. A processing fluid is introduced onto the top or bottom surface of the wafer, or onto both surfaces, at a central location.

Abstract: The present invention is a method of fabricating interconnects. A semiconductor substrate having a dielectric layer is provided. The dielectric layer has a via opening therein, which exposes the semiconductor substrate. Next, the surfaces of the via opening is covered with a conformal titanium layer formed by a sputtering process. The surface of the conformal titanium layer is covered with an Al—Si—Cu alloy layer formed by a sputtering process at a temperature of about 0° C. to 200° C. Then, the surface of the Al—Si—Cu alloy layer is covered with an Al—Cu alloy layer formed by a sputtering process at a temperature of about 380° C. to 450° C., which Al—Cu alloy layer fills the via opening. The Al—Cu alloy layer, the Al—Si—Cu alloy layer and the wetting layer on the dielectric layer are patterned by photolithography and etching process.

Abstract: A method of fabricating integrated circuit wafers, in accordance with this invention comprises the following steps. Provide an integrated circuit wafer having devices formed therein covered with a metal layer and a photoresist layer over the metal layer which is selectively exposed and developed forming a photoresist mask. Introduce the wafer into a multi-chamber system, patterning the metal layer by etching and then exposing the mask to light in a cooled chamber wherein the light is derived from a source selected from a mercury lamp and a laser filtered to remove red and infrared light therefrom before exposure of the wafer thereto. The chamber is cooled by a refrigerant selected from water and liquefied gas. Then remove the wafer, and load it into a photoresist stripping tank to remove the photoresist mask with a wet photoresist stripper. Place the wafer in a batch type plasma chamber after removing the photoresist mask.

Abstract: A wafer handling system for a wafer processing apparatus includes a wafer load lock chamber, a wafer processing chamber and a transfer chamber operatively coupled to the wafer load lock chamber and the wafer processing chamber. The transfer chamber includes a wafer transfer mechanism comprising a transfer arm pivotably coupled to a portion of the transfer chamber which forms an axis. The transfer arm is operable to rotate about the axis to transfer a wafer between the wafer load lock chamber and the process chamber in a single axis wafer movement. The invention also includes a method of transferring a wafer to a wafer processing apparatus. The method includes loading a wafer into a wafer load lock chamber and rotating a transfer arm into the wafer load lock chamber to retrieve the wafer therein.