Eutectic Semiconductor Patents (Class 438/929)
  • Patent number: 8404515
    Abstract: Disclosed herein is a facile process for the formation of conjugated polymers inside or outside assembled solid-state devices. One process generally involves applying a voltage to a device comprising at least two electrodes, a combination of an electrolyte composition and a electroactive monomer disposed between the electrodes, and a potential source in electrical connection with the at least two electrodes; wherein the applying voltage polymerizes the electroactive monomer into a conjugated polymer. Also disclosed are electrochromic articles prepared from the process and solid-state devices comprising a composite of an electrolyte composition and a conjugated polymer.
    Type: Grant
    Filed: March 23, 2011
    Date of Patent: March 26, 2013
    Assignee: The University of Connecticut
    Inventors: Gregory A. Sotzing, Michael A. Invernale
  • Patent number: 8207023
    Abstract: Methods for selectively depositing an epitaxial layer are provided herein. In some embodiments, providing a substrate having a monocrystalline first surface and a non-monocrystalline second surface; exposing the substrate to a deposition gas to deposit a layer on the first and second surfaces, the layer comprising a first portion deposited on the first surfaces and a second portion deposited on the second surfaces; and exposing the substrate to an etching gas comprising a first gas comprising hydrogen and a halogen and a second gas comprising at least one of a Group III, IV, or V element to selectively etch the first portion of the layer at a slower rate than the second portion of the layer. In some embodiments, the etching gas comprises hydrogen chloride (HCl) and germane (GeH4).
    Type: Grant
    Filed: August 3, 2010
    Date of Patent: June 26, 2012
    Assignee: Applied Materials, Inc.
    Inventors: Zhiyuan Ye, Saurabh Chopra, Yihwan Kim
  • Patent number: 7630117
    Abstract: Disclosed is an electrolyte for electrochromic devices, which includes a eutectic mixture comprising: (a) a compound having an acidic functional group and basic functional group; and (b) an ionizable lithium salt. An electrochromic device using the same electrolyte is also disclosed. Because the electrochromic device uses the electrolyte comprising the eutectic mixture, which is cost-efficient and has excellent thermal and chemical stability, there are no problems related with evaporation and exhaustion as well as flammability of electrolyte. Additionally, it is possible to minimize side reactions with constitutional elements of an electrochromic device and electrolyte, thereby improving the safety. Further, it is also possible to improve the quality of an electrochromic device by virtue of a broad electrochemical window and high electroconductivity of the eutectic mixture.
    Type: Grant
    Filed: September 20, 2005
    Date of Patent: December 8, 2009
    Assignee: LG Chem, Ltd.
    Inventors: Jae Seung Oh, Byoung Bae Lee, Jae Duk Park, Su Jin Mun
  • Patent number: 7528413
    Abstract: This invention relates to a high thermal conductivity composite material which comprises diamond particles and a copper matrix useful as electronic heat sinks for electronics parts, particularly for semiconductor lasers, high performance MPUs (micro-processing units), etc., also to a process for the production of the same and a heat sink using the same. According to the high thermal conductivity diamond sintered compact of the present invention, in particular, there can be provided a heat sink having a high thermal conductivity as well as matching of thermal expansions, most suitable for mounting a large sized and high thermal load semiconductor chip, for example, high output semiconductor lasers, high performance MPU, etc. Furthermore, the properties such as thermal conductivity and thermal expansion can freely be controlled, so it is possible to select the most suitable heat sink depending upon the features and designs of elements to be mounted.
    Type: Grant
    Filed: October 16, 2002
    Date of Patent: May 5, 2009
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Katsuhito Yoshida, Hideaki Morigami, Takahiro Awaji, Tetsuo Nakai
  • Patent number: 7005378
    Abstract: Nanolithographic deposition of metallic nanostructures using coated tips for use in microelectronics, catalysis, and diagnostics. AFM tips can be coated with metallic precursors and the precursors patterned on substrates. The patterned precursors can be converted to the metallic state with application of heat. High resolution and excellent alignment can be achieved.
    Type: Grant
    Filed: August 26, 2003
    Date of Patent: February 28, 2006
    Assignee: Nanoink, Inc.
    Inventors: Percy Vandorn Crocker, Jr., Linette Demers, Nabil A. Amro
  • Patent number: 6090651
    Abstract: A method of forming a supersaturated layer on a semiconductor device, where an initial phase layer is deposited on the semiconductor device. The initial phase layer has a solid phase dopant saturation level and a liquid phase dopant saturation level, where the liquid phase dopant saturation level is greater than the solid phase dopant saturation level. A concentration of a dopant is impregnated within the initial phase layers, where the concentration of the dopant is greater than the solid phase dopant saturation level and no more than about the liquid phase dopant saturation level. The initial phase layer is annealed, without appreciably heating the semiconductor device, using an amount of energy that is high enough to liquefy the initial phase layer over a melt duration. This dissolves the dopant in the liquefied initial phase layer. The amount of energy is low enough to not appreciably gasify or ablate the initial phase layer.
    Type: Grant
    Filed: November 5, 1999
    Date of Patent: July 18, 2000
    Assignee: LSI Logic Corporation
    Inventors: Helmut Puchner, Sheldon Aronowitz, Gary K. Giust