Utilizing Plasma Etching Or Sputter Etching Patents (Class 505/411)
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Patent number: 8993064Abstract: Provided are a substrate for a superconducting compound and a method for manufacturing the substrate which can realize the excellent adhesive strength simultaneously with high orientation of copper. An absorbed material on a surface of a copper foil to which rolling is applied at a draft of 90% or more is removed by applying sputter etching to the surface of the copper foil, sputter etching is applied to a nonmagnetic metal sheet, the copper foil and the metal sheet are bonded to each other by applying a pressure to the copper foil and the metal sheet using reduction rolls, crystals of the copper in the copper foil are oriented by heating a laminated body formed by such bonding, copper is diffused into the metal sheet by heating with a copper diffusion distance of 10 nm or more, and a protective layer is laminated to a surface of the copper foil of the laminated body.Type: GrantFiled: November 12, 2010Date of Patent: March 31, 2015Assignees: Toyo Kohan Co., Ltd., Sumitomo Electric Industries, Ltd.Inventors: Hironao Okayama, Kouji Nanbu, Akira Kaneko, Hajime Ota, Kotaro Ohki, Takashi Yamaguchi, Kazuhiko Hayashi, Kazuya Ohmatsu
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Publication number: 20140296078Abstract: Disclosed is a splicing method of two second-generation ReBCO high temperature superconductor coated conductors (2G ReBCO HTS CCs), in which, with stabilizing layers removed from the two strands of 2G ReBCO HTS CCs through chemical wet etching or plasma dry etching, surfaces of the two high temperature superconducting layers are brought into direct contact with each other and heated in a splicing furnace in a vacuum for micro-melting portions of the surfaces of the high temperature superconducting layers to permit inter-diffusion of ReBCO atoms such that the surfaces of the two superconducting layers can be spliced to each other and oxygenation annealing for recovery of superconductivity which was lost during splicing.Type: ApplicationFiled: October 29, 2012Publication date: October 2, 2014Inventors: Young-Kun Oh, Hee-Sung Ann, Myung-Whon Lee, Hai-Gun Lee
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Patent number: 8761848Abstract: Systems, articles, and methods are provided related to nanowire-based detectors, which can be used for light detection in, for example, single-photon detectors. In one aspect, a variety of detectors are provided, for example one including an electrically superconductive nanowire or nanowires constructed and arranged to interact with photons to produce a detectable signal. In another aspect, fabrication methods are provided, including techniques to precisely reproduce patterns in subsequently formed layers of material using a relatively small number of fabrication steps. By precisely reproducing patterns in multiple material layers, one can form electrically insulating materials and electrically conductive materials in shapes such that incoming photons are redirected toward a nearby electrically superconductive materials (e.g., electrically superconductive nanowire(s)). For example, one or more resonance structures (e.g.Type: GrantFiled: May 27, 2011Date of Patent: June 24, 2014Assignee: Massachusetts Institute of TechnologyInventors: Karl K. Berggren, Xiaolong Hu, Daniele Masciarelli
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Publication number: 20130040821Abstract: Provided are a substrate for a superconducting compound and a method for manufacturing the substrate which can realize the excellent adhesive strength simultaneously with high orientation of copper. An absorbed material on a surface of a copper foil to which rolling is applied at a draft of 90% or more is removed by applying sputter etching to the surface of the copper foil, sputter etching is applied to a nonmagnetic metal sheet, the copper foil and the metal sheet are bonded to each other by applying a pressure to the copper foil and the metal sheet using reduction rolls, crystals of the copper in the copper foil are oriented by heating a laminated body formed by such bonding, copper is diffused into the metal sheet by heating with a copper diffusion distance of lOnm or more, and a protective layer is laminated to a surface of the copper foil of the laminated body.Type: ApplicationFiled: November 12, 2010Publication date: February 14, 2013Applicants: SUMITOMO ELECTRIC INDUSTRIES, LTD., TOYO KOHAN CO., LTD.Inventors: Hironao Okayama, Kouji Nanbu, Akira Kaneko, Hajime Ota, Kotaro Ohki, Takashi Yamaguchi, Kazuhiko Hayashi, Kazuya Ohmatsu
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Publication number: 20120077680Abstract: Systems, articles, and methods are provided related to nanowire-based detectors, which can be used for light detection in, for example, single-photon detectors. In one aspect, a variety of detectors are provided, for example one including an electrically superconductive nanowire or nanowires constructed and arranged to interact with photons to produce a detectable signal. In another aspect, fabrication methods are provided, including techniques to precisely reproduce patterns in subsequently formed layers of material using a relatively small number of fabrication steps. By precisely reproducing patterns in multiple material layers, one can form electrically insulating materials and electrically conductive materials in shapes such that incoming photons are redirected toward a nearby electrically superconductive materials (e.g., electrically superconductive nanowire(s)). For example, one or more resonance structures (e.g.Type: ApplicationFiled: May 27, 2011Publication date: March 29, 2012Applicant: Massachusetts Institute of TechnologyInventors: Karl K. Berggren, Xiaolong Hu, Daniele Masciarelli
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Publication number: 20110177952Abstract: A method is disclosed for making a template for a superconducting coil on a former (25) from a sheet (23) of flexible biaxially-textured material having at least two joining edges, the surface texture of the sheet being defined by a plurality of grains, and the former having a substantially curved surface. The method comprises the steps of shaping the sheet so that each joining edge lies adjacent to another joining edge on application of the sheet to the former, each joining edge and its adjacent edge being a pair of edges, and so that the sheet is dimensioned to cover a part of the surface of the former and substantially to fit that part of the former; positioning the sheet on the former so that regions of the sheet either side of the pair of edges have substantially aligned grains; and forming a join between the pair of edges, the template thereby having a substantially continuous textured surface across the join.Type: ApplicationFiled: November 23, 2006Publication date: July 21, 2011Applicant: COATED CONDUCTOR CYLINDERS LTDInventor: Eamonn Maher
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Patent number: 7888290Abstract: The invention herein is directed towards a material exhibiting superconductivity characteristics which includes a laser processed region of a metal oxide crystal. The material has a transition temperature greater than a transition temperature of the metal oxide crystal, preferably greater than 140K. The transition temperature of the material may be considered greater than the transition temperature of the metal oxide crystal if the material has a transition temperature and the metal oxide crystal has no transition temperature. The present invention is also directed to a material which includes a laser processed strontium ruthenate crystal wherein the material has a greater oxygen content than the starting strontium ruthenate crystal. The present invention is also directed towards a method for manufacturing a material exhibiting superconductivity characteristics that includes providing a metal oxide crystal and laser ablating the metal oxide crystal and a material made by this process.Type: GrantFiled: September 12, 2006Date of Patent: February 15, 2011Inventors: Armen Gulian, Kent S Wood, Deborah Van Vechten, Vahan R Nikoghosyan
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Patent number: 7884051Abstract: The invention herein is directed towards a method of making material exhibiting superconductivity characteristics which includes a laser processed region of a metal oxide crystal. The material has a transition temperature greater than a transition temperature of the metal oxide crystal, preferably greater than 140K. The transition temperature of the material may be considered greater than the transition temperature of the metal oxide crystal if the material has a transition temperature and the metal oxide crystal has no transition temperature. The present invention is also directed to a material which includes a laser processed strontium ruthenate crystal wherein the material has a greater oxygen content than the starting strontium ruthenate crystal. The present invention is also directed towards a method for manufacturing a material exhibiting superconductivity characteristics that includes providing a metal oxide crystal and laser ablating the metal oxide crystal and a material made by this process.Type: GrantFiled: February 23, 2010Date of Patent: February 8, 2011Inventors: Armen M Gulian, Kent S Wood, Deborah Van Vechten, Vahan R Nikoghosyan
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Patent number: 7427519Abstract: A method of detecting an end point of a plasma etching process for etching a first layer on a second layer is described, the first layer producing a first etching product and the second layer a second etching product. Time-dependent intensity [Ij=1 to m(t)] of a number “m” (m?1) of spectral line(s) of the first etching product in emission spectrum of the plasma and that [Ii=1 to n(t)] of a number “n” (n?1) of spectral line(s) of the second etching product in the emission spectrum are collected, wherein “m+n?3” is satisfied. One index of Lm ? ( t ) ? [ = ? i = 1 , j = 1 n , m ? ? I i ? ( t ) I j ? ( t ) ] , Ls ? ( t ) ? [ = ? i = 1 , j = 1 n , m ? ? I i ? ( t ) I j ? ( t ) ] , Lm?(t) {=d[Lm(t)]/dt} and Ls?(t) {=d[Ls(t)]/dt} is calculated in real time and plotted with the time. An etching end-point is identified from the plot of the one index with the time.Type: GrantFiled: February 2, 2007Date of Patent: September 23, 2008Assignee: MACRONIX International Co., Ltd.Inventor: Hong-Ji Lee
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Patent number: 7037848Abstract: In one aspect, the invention encompasses a method of etching insulative materials which comprise complexes of metal and oxygen. The insulative materials are exposed to physical etching conditions within a reaction chamber and in the presence of at least one oxygen-containing gas. In another aspect, the invention encompasses a method of forming a capacitor. An electrically conductive first layer is formed over a substrate, and a second layer is formed over the first layer. The second layer is a dielectric layer and comprises a complex of metal and oxygen. A conductive third layer is formed over the second layer. The first, second and third layers are patterned into a capacitor construction. The patterning of the second layer comprises exposing the second layer to at least one oxygen-containing gas while also exposing the second layer to physical etching conditions.Type: GrantFiled: June 17, 2004Date of Patent: May 2, 2006Assignee: Micron Technology, Inc.Inventor: Daryl C. New
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Patent number: 6809066Abstract: Ion texturing methods and articles are disclosed.Type: GrantFiled: July 30, 2001Date of Patent: October 26, 2004Assignee: The Regents of the University of CaliforniaInventors: Ronald P. Reade, Paul H. Berdahl, Richard E. Russo, Leslie G. Fritzemeier
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Patent number: 6753262Abstract: In one aspect, the invention encompasses a method of etching insulative materials which comprise complexes of metal and oxygen. The insulative materials are exposed to physical etching conditions within a reaction chamber and in the presence of at least one oxygen-containing gas. In another aspect, the invention encompasses a method of forming a capacitor. An electrically conductive first layer is formed over a substrate, and a second layer is formed over the first layer. The second layer is a dielectric layer and comprises a complex of metal and oxygen. A conductive third layer is formed over the second layer. The first, second and third layers are patterned into a capacitor construction. The patterning of the second layer comprises exposing the second layer to at least one oxygen-containing gas while also exposing the second layer to physical etching conditions.Type: GrantFiled: January 27, 2003Date of Patent: June 22, 2004Assignee: Micron Technology, Inc.Inventor: Daryl C. New
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Patent number: 6627555Abstract: A protection device which is active during the manufacturing process of a semiconductor chip includes a protection transistor and an antenna. The protection transistor is connected between a metal line having devices to be protected electrically connected thereto and a ground supply, where the metal line is connected to devices to be protected. The antenna is formed of the same metal layer as the metal line and controls the operation of the protection transistor during the manufacturing process. The antenna is connected to a gate of the protection transistor. Optically, there is a metal ring around the antenna which is connected to a drain of the protection transistor via the same metal layer as the metal line. During normal operation of the chip, the protection transistor is either active for other purposes or is turned off.Type: GrantFiled: February 5, 2001Date of Patent: September 30, 2003Assignee: Saifun Semiconductors Ltd.Inventors: Boaz Eitan, Ilan Bloom
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Patent number: 6358857Abstract: In one aspect, the invention encompasses a method of etching insulative materials which comprise complexes of metal and oxygen. The insulative materials are exposed to physical etching conditions within a reaction chamber and in the presence of at least one oxygen-containing gas. In another aspect, the invention encompasses a method of forming a capacitor. An electrically conductive first layer is formed over a substrate, and a second layer is formed over the first layer. The second layer is a dielectric layer and comprises a complex of metal and oxygen. A conductive third layer is formed over the second layer. The first, second and third layers are patterned into a capacitor construction. The patterning of the second layer comprises exposing the second layer to at least one oxygen-containing gas while also exposing the second layer to physical etching conditions.Type: GrantFiled: July 23, 1999Date of Patent: March 19, 2002Assignee: Micron Technology, Inc.Inventor: Daryl C. New
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Publication number: 20020006877Abstract: Planarizing High Temperature Superconductor (HTS) surfaces, especially HTS thin film surfaces is crucial for HTS thin film device processing. Disclosed is a method of surface planarization for HTS film. The method includes first smoothing the HTS surface by Gas Cluster Ion Beam bombardment, followed by annealing in partial pressure of oxygen to regrow the damaged surface layer. A rough HTS surface can be planarized down to a smoothness with a standard deviation of one nanometer or better.Type: ApplicationFiled: June 25, 2001Publication date: January 17, 2002Applicant: Epion CorporationInventors: Wei-Kan Chu, Judy Z. Wu
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Patent number: 6251835Abstract: Planarizing High Temperature Superconductor (HTS) surfaces, especially HTS thin film surfaces is crucial for HTS thin film device processing. Disclosed is a method of surface planarization for HTS film. The method includes first smoothing the HTS surface by Gas Cluster Ion Beam bombardment, followed by annealing in partial pressure of oxygen to regrow the damaged surface layer. A rough HTS surface can be planarized down to a smoothness with a standard deviation of one nanometer or better.Type: GrantFiled: May 6, 1998Date of Patent: June 26, 2001Assignee: Epion CorporationInventors: Wei-Kan Chu, Judy Z. Wu
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Patent number: 6242387Abstract: High temperature superconductor composite thin film devices with easily moved Josephson vortices are described having high Tc and good magnetic vortex properties. A preferred composite material was YBCO/CeO2 thin film on a MgO substrate. The superconductor composites were preferably formed by off-axis co-sputtering. A surprising recovery in properties was seen after plasma etching with oxygen.Type: GrantFiled: November 4, 1998Date of Patent: June 5, 2001Assignee: The United States of America as represented by the Secretary of the NavyInventors: Edward J. Cukauskas, Laura H. Allen
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Patent number: 6066600Abstract: A high temperature superconductor junction and a method of forming the junction are disclosed. The junction 40 comprises a first high-T.sub.c superconductive layer (first base electrode layer) 46 on a substrate 42 and a dielectric layer 48 on the first high-T.sub.c superconductive layer. The dielectric layer and the first high-T.sub.c superconductive layer define a ramp edge 50. A trilayer SNS structure 52 is disposed on the ramp edge to form an SSNS junction. The SNS structure comprises a second high-T.sub.c superconductive layer (second base electrode layer) 54 directly on the first high-T.sub.c superconductive layer, a normal barrier layer 56 on the second high-T.sub.c superconductive layer, and a third high-T.sub.c superconductive layer 58 (counterelectrode) on the barrier layer. The ramp edge is typically formed by photoresist masking and ion-milling. A plasma etch step can be performed in-situ to remove the photoresist layer 62 following formation of the ramp edge.Type: GrantFiled: January 22, 1998Date of Patent: May 23, 2000Assignee: TRW Inc.Inventor: Hugo W. Chan
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Patent number: 5567330Abstract: Electrical interconnect structures comprised of high temperature superconducting signal layers on a substrate bonded to one another or optionally to a base substructure containing power and ground planes and processes for their preparation are disclosed.Type: GrantFiled: October 17, 1994Date of Patent: October 22, 1996Assignee: E. I. Du Pont de Nemours and CompanyInventor: Robert G. Dorothy
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Patent number: 5366953Abstract: A novel method of producing weak-link grain boundary Josephson junctions in high temperature superconducting thin films is disclosed. These junctions are reliably and reproducibly formed on uniform planar substrates (10) by the action of a seed layer (40) placed intermediate the substrate (10) and the superconductor film (20). The superconductor film (22) grown atop the seed (42) is misoriented from the rest of the film (24) by an angle between 5.degree. and 90.degree.. The grain boundary (30) so formed acts as a high quality weak-link junction for superconductor devices. The performance of these junctions can be improved by the addition of buffer layers (50, 60) between the substrate (10) and the superconductor film (20).Type: GrantFiled: December 22, 1993Date of Patent: November 22, 1994Assignee: Conductus, Inc.Inventors: Kookrin Char, Stephen M. Garrison, Nathan Newman, Gregory G. Zaharchuk