Abstract: A system and method for providing battery back-up of SDRAM data upon power failure in which a power-down event is detected early and system hardware configures SDRAM self-refresh circuitry to set the SDRAM to a self refresh mode in which the SDRAM issues a single-refresh command just before system power drops below a safe threshold level and keeps the SDRAM in self-refresh mode after the system power drops by holding low a SDRAM clock enable signal using battery power. One embodiment for use with an external SDRAM controller includes a self-refresh control module (SRCM) and a battery backup module (BBUM). The BBUM includes power-down detection hardware and a battery for backing-up the SDRAM. In response to signals from the external SDRAM controller and the BBUM the self-refresh module generates SDRAM control signals for transitioning the SDRAM smoothly from normal mode to self-refresh mode during power-down events and vice-versa.

Abstract: A method and apparatus for over current backup protection is provided. The method generates a set of root mean square (rms) values from samples that are taken from the system current. Several rms current values are averaged to generate an estimated rms over current value. The estimated over current value is compared with a predetermined threshold value. If the estimated current is above the predetermined threshold value, a fault protection mechanism, such as opening a circuit breaker, is activated. A generator protection unit having digital signal processing capabilities executes the inventive method to provide protection from over current episodes.

Abstract: As a variation of the non-orthogonal filter, a phasor estimate is computed by using an N-point window. An aspect of the sub-window cosine filter is to repeat the basic cosine filter for only selected points of the window. In the end, a least-squares fit is used to obtain an estimate for the phasors components. Previous cosine techniques use a data window whose length is greater than 1 cycle while the present invention requires only 1 cycle.

Abstract: A high sample rate cosine filter eliminates DC components by summing them such that they sum to zero. A non-orthogonal cosine filter is also provided. When the cosine filter is applied for N=4 samples per cycle, the samples are separated by 90 degrees. However, at higher sampling rates, it is not necessary to wait for 90 degrees to estimate the phasor value. Non-orthogonal components are used to estimate the phasor value. The time delay associated with the cosine filter is reduced in the process.

Abstract: The invention herein provides a supervisory circuit which is adapted to monitor an input signal and produce as an output signal, a parametric signal corresponding to the input signal. The circuit includes an input for receiving the input signal, and a stochastic processor coupled to the input for receiving the input signal and processing it to derive a signal that represents a parametric measure of the input signal. An output connected to said stochastic processor provides the parametric output signal as an output for supervisory purposes.

Abstract: An electronic device employed in a system where packets are sent and received between a plurality of electronic devices connected by a bus, with a bias voltage not being outputted to the bus in a first operating mode operated in from when a power supply is thrown until an internal initialization process is complete and a bias voltage is outputted to the bus in a second operating mode operated in after the initialization process is complete so that communication system hang-ups at the time of throwing the power supply can be avoided.

Abstract: A logic controller apparatus for solving ladder logic includes first memory locations for storing representations of the ladder logic and second memory locations for storing a plurality of input and output digital logic signals. A processor employs at least some of the digital logic signals for solving the representations of the ladder logic. A representation of ladder logic power flowing from a power rail to a neutral rail flows in a forward direction from a first port to a second port of at least one of a plurality of ladder functional devices, such as contacts. The contacts are organized in a plurality of rows which include at least one of the contacts. The ladder logic power representation also flows in a reverse direction from the second port to the first port of at least another one of the functional devices.