Including Input/output Or Test Mode Selection Means Patents (Class 702/120)
  • Patent number: 11954475
    Abstract: A system, method, and server for optimizing deployment of a containerized application. The system includes a machine and a server configured to receive optimization criteria related to the containerized application, the optimization criteria including affecting parameters, effected metrics, and stopping criteria. The server is further configured to transmit at least one value of the affecting parameter to the machine, receive results of a trial of the containerized application performed by the machine according to the transmitted at least one value, the results of the trial including an empirical value of the effected metrics, update an optimization model based on the trial results, compare the results of the trial and the updated optimization model to the one or more stopping criteria, and transmit an optimized one of the at least one value of the affecting parameters to the machine for deployment of the containerized application.
    Type: Grant
    Filed: January 15, 2021
    Date of Patent: April 9, 2024
    Assignee: Gram Labs, Inc.
    Inventors: Jeremy Gustie, James Hochadel, Ofer Idan, Thibaut Perol, John Platt
  • Patent number: 11940490
    Abstract: The disclosure provides a method and apparatus of interleaved on-chip testing. The method merges a test setup for analog components with a test setup for digital components and then interleaves the execution of the digital components with the analog components. This provides concurrency via a unified mode of operation. The apparatus includes a system-on-chip test access port (SoC TAP) in communication with a memory test access port (MTAP). A built-in self-test (BIST) controller communicates with the MTAP, a physical layer, and a memory. A multiplexer is in communication with the memory and a phase locked loop (PLL) through an AND gate.
    Type: Grant
    Filed: November 18, 2022
    Date of Patent: March 26, 2024
    Assignee: QUALCOMM Incorporated
    Inventor: Praveen Raghuraman
  • Patent number: 11913987
    Abstract: An embodiment is an automated test equipment (ATE) for testing a device under test (DUT) which is connected to the ATE via a load board. The ATE comprises a stimulus module, a measurement module, a loopback, a first switch, a second switch, and a load board interface. The load board interface comprises a first radio frequency port and a second radio frequency port. The first and second radio frequency ports are configured to be coupled to the respective ports of the load board. The first switch is configured to couple the first radio frequency port to the stimulus module in a first switching state of the first switch and the second switch is configured to couple the second radio frequency port to the measurement module in a first switching state of the second switch.
    Type: Grant
    Filed: April 14, 2022
    Date of Patent: February 27, 2024
    Assignee: Advantest Corporation
    Inventor: Andreas Hantsch
  • Patent number: 11880254
    Abstract: A power supply system of the present disclosure includes: a plurality of output terminals, configured to output an output voltage; a group setting circuit, configured to group the plurality of output terminals; an anomaly detection circuit, configured to detect anomaly; and a control circuit, configured to stop an output from the output terminals belonging to groups in which an anomaly is detected by the anomaly detection circuit, and maintain an output from the output terminals belonging to groups in which an anomaly is not detected by the anomaly detection circuit.
    Type: Grant
    Filed: March 15, 2022
    Date of Patent: January 23, 2024
    Assignee: Rohm Co., Ltd.
    Inventor: Takumi Yamada
  • Patent number: 11867760
    Abstract: The present application provides a parameter setting method and apparatus, a system, and a storage medium. The parameter setting method includes: obtaining first setting values of multiple memory parameters and storage locations of the multiple memory parameters in a non-volatile memory; generating a first parameter setting instruction according to the first setting value and the storage location of each memory parameter; and sending the first parameter setting instruction to a test device, so that the test device sets the memory parameter stored at the storage location in the non-volatile memory as the first setting value.
    Type: Grant
    Filed: June 17, 2021
    Date of Patent: January 9, 2024
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Hao He
  • Patent number: 11749319
    Abstract: An integrated circuit (IC) chip includes a plurality of interlayer channels; at least one data pad; an identification (ID) generation circuit suitable for generating a chip ID signal by decoding a command/address signal; a first transmission circuit suitable for transferring a plurality of internal data pieces to a transmission path by aligning a plurality of interlayer data pieces respectively transferred from the plurality of interlayer channels according to a plurality of strobe signals while selectively inverting the plurality of interlayer data pieces according to the chip ID signal; and a second transmission circuit suitable for transferring the plurality of internal data pieces from the transmission path to the at least one data pad.
    Type: Grant
    Filed: March 14, 2022
    Date of Patent: September 5, 2023
    Assignee: SK hynix Inc.
    Inventors: Chang Kwon Lee, Ji Hwan Kim
  • Patent number: 11669545
    Abstract: Systems, apparatus, and methods for any point in time replication to the cloud. Data is replicated by replicating data to a remote storage or a data bucket in the cloud. At the same time, a metadata stream is generated and stored. The metadata stream establishes a relationship between the data and offsets of the data in the production volume. This allows continuous replication without having to maintain a replica volume. The replica volume can be generated during a rehydration operation that uses the metadata stream to construct the production volume from the cloud data.
    Type: Grant
    Filed: November 30, 2020
    Date of Patent: June 6, 2023
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Jehuda Shemer, Kfir Wolfson, Itay Azaria
  • Patent number: 11599438
    Abstract: A system, method, and computer program are provided for combining results of event processing received from a plurality of virtual processes or servers. In use, an event is sent to a plurality of virtual processes or virtual servers. Further, a result of processing of the event is received from each of the virtual processes or virtual servers. In addition, the results received from the plurality of virtual processes or virtual servers are combined.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: March 7, 2023
    Assignee: AMDOCS DEVELOPMENT LIMITED
    Inventor: Omer Shani
  • Patent number: 11409701
    Abstract: Disclosed herein are computer-implemented method, system, and computer-program product (computer-readable storage medium) embodiments for efficiently processing configurable criteria. An embodiment includes at least one computer processor configured to receive a first configuration corresponding to a plurality of attributes, access a data set of one or more items, and compute a first key based at least in part on the first configuration. In a further embodiment, the at least one computer processor may be configured to populate a first set of selected items based at least in part on the first key, and may further be further configured to output the first set of selected items. The first key may uniquely correspond to the first configuration, and the first set of selected items may include any item, of the data set of one or more items, selected based at least in part on the first key, according to some embodiments.
    Type: Grant
    Filed: August 7, 2019
    Date of Patent: August 9, 2022
    Assignee: SAP SE
    Inventors: Snigdhaman Chatterjee, Shivaprasad Kodlipet Chandrashekhar, Hemanth Rajeswari Anantha, Debashis Banerjee, Hari Babu Krishnan
  • Patent number: 11307226
    Abstract: The present invention provides a method for monitoring electrical power in high-speed rail traction power supply networks/systems, comprising: collecting voltage and current analog signals from a traction power supply system, and converting the voltage and current analog signals into voltage and current digital signals; obtaining, by a processing unit, digital signals and transfer commands; compressing, by the processing unit, the digital signals according to the transfer commands to digital signal frames; and constructing a data link between the processing unit and a storage unit and transmitting the compressed digital signal frame to the storage unit. The processing unit may use run-length coding algorithm to compress the digital signal to be stored to obtain several compressed digital signal frames. Under different conditions of data link, transmission of compressed digital signal frames is adjustable to improve the reliability of digital signal transmission.
    Type: Grant
    Filed: December 8, 2019
    Date of Patent: April 19, 2022
    Assignee: Nanjing Institute of Railway Technology
    Inventors: Qihou Song, Honggao Feng, Baichuan Xu
  • Patent number: 11280821
    Abstract: The disclosed exemplary apparatuses, systems and methods provide at least a compact anechoic chamber for over-the-air antenna testing, which may include at least: a chamber housing; an interchangeable irradiating test panel, integral to the chamber; a plurality of absorbing material at least partially lining an interior of the chamber and capable of directing the irradiating; at least one moveable cart suitable for moving and removing the antenna within and from the chamber; and at least one panel interface for interconnecting the antenna and equipment for the testing, wherein a response of the antenna to the irradiating is communicated through the panel interface to the testing equipment.
    Type: Grant
    Filed: March 22, 2019
    Date of Patent: March 22, 2022
    Assignee: JABIL INC.
    Inventors: Lin Lin, Kevin Loughran, Jason A. Wildt
  • Patent number: 11182274
    Abstract: A test apparatus for performing a test on a device under test includes a data storage unit being configured to store sets of input data applied to the device under test during the test and to store the respective output data of the device under test, the output data being obtained from the device under test as a response to the input data including values of setting variables related to settings of the device under test and values of input variables including further information, each set of input data representing one test case; and a data processor configured to process the data stored in the data storage unit such that a best combination of setting variables of the device under test is determined for one or more combinations of the input variables to obtain an optimized setting of the device under test for the one or more combinations of the input variables.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: November 23, 2021
    Assignee: Advantest Corporation
    Inventor: Jochen Rivoir
  • Patent number: 11166651
    Abstract: A measuring arrangement for in-vivo determination of the lactate concentration in blood by means of electrochemical impedance spectroscopy, comprising a substantially flat shaped probe having a longitudinal extension, a transverse extension and a thickness, wherein the longitudinal extension and the transverse extension of the probe are each a multiple of the thickness of the probe, an analyzer circuitry connected to the probe, and communication means connected to the analyzer circuitry for transferring data via a WPAN, wherein the substantially flat shaped probe is arranged at an edge of the measuring arrangement, so that the probe, during operation of the measuring arrangement, faces the animal or human body to be examined, in such a manner that the probe is arranged with its longitudinal and transverse extensions approximately parallel to the surface of the body to be examined, a wristband therefor, and a method for the operation thereof.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: November 9, 2021
    Assignee: KIMAL SENSORS LTD.
    Inventors: Hendrik Dietrich, Raymond Glocker, Steve Minett, Alan Press
  • Patent number: 11105762
    Abstract: A measurement system may include a set of drive electrical contacts including a force electrical contact and a return electrical contact electrically coupled to a tested material, a measurement electrical contact electrically coupled to the tested material, a return node, a voltage source, and a control module. A circuit path between the voltage source and the return node may include a fixed resistor and the tested material. The control module may be configured to cause the voltage source to apply a voltage signal to the force electrical contact, cause a voltage drop across the fixed resistor to be measured, cause a measured voltage to be measured using the measurement electrical contact, determine a measured equivalent impedance of the tested material associated with the measurement electrical contact based on the voltage drop across the fixed resistor and the measured voltage, and determine whether the tested material includes a crack or other defect based on the measured equivalent impedance.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: August 31, 2021
    Assignee: 3M INNOVATIVE PROPERTIES COMPANY
    Inventors: Christopher R. Yungers, Subhalakshmi M. Falknor, David H. Redinger
  • Patent number: 11105851
    Abstract: A microcontroller comprises a plurality of digital peripheral blocks and a direct memory access (DMA) controller coupled thereto. The plurality of digital peripheral blocks includes a digital peripheral block that is configured to issue a DMA request. Upon receipt of the DMA request, the DMA controller is configured to retrieve configuration information and to write the configuration information to a configuration register associated with a circuit element of the microcontroller.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: August 31, 2021
    Assignee: Cypress Semiconductor Corporation
    Inventors: Harold Kutz, Timothy John Williams, Bert Sullam, Warren S. Snyder, James H. Shutt, Bruce E. Byrkett, Monte Mar, Eashwar Thiagarajan, Nathan Wayne Kohagen, David G. Wright, Mark E Hastings, Dennis R. Seguine
  • Patent number: 11074163
    Abstract: A method for generating a new test for a set of software code is provided. The method includes accessing a plurality of existing unit tests; implementing a machine learning algorithm; determining intended objectives of the set of software code; selecting a subset of the plurality of existing unit tests based on the determined objectives and an output of the machine learning algorithm; and using the selected unit tests to automatically generate the new test.
    Type: Grant
    Filed: November 5, 2019
    Date of Patent: July 27, 2021
    Assignee: JPMORGAN CHASE BANK, N.A.
    Inventors: Derek Ferguson, Xiangyang Wang, Klaudia Dziewulski, Luisa Garcia O'Toole, Karl T. Blatter, Laura Schornack, Shreyas Byndoor, August Gress, Sheev Modi, Benjamin Vonderheide, Rongzi Wang, Jiamin Zhu
  • Patent number: 11048618
    Abstract: Examples of techniques for environment modification for software application testing are described herein. An aspect includes, based on starting testing of an application under test using a test case in a testing environment and determining that modification of the testing environment is enabled, modifying the testing environment. Another aspect includes running the testing of the application under test using the test case in the modified testing environment. Another aspect includes, based on detection of an error during the testing of the application under test, determining whether the error was caused by the modified testing environment. Another aspect includes, based on determining that the error was caused by the modified testing environment, suppressing the error and continuing the testing of the application under test in the modified testing environment. Another aspect includes, based on determining that the error was not caused by the modified testing environment, percolating the error.
    Type: Grant
    Filed: March 11, 2019
    Date of Patent: June 29, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Steven Partlow, Joseph Griesemer, Robert Miller, Jr.
  • Patent number: 11036458
    Abstract: An electronic device determines that an application has been launched for which screencasting is available. In response, the device displays a screencast control panel. A user inputs an instruction to begin screencasting via the control panel. In response to this instruction, the electronic device screencasts media content including content created by the application.
    Type: Grant
    Filed: October 14, 2016
    Date of Patent: June 15, 2021
    Assignee: Google LLC
    Inventors: Brian Schmidt, Frank Petterson, Jason Robert Sao Bento, Barbara Macdonald
  • Patent number: 10928885
    Abstract: Power reduction and voltage adjustment techniques for computing systems and processing devices are presented herein. In one example, a method includes executing a voltage characterization service for a processing device of a computing apparatus to determine at least one supply voltage for the processing device, the voltage characterization service comprising a functional test that exercises the processing device at iteratively adjusted voltages in context with associated system elements of the computing apparatus. During execution of the voltage characterization service, the method includes monitoring for operational failures of at least the processing device, and responsive to the operational failures, determining at least one resultant supply voltage.
    Type: Grant
    Filed: January 28, 2019
    Date of Patent: February 23, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: William Paul Hovis, Garrett Douglas Blankenburg, Peter Anthony Atkinson, Robert James Ray, Andres Felipe Hernandez Mojica, Samy Boshra-Riad, Erng-Sing Wee, Brian Keith Langendorf
  • Patent number: 10694402
    Abstract: Image data of a node with which an orchestration module is associated is received. The node is an electronic device and the image data of the node is received in a language associated with the node. The image data of the node with which the orchestration module is associated is translated into a meta-language associated with an orchestrator network comprising the orchestration module and one or more other orchestration modules associated one or more corresponding nodes. A scope of information to provide from the orchestration module to the one or more other orchestration modules associated with one or more corresponding nodes is determined. The determined information is communicated to the one or more other orchestration modules in the meta-language understood by the orchestration module and the one or more other orchestration modules associated with one or more corresponding nodes.
    Type: Grant
    Filed: June 14, 2018
    Date of Patent: June 23, 2020
    Inventor: Mark Cummings
  • Patent number: 10671516
    Abstract: A method, device, and computer program product for testing code. The method includes identifying a plurality of test points in the code and a plurality of test values to be assigned to the plurality of test points. At least one of the plurality of test points is to be assigned with two or more test values. The method also includes comparing a target test case with a set of test cases. The target test case and the set of test cases are associated with the plurality of test points. The method further includes, in response to determining that each of combinations of the test values assigned to at least two of the plurality of test points in the target test case is present in the set of test cases, excluding the target test case from the set of test cases.
    Type: Grant
    Filed: March 21, 2017
    Date of Patent: June 2, 2020
    Assignee: EMP IP Holding Company LLC
    Inventors: Xiongfang Nie, Derek Quanhong Wang, Xiaoqiang Zhou
  • Patent number: 10673723
    Abstract: A dynamically reconfigurable interface for an automatic test equipment is disclosed where one or more synthetic instruments transmit the high speed signals as well as receive the high speed signals from a device under test so that testing can be performed at speeds higher than the ATE was originally designed to accommodate. Synthetic instruments are implemented on a field programmable gate array (FPGA) that operate at higher speeds than COTS instruments and can reach the frequencies that high speed I/O buses use. SIs can be created by configuring the FPGA, with different configurations creating different SIs. A single FPGA can house a number of SIs.
    Type: Grant
    Filed: January 9, 2018
    Date of Patent: June 2, 2020
    Assignee: A.T.E. SOLUTIONS, INC.
    Inventors: Louis Yehuda Ungar, Tak Ming Mak, Neil Glenn Jacobson
  • Patent number: 10651647
    Abstract: A bypass mechanism for a photovoltaic module which switches out the electronics and switches in a bypass mechanism.
    Type: Grant
    Filed: October 2, 2017
    Date of Patent: May 12, 2020
    Assignee: Solaredge Technologies Ltd.
    Inventors: Meir Gazit, Israel Gershman, Ehud Kirmayer, Leon Kupershmidt, Meir Adest
  • Patent number: 10592618
    Abstract: Parameters of a structure (900) are measured by reconstruction from observed diffracted radiation. The method includes the steps: (a) defining a structure model to represent the structure in a two- or three-dimensional model space; (b) using the structure model to simulate interaction of radiation with the structure; and (c) repeating step (b) while varying parameters of the structure model. The structure model is divided into a series of slices (a-f) along at least a first dimension (Z) of the model space. By the division into slices, a sloping face (904, 906) of at least one sub-structure is approximated by a series of steps (904?, 906?) along at least a second dimension of the model space (X). The number of slices may vary dynamically as the parameters vary. The number of steps approximating said sloping face is maintained constant. Additional cuts (1302, 1304) are introduced, without introducing corresponding steps.
    Type: Grant
    Filed: July 13, 2016
    Date of Patent: March 17, 2020
    Assignee: ASML Netherlands B.V.
    Inventors: Remco Dirks, Markus Gerardus Martinus Maria Van Kraaij, Maxim Pisarenco
  • Patent number: 10565059
    Abstract: A journal optimizer in a computer database system with an adaptive journal mechanism. The adaptive journal mechanism dynamically adjusts adaptive parameters of the journal optimizer to optimize the journal based on one or more journal conditions to more efficiently utilize system resources. The adaptive parameters used to adapt the optimization include aggressiveness parameters and the location of the optimizer, where the aggressiveness parameters specify the intensity of optimization of the journal by the journal optimizer. For example, the adaptive journal mechanism may dynamically adjust an adaptive parameter of the optimizer to increase optimization of the journal when the resource utilization indicates the resources are underutilized and decrease optimization of the journal when the resource utilization indicates resources are strained.
    Type: Grant
    Filed: October 26, 2015
    Date of Patent: February 18, 2020
    Assignee: International Business Machines Corporation
    Inventors: Rafal P. Konik, Roger A. Mittelstadt, Brian R. Muras, Chad A. Olstad
  • Patent number: 10509073
    Abstract: Disclosed herein are exemplary methods, apparatus, and systems for performing timing-aware automatic test pattern generation (ATPG) that can be used, for example, to improve the quality of a test set generated for detecting delay defects or holding time defects. In certain embodiments, timing information derived from various sources (e.g. from Standard Delay Format (SDF) files) is integrated into an ATPG tool. The timing information can be used to guide the test generator to detect the faults through certain paths (e.g., paths having a selected length, or range of lengths, such as the longest or shortest paths). To avoid propagating the faults through similar paths repeatedly, a weighted random method can be used to improve the path coverage during test generation. Experimental results show that significant test quality improvement can be achieved when applying embodiments of timing-aware ATPG to industrial designs.
    Type: Grant
    Filed: July 31, 2017
    Date of Patent: December 17, 2019
    Assignee: Mentor Graphics Corporation
    Inventors: Xijiang Lin, Kun-Han Tsai, Mark Kassab, Chen Wang, Janusz Rajski
  • Patent number: 10445763
    Abstract: Methods and apparatus for implementing forward looking optimizing promotions by administering, in large numbers and iteratively, test promotions formulated using highly granular test variables on purposefully segmented subpopulations. The plurality of test promotions are automatically proposed. The responses from individuals in the subpopulations are received and analyzed. The analysis result is employed to subsequently formulate a general public promotion.
    Type: Grant
    Filed: March 31, 2014
    Date of Patent: October 15, 2019
    Assignee: EVERSIGHT, INC.
    Inventors: David Moran, Michael Montero
  • Patent number: 10438231
    Abstract: Methods and apparatus for implementing forward looking optimizing promotions by administering, in large numbers and iteratively, test promotions formulated using highly granular test variables on segmented subpopulations, whereby the test promotions are automatically generated. The responses from individuals in the subpopulations are received and analyzed. The analysis result is employed to subsequently formulate a general public promotion.
    Type: Grant
    Filed: March 31, 2014
    Date of Patent: October 8, 2019
    Assignee: EVERSIGHT, INC.
    Inventors: David Moran, Mark Wilson
  • Patent number: 10438230
    Abstract: Methods and apparatus for implementing forward looking optimizing promotions by administering, in large numbers and iteratively, test promotions automatically formulated using highly granular test variables on subpopulations. The responses from individuals in the subpopulations are received and analyzed. The analysis result is employed to subsequently formulate a general public promotion.
    Type: Grant
    Filed: March 31, 2014
    Date of Patent: October 8, 2019
    Assignee: EVERSIGHT, INC.
    Inventors: David Moran, Michael Montero
  • Patent number: 10425273
    Abstract: A data processing system comprises: at least one each of a plurality of types of data processing module conducting different types of the data processing; data flows through which a series of different types of data processing is conducted on a message and a message subjected to the series of different types of data processing is sent to the destination; and a dispatcher distributes the message and a message subjected to the data processing by the data processing module to a subsequent data processing module, wherein the dispatcher conducts: detecting a specific data processing module in a specific status of being a bottleneck; determining the number of the specific data processing module to resolve the specific status by increasing the number of the specific data processing module; and setting the number of the specific data processing module to the number to resolve the specific status.
    Type: Grant
    Filed: September 3, 2015
    Date of Patent: September 24, 2019
    Assignee: Hitachi, Ltd.
    Inventors: Masafumi Kinoshita, Tatsuhiko Miyata
  • Patent number: 10423808
    Abstract: An analog circuit design is described that solves Linear Programming (LP) or Quadratic Programming (QP) problems.
    Type: Grant
    Filed: July 28, 2015
    Date of Patent: September 24, 2019
    Assignee: THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
    Inventors: Sergey Vichik, Francesco Borrelli
  • Patent number: 10409629
    Abstract: A computer program product, system, and method for generating coded fragments comprises determining a set of available data protection plans; determining one or more parameters associated with a customer, a host, or a data protection system; generating a recommended host protection configuration for the host using the parameters, wherein the recommended host protection configuration includes one or more of the available data protection plans; and assigning the recommended host protection configuration to the host.
    Type: Grant
    Filed: September 26, 2016
    Date of Patent: September 10, 2019
    Assignee: EMC IP HOLDING COMPANY LLC
    Inventors: Assaf Natanzon, Saar Cohen, Matan Gilat, Amit Lieberman, Jehuda Shemer, Ravi V. Chitloor, Yossef Saad, Prasanna Malaiyandi, Naveen Rastogi
  • Patent number: 10393786
    Abstract: A test system for over the air (OTA) measurements of transceiver performance metrics of a device under test is provided. The test system comprises a device under test (DUT), at least one positioning device, at least one measurement antenna, and at least one measuring/control processor. The at least one measurement antenna is configured to establish a data link to the DUT and to transmit/receive test data to/from the DUT via the data link. The at least one positioning device is configured to adjust the position of the at least one measurement antenna around the DUT to specific measurement points, wherein the specific measurement points are distributed randomly around the DUT.
    Type: Grant
    Filed: December 15, 2017
    Date of Patent: August 27, 2019
    Assignee: Rohde & Schwarz GmbH & Co. KG
    Inventor: Heinz Mellein
  • Patent number: 10326434
    Abstract: In various embodiments, an electronic component is provided. The electronic component may include a supply bus configured to provide a supply voltage for an electronic circuit. The electronic component may further include a voltage-controlled oscillator, which is coupled to the supply bus and is configured to generate a clock signal with a clock frequency according to the supply voltage. The electronic component may further include at least one reference oscillator, which is configured to generate a reference clock signal with a reference clock frequency, and a comparator, which is coupled to the voltage-controlled oscillator and the at least one reference oscillator and is configured to compare the clock signal with the reference clock signal and, on the basis of the comparison, either to output the clock signal to the electronic circuit or to suppress it.
    Type: Grant
    Filed: December 22, 2017
    Date of Patent: June 18, 2019
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Walter Kargl, Albert Missoni
  • Patent number: 10243729
    Abstract: In a general aspect, a test method can include acquiring a plurality of value sets, each including values of a physical quantity or of logic signals, linked to the activity of a circuit to be tested when executing distinct cryptographic operations applied to a same secret data, for each value set, counting occurrence numbers of the values of the set, for each operation and each of the possible values of a part of the secret data, computing a partial result of operation, computing sums of occurrence numbers, each sum being obtained by adding the occurrence numbers corresponding to the operations which when applied to a same possible value of the part of the secret data, provide a partial operation result having a same value, and analyzing the sums of occurrence numbers to determine the part of the secret data.
    Type: Grant
    Filed: February 22, 2017
    Date of Patent: March 26, 2019
    Assignee: ESHARD
    Inventor: Hugues Thiebeauld De La Crouee
  • Patent number: 10140629
    Abstract: Methods and apparatus for implementing forward looking optimizing promotions by administering, in large numbers and iteratively, test promotions formulated using highly granular test variables on purposefully segmented subpopulations. The plurality of test promotions are associated with at least one behavioral economics principles. The responses from individuals in the subpopulations are received and analyzed. The analysis result is employed to subsequently formulate a general public promotion.
    Type: Grant
    Filed: March 31, 2014
    Date of Patent: November 27, 2018
    Assignee: Eversight, Inc.
    Inventors: David Moran, Michael Montero
  • Patent number: 10050618
    Abstract: A signal management circuit includes a first input terminal to receive a first signal. A first logic portion is coupled to the first input terminal and configured to provide a first output signal. A second logic portion is coupled to receive a second signal and configured to provide a second output signal. The second signal is based on the first output signal and the first signal. An output terminal is coupled to provide a third output signal based on the first output signal and the second output signal.
    Type: Grant
    Filed: April 13, 2017
    Date of Patent: August 14, 2018
    Assignee: NXP USA, INC.
    Inventor: Adam Jerome White
  • Patent number: 10037264
    Abstract: Disclosed is a method and system for classifying test cases. In one implementation, the method comprises creating a test step master list comprising a plurality of test case, one more test step associated with the plurality of test case, and a test step identification number associated with the one more test step. Further, the method comprises generating a sequence diagram for each of the plurality of test cases based on the test step master list. Furthermore, the method comprises classifying, by the processor, each of the plurality of test cases in to an independent test case or an asynchronous test case or a synchronous test case based on the sequence diagram.
    Type: Grant
    Filed: March 8, 2016
    Date of Patent: July 31, 2018
    Assignee: HCL TECHNOLOGIES LTD.
    Inventors: Simy Chacko, Satya Sai Prakash Kanakadandi, S U M Prasad Dhanyamraju
  • Patent number: 10037785
    Abstract: Examples include apparatuses and methods related to scan chain operation in sensing circuitry. A number of embodiments include an apparatus comprising an array of memory cells coupled to sensing circuitry having a sense amplifier and a compute component, the sensing circuitry to receive a scan vector and perform a scan chain operation on the scan vector.
    Type: Grant
    Filed: July 8, 2016
    Date of Patent: July 31, 2018
    Assignee: Micron Technology, Inc.
    Inventors: Joshua E. Alzheimer, Debra M. Bell
  • Patent number: 9984387
    Abstract: Methods and apparatus for implementing forward looking optimizing promotions by administering, in large numbers and iteratively, test promotions formulated using highly granular test variables on purposefully segmented subpopulations. The responses from individuals in the subpopulations are received and analyzed. The analysis result is employed to subsequently formulate a general public promotion. The test promotions may be repeated continually and iteratively with different test promotions and/or different subpopulations to continue to uncover advantageous correlations between segmentation criteria, test promotion variables, and consumer response and/or to keep up with consumer changing taste.
    Type: Grant
    Filed: March 13, 2014
    Date of Patent: May 29, 2018
    Assignee: Eversight, Inc.
    Inventor: David Moran
  • Patent number: 9939463
    Abstract: A test circuit includes a pull-up device, a pull-down device, a switch circuit and a voltage-setting unit. The pull-up device is used to receive a first control signal and coupled to a first end of the device-under-test. The pull-down device is used to receive a second control signal and coupled to the first end of the device-under-test. The switch unit is controlled by a switch signal, used to receive a testing signal and coupled to a second end of the device-under-test. The voltage-setting unit is controlled by a third control signal, used to pull the second end of the device-under-test to a predetermined voltage.
    Type: Grant
    Filed: April 6, 2016
    Date of Patent: April 10, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventor: Po-Wei Tsou
  • Patent number: 9940639
    Abstract: Methods and apparatus for implementing forward looking optimizing promotions by administering, in large numbers and iteratively, test promotions formulated using highly granular test variables and automatically incorporating constraints on segmented subpopulations. The responses from individuals in the subpopulations are received and analyzed. The analysis result is employed to subsequently formulate a general public promotion.
    Type: Grant
    Filed: March 31, 2014
    Date of Patent: April 10, 2018
    Assignee: Eversight, Inc.
    Inventors: David Moran, Michael Montero
  • Patent number: 9940640
    Abstract: Methods and apparatus for implementing forward looking optimizing promotions by administering, in large numbers and iteratively, test promotions formulated using highly granular test variables on purposefully segmented subpopulations. The plurality of test promotions automatically account for covariates. The responses from individuals in the subpopulations are received and analyzed. The analysis result is employed to subsequently formulate general public promotion.
    Type: Grant
    Filed: March 31, 2014
    Date of Patent: April 10, 2018
    Assignee: Eversight, Inc.
    Inventors: David Moran, Michael Montero
  • Patent number: 9889270
    Abstract: A method of controlling relaxation equipment is a method of controlling relaxation equipment capable of changing a biological value of a user. The method includes: obtaining a user model including a transition in biological value within a period from a start time to an end time of a program being viewed by the user; obtaining a first biological value of the user viewing the program; and controlling the relaxation equipment such that the biological value of the user at the end time approximates a second biological value included in the user model, which is a value at the end time, based on the first biological value and the second biological value.
    Type: Grant
    Filed: September 13, 2013
    Date of Patent: February 13, 2018
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventors: Kentaro Nakai, Koichi Kusukame
  • Patent number: 9798629
    Abstract: Exemplary methods for predicting backup and restore failure include analyzing, at a management server, resource utilization statistics periodically collected during backup of data from a source storage system to a target storage system. In one embodiment, the methods include creating a predictive model based on the analysis of the collected resource utilization statistics. In one embodiment, the method includes predicting, using the predictive model, whether a backup time or a restore time of future backup will exceed a backup time threshold or restore time threshold, respectively.
    Type: Grant
    Filed: December 16, 2013
    Date of Patent: October 24, 2017
    Assignee: EMC IP Holding Company LLC
    Inventors: Philip Shilane, Grant Wallace
  • Patent number: 9783138
    Abstract: In a vehicle control device in which a driver circuit which does not have a computing function and a computing device communicate with each other, there is provided a technology which can efficiently diagnose that both the driver circuit and the computing device normally communicate with each other by a simple technique. The vehicle control device according to the present invention transmits diagnosis data as a control command from a computing portion to the driver circuit, and the driver circuit sends inverted diagnosis data in which the diagnosis data is bit-inverted back to the computing portion. The computing portion diagnoses whether or not the communication between the computing portion and the driver circuit is normally performed, by using the diagnosis data and the inverted diagnosis data.
    Type: Grant
    Filed: January 31, 2014
    Date of Patent: October 10, 2017
    Assignee: Hitachi Automotive Systems, Ltd.
    Inventors: Shinichiro Yoneoka, Yasuhiko Okada, Chihiro Sato, Koji Yuasa, Masahiro Toyohara, Yasushi Sugiyama
  • Patent number: 9772918
    Abstract: A method for connecting an input/output interface of a testing device equipped for testing a control unit to a model of a technical system present in the testing device. The interface connects the control unit to be tested or connects a technical system to be controlled; the model to be connected to the input/output interface is a model of the technical system to be controlled or a model of the control unit to be tested. The testing device has a plurality of input/output functions connected to the model and provides an interface hierarchy structure and a function hierarchy structure. The method has an automatic configuration of compatible connections between the interface hierarchy structure and the function hierarchy structure so that the model present in the testing device communicates through the compatible connections with the control unit to be tested or the technical system to be controlled.
    Type: Grant
    Filed: September 1, 2015
    Date of Patent: September 26, 2017
    Assignee: dSPACE digital signal processing and control engineering GmbH
    Inventor: Marc Tegethoff
  • Patent number: 9698799
    Abstract: A phase locked loop frequency calibration circuit and a method are provided. The circuit includes a timer, a counter, a control module, a frequency divider and a voltage controlled oscillator; output of voltage controlled oscillator is connected with first input of frequency divider, output of frequency divider is connected with first input of counter, second input of frequency divider, first input of timer and second input of counter are respectively connected with first output of control module, third input of counter is connected with output of timer, output of counter is connected with first input of control module, a reference clock signal is respectively sent to second input of timer and second input of control module, the number of clocks used by frequency divider to perform frequency division on output clock signal of voltage controlled oscillator is sent to third input of control module.
    Type: Grant
    Filed: June 23, 2016
    Date of Patent: July 4, 2017
    Assignee: SHANGHAI EASTSOFT MICROELECTRONICS CO., LTD.
    Inventors: Ruijin Liu, Xu Zhang, Jingjing Tao, Jiejie Lv
  • Patent number: 9569204
    Abstract: Systems and methods of end-to-end continuous integration and verification of software are described. A system comprises, for example, a provisioning service module configure to automatically retrieve source code from a source code management system. The provisioning service module further generates one or more environments. A propagation management module is configured to package the retrieved source code into a deliverable and to automatically propagate the deliverable through a pipeline comprising the one or more environments.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: February 14, 2017
    Assignee: eBay Inc.
    Inventors: Steve Farris Mansour, Todd Paul
  • Patent number: 9483385
    Abstract: To provide a technique for generating, at a high speed, a smaller-sized set that satisfies an intended property such as, for example, being pair-wise, and includes many test cases that match a set of existing test cases given as an input, candidates to be used from a set of existing input test cases are determined in the following manner: for some parameters, values to be held by test case candidates are determined; test cases having the determined values, among those included in the set of input test cases, are selected as the candidates. A test case having the highest score among one or more test case candidates generated with the method of the related art and one or more test case candidates selected from the set of input test cases is added to a set of output test cases.
    Type: Grant
    Filed: March 1, 2012
    Date of Patent: November 1, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Ken Mizuno, Taiga Nakamura, Hironori Takeuchi