Compatibility Emulation Patents (Class 703/27)
  • Patent number: 11687338
    Abstract: The technology disclosed herein provides a method including determining one or more dedicated computations storage programs (CSPs) used in a target market for a computational storage device, storing the dedicated CSPs in one or more pre-programmed computing instruction set (CIS) slots in the computational storage device, translating one or more instructions of the dedicated CSPs for processing using a native processor, loading one or more instructions of programmable CSPs to a CSP processor implemented within an application specific integrated circuit (ASIC) of the computational storage device, and processing the one or more instructions of the programmable CSPs using the CSP processor.
    Type: Grant
    Filed: April 30, 2021
    Date of Patent: June 27, 2023
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventor: Marc Tim Jones
  • Patent number: 11681812
    Abstract: A first device governs operation of a second device based on a network security risk posed by the second device. The second device is disposed locally to the first device and in local network communication with the first device. The first device is in network communication with a cloud-based computational service.
    Type: Grant
    Filed: April 26, 2022
    Date of Patent: June 20, 2023
    Assignee: Palo Alto Networks, Inc.
    Inventors: Gong Cheng, Mayuresh Ektare, Mei Wang
  • Patent number: 11650804
    Abstract: A method of validating a desired image of a virtualization software and a firmware package to be installed in a host against a hardware compatibility list (HCL) includes: acquiring a bill of materials for the host that lists hardware devices of the host; for each of the hardware devices, searching for firmware and a driver thereof in the HCL; for each driver included in the desired image that corresponds to one of the hardware devices, determining whether or not the driver is compatible according to the HCL; for each firmware included in the firmware package that corresponds to one of the hardware devices, determining whether or not the firmware is compatible according to the HCL; and validating the desired image of the virtualization software and the firmware package to be installed in the host if each of the hardware devices has a compatible driver and a compatible firmware.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: May 16, 2023
    Assignee: VMware, Inc.
    Inventors: Anjaneya Prasad Gondi, Mukund Gunti, Alok Kumar Sinha, Nikitha Kandru, Yuedong Mu, Aravinda Haryadi
  • Patent number: 11645934
    Abstract: A computer-implemented method according to various aspects of the present disclosure includes modifying a lesson module, by a computer system. The modifying the lesson module includes generating an activity. The activity includes a coding puzzle and a puzzle runner mode. The method also includes, in the puzzle runner mode, displaying an indication that the coding puzzle is solved after the coding puzzle is solved and displaying a code runtime area showing a step-by-step execution of manipulated code of the lesson module.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: May 9, 2023
    Assignee: NEURON FUEL, INC.
    Inventors: Kelvin Voon-Kit Chong, Srinivas A. Mandyam, Vidya S. Mandyam, Krishna Vedati
  • Patent number: 11586596
    Abstract: Data cataloging has become a necessity for empowering organizations with analytical ability. Conventional cataloging systems may fail to provide proper visualization of data to the different stakeholders of an organization. The present disclosure provides a hierarchical dynamic cataloging system so that visualization of data at different levels would be possible for different stake holders. In the present disclosure, a hierarchical structure of algorithms and multiple stake holders along with relevant metadata is generated. Further, a catalog is generated by performing a mapping across components comprised in the hierarchical structure and identifying relationship across the components based on mapping. The catalog gets dynamically updated and provides a dynamic view of the algorithms and associated metadata to the multiple stakeholders of an organization.
    Type: Grant
    Filed: October 9, 2019
    Date of Patent: February 21, 2023
    Assignee: TATA CONSULTANCY SERVICES LIMITED
    Inventors: Satanik Panda, Dibyendu Biswas, Hemanta Dutta, Tanushyam Chattopadhyay, Prateep Misra
  • Patent number: 11585667
    Abstract: Systems and methods described herein relate to simulating edge-computing deployment in diverse terrains. One embodiment receives a layer-selection input specifying which layers among a plurality of layers in a simulation model of an edge-computing deployment are to be included in a simulation experiment; receives a set of input parameters for each of the layers specified by the layer-selection input, the set of input parameters for one of the layers specified by the layer-selection input including selection of a vehicular application whose performance in the edge-computing deployment is to be evaluated via the simulation experiment; executes the simulation experiment in accordance with the layer-selection input and the set of input parameters for each of the layers specified by the layer-selection input; and outputs, from the simulation experiment, performance data for the selected vehicular application in the edge-computing deployment.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: February 21, 2023
    Assignee: Toyota Motor Engineering & Manufacturing North America, Inc.
    Inventors: Haoxin Wang, BaekGyu Kim
  • Patent number: 11567903
    Abstract: A versioned file system comprising network accessible storage is provided. Aspects of the system include globally locking files or groups of files so as to better control the stored files in the file system and to avoid problems associated with simultaneous remote access or conflicting multiple access requests for the same files. A method for operating, creating and using the global locks is also disclosed. A multiprotocol global lock can be provided for filing nodes that have multiple network protocols for generating local lock requests.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: January 31, 2023
    Assignee: Nasuni Corporation
    Inventors: Robert M. Mason, Jr., David M. Shaw, Kevin W. Baughman, Christopher S. Lacasse, Matthew M. McDonald, Russell A. Neufeld, Akshay K. Saxena
  • Patent number: 11556363
    Abstract: Techniques for transferring virtual machines and resource management in a virtualized computing environment are described. In one embodiment, for example, an apparatus may include at least one memory, at least one processor, and logic for transferring a virtual machine (VM), at least a portion of the logic comprised in hardware coupled to the at least one memory and the at least one processor, the logic to generate a plurality of virtualized capability registers for a virtual device (VDEV) by virtualizing a plurality of device-specific capability registers of a physical device to be virtualized by the VM, the plurality of virtualized capability registers comprising a plurality of device-specific capabilities of the physical device, determine a version of the physical device to support via a virtual machine monitor (VMM), and expose a subset of the virtualized capability registers associated with the version to the VM. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 31, 2017
    Date of Patent: January 17, 2023
    Assignee: INTEL CORPORATION
    Inventors: Sanjay Kumar, Philip R. Lantz, Kun Tian, Utkarsh Y. Kakaiya, Rajesh M. Sankaran
  • Patent number: 11528083
    Abstract: Methods and apparatus for emulating optical modules. A method includes receiving, from an optical module emulator, a first serial data stream having the plurality of upstream signals multiplexed into a plurality of bits; wherein the first data stream includes a plurality of frames, each frame having a multi-frame alignment bit; and de-multiplexing the plurality of upstream signals based on each multi-frame alignment bit within each respective frame. A method includes receiving, from an emulator controller, a second serial data stream having a plurality of downstream signals multiplexed into a plurality of bits; wherein the second serial data stream includes a plurality of frames, each frame having a multi-frame alignment bit; and de-multiplexing the plurality of downstream signals based on each multi-frame alignment bit within each respective frame.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: December 13, 2022
    Assignee: Telefonaktiebolaget LM Ericsson (Publ)
    Inventors: Pierluigi Dito, Fabio Fontana, Davide Sanguinetti
  • Patent number: 11481233
    Abstract: Execution systems for augmenting legacy user interfaces include a memory, one or more input/output device, and one or more processors coupled to the memory and the one or more input/output devices. The one or more processors are configured to load a workflow described according to a workflow structure, the workflow structure describing subprocesses of the workflow, routings between the subprocesses, and actions that make up the subprocesses; connect to a legacy user interface based on the workflow; receive a message from the legacy user interface; determine a subprocess for responding to the message based on the workflow; and perform one or more actions of the determined subprocess to respond to the message. In some embodiments, performing the one or more actions includes presenting information from the message to an operator, soliciting input from the operator, and sending a response to the legacy user interface based on the input.
    Type: Grant
    Filed: September 13, 2019
    Date of Patent: October 25, 2022
    Assignee: LogistiVIEW, Inc.
    Inventors: David Brian Koch Erickson, Seth Robert Patin, Amin Fetanat Fard Haghighi, Raymond Pasquale Spagnola
  • Patent number: 11467944
    Abstract: In an information processing apparatus (100), obtaining units such as a first obtaining unit (200) and a second obtaining unit (230) obtain general-purpose OS information in a test operation phase in which a real-time application and a plurality of general-purpose applications are executed. The general-purpose OS information is information on use of hardware by each of the plurality of general-purpose applications executed in the test operation phase. A management unit (220) verifies whether or not a condition to place a restriction on the use of the hardware is satisfied for each general-purpose application based on the general-purpose OS information obtained by the obtaining unit. The management unit (220), when the condition is verified as being satisfied, places a restriction on the use of the hardware for an applicable general-purpose application in an actual operation phase in which the real-time application and the plurality of general-purpose applications are executed.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: October 11, 2022
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Yurika Terada, Akio Idehara, Takehisa Mizuguchi, Ryohei Kuba, Shinichi Ochiai, Hiroki Konaka
  • Patent number: 11455191
    Abstract: On a first compute resource, execution of a first task is triggered, execution of a portion of the first task being conditioned on a second task executing on a second compute resource. A state indicator of the second task is monitored, the state indicator indicating whether or not the second task is currently executing on the second compute resource. Responsive to the state indicator indicating that the second task is not currently executing, execution of the portion of the first task is suspended. A change in the state indicator is determined to have occurred. Responsive to the determining, received connection information for the second task is forwarded to the first task. Execution of the portion of the first task is re-triggered on the first compute resource.
    Type: Grant
    Filed: October 13, 2020
    Date of Patent: September 27, 2022
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Scott Miller, Austen William Lauria, Sameh Sherif Sharkawi, William P. LePera
  • Patent number: 11455470
    Abstract: A method for building a distributed reactive streaming microservices architecture having a decentralized, self-managed, and autonomous data message routing mechanism. The method comprises processing of data message by multiple microservices and generating routing patterns in the form of a fingerprint in response to the message-processing by the microservices. As the message is input into the microservices architecture, a fingerprint of the message is generated, wherein the fingerprint may comprise a payload flag in which payload information is embedded. A first microservice is triggered by recognizing the payload flag. As the message is processed by the first microservice, the fingerprint is updated by appending a first flag to the payload flag. The message with the updated fingerprint is subsequently recognized by a second microservice. As such, the routing of the message is accomplished by the changing fingerprint being recognized by the desired microservices to be triggered.
    Type: Grant
    Filed: February 24, 2020
    Date of Patent: September 27, 2022
    Inventor: Raul Abreu
  • Patent number: 11354100
    Abstract: The disclosure describes methods and apparatus for quickly prototyping of a solution developed using one or more sensing devices (e.g., sensors), functional blocks, algorithm libraries, and customized logic. The methods produce firmware executable by a processor (e.g., a microcontroller) on an embedded device such as a development board, expansion board, or the like. By performing these methods on the apparatus described, a user is able to create a function prototype without having deep knowledge of the particular sensing device or any particular programming language. Prototypes developed as described herein enable the user to rapidly test ideas and develop sensing device proofs-of-concept. The solutions produced by the methods and apparatus improve the functioning of the sensor being prototyped and the operation of the embedded device where the sensor is integrated.
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: June 7, 2022
    Assignees: STMICROELECTRONICS, INC., STMICROELECTRONICS DESIGN AND APPLICATION S.R.O.
    Inventors: Mahesh Chowdhary, Miroslav Batek, Marian Louda
  • Patent number: 11314554
    Abstract: A node grouping system for grouping a plurality of nodes of a computer system, includes: a processor; a memory operatively coupled to the processor; a node aggregator component comprising instructions stored in the memory and operable to cause the system, under control of the processor, to group the plurality of nodes by: comparing first characteristics of a first node of the plurality of nodes with first grouping criteria of a first group to determine if the first characteristics satisfy the first grouping criteria; grouping the first node with the first group based on a determination that the first characteristics satisfy the first grouping criteria; and storing the grouping within the memory; and an interface component comprising instructions stored in the memory and operable to cause said system, under control of the processor, to display the grouping comprising the first node.
    Type: Grant
    Filed: November 28, 2017
    Date of Patent: April 26, 2022
    Assignee: Cloudamize, Inc.
    Inventors: Stephan Karl Bohacek, Khushboo Shah Bohacek
  • Patent number: 11314338
    Abstract: Provided is a service system and method that allows a remote user to plug-into an external device (e.g., a server, a laptop, a desktop, etc.) and control a local keyboard input of the troubled device, remotely. In one example, the method may include receiving, via a first adapter connected to a mobile device, keyboard commands from the mobile device, converting the received keyboard commands into corresponding keyboard emulation signals of an external computing system, and transmitting, via a second adapter connected to the external computing system, the keyboard emulation signals to control a local keyboard input of the external computing system.
    Type: Grant
    Filed: September 23, 2020
    Date of Patent: April 26, 2022
    Assignee: General Electric Company
    Inventor: Daniel Wilcox
  • Patent number: 11308008
    Abstract: Embodiments described herein provide for an emulation system that supports efficiently generating outgoing messages to a test bench. The emulation system transmits the outgoing messages to the test bench various busses and interfaces. The compiled virtual logic writes the outgoing messages into memories of the emulation chips for queuing, and notification messages associated with the queued outgoing messages. A traffic processor transfers from memories to the test bench using buses and interfaces. The traffic processor reads a notification message from memory to identify the storage location with a corresponding queued outgoing message. The traffic processor then transmits DMA requests to I/O components (e.g., DMA engines) to instruct the I/O components to transfer the queued outgoing message to the host device.
    Type: Grant
    Filed: December 31, 2020
    Date of Patent: April 19, 2022
    Assignee: CADENCE DESIGN SYSTEMS, INC.
    Inventors: Mitchell G. Poplack, Christian Wiencke, Bhoumik Shah, Ping-Sheng Tseng
  • Patent number: 11275577
    Abstract: An update device for providing configuration updates, such as recipes, advertising content, software update(s), pricing updates and/or other changes to brewer parameters, to a brewer device. When turned on, the update device wirelessly connects to a cloud account associated with the brewer device. Any pending content updates associated with the cloud account are wirelessly delivered to the update device and stored. When the update device is connected to the brewer device, the update device emulates a disk drive to transfer the updates to the brewer device.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: March 15, 2022
    Assignee: Bunn-O-Matic Corporation
    Inventors: Prashanth Sankaran, Joshua T. Craig, Barry O'Dell
  • Patent number: 11269685
    Abstract: In an approach for managing physical processor usage of a shared memory buffer, a processor receives a request for memory. A processor receives a request for memory from a process running on a physical processor. A processor determines whether the request for memory is less than or equal to a pre-determined threshold, wherein the pre-determined threshold is based on characteristics of a server on which the physical processor resides, needs of the server, and a frequency of requests of each memory size. Responsive to determining the request for memory is greater than the pre-determined threshold, a processor identifies a node on which the physical processor resides. A processor identifies a memory buffer of a set of memory buffers allocated to the node on which the physical processor resides. A processor allocates the memory buffer.
    Type: Grant
    Filed: June 20, 2019
    Date of Patent: March 8, 2022
    Assignee: International Business Machines Corporation
    Inventors: Muruganandam Somasundaram, Jeffrey Paul Kubala, Jerry A. Moody, Hunter J. Kauffman
  • Patent number: 11205019
    Abstract: A first and a second computing environments are generated on a computer system based on a state of a logical storage unit of the computer system. The computing environments are associated with pieces of storage space located outside the logical storage unit. A write operation addressing the logical storage unit in one computing environment is directed to a piece of storage space associated with that computing environment.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: December 21, 2021
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Wei-Shan Yang
  • Patent number: 11126635
    Abstract: Systems, methods, and devices for a cyberphysical (IoT) software application development platform based upon a model driven architecture and derivative IoT SaaS applications are disclosed herein. The system may include concentrators to receive and forward time-series data from sensors or smart devices. The system may include message decoders to receive messages comprising the time-series data and storing the messages on message queues. The system may include a persistence component to store the time-series data in a key-value store and store the relational data in a relational database. The system may include a data services component to implement a type layer over data stores. The system may also include a processing component to access and process data in the data stores via the type layer, the processing component comprising a batch processing component and an iterative processing component.
    Type: Grant
    Filed: March 21, 2019
    Date of Patent: September 21, 2021
    Assignee: C3.ai, Inc.
    Inventors: Houman Behzadi, Edward Y. Abbo, Thomas M. Siebel, John Coker, Scott Kurinskas, Thomas Rothwein, David Tchankotadze
  • Patent number: 11121810
    Abstract: A synchronous communication interface includes at least one data channel configured to carry a data signal comprising a plurality of data units; a control channel parallel to the at least one data channel, the control channel configured to carry a control signal for the at least one data channel; and a circuit configured to generate the control signal that includes control information that defines each of the plurality of data units in each data signal and further includes additional information. The circuit is configured to vary a duty cycle of the control signal according to a mapping of the additional information to a plurality of discrete duty cycle states.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: September 14, 2021
    Inventors: Ljudmil Anastasov, Markus Bichl
  • Patent number: 11100297
    Abstract: One embodiment provides a method, including: receiving, from a user and at a user interface of a conversational agent, a query related to a business process; identifying, using process entity extraction on the query, (i) the business process and (ii) a business object corresponding to an entity of the query; mapping the business object to code corresponding to the business object, wherein the mapping comprises (i) mapping the business object to an object within a business process model using a domain dictionary and (ii) accessing code corresponding to the object within the business process model; generating a natural language response responsive to the received query by (i) extracting the code corresponding to the business object, (ii) identifying a rule within the extracted code corresponding to a variable of the query, and (iii) generating the natural language response from the identified rule; and providing the natural language response.
    Type: Grant
    Filed: April 15, 2019
    Date of Patent: August 24, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Sampath Dechu, Neelamadhav Gantayat, Monika Gupta
  • Patent number: 11099741
    Abstract: Techniques are provided for assigning alias devices in a parallel access volume storage environment. An exemplary method for assigning alias devices by a host in a parallel access volume storage environment comprises: obtaining a next I/O (input/output) operation from a queue; obtaining a utilization factor for a plurality of available I/O processing thread in the storage controller; and assigning the next I/O operation to an alias device associated with a given one of the plurality of available I/O processing threads based on the utilization factors.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: August 24, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Douglas Eric LeCrone, Paul Linstead
  • Patent number: 11086622
    Abstract: Microcode is stored in a program memory and intended to be executed by a central processing unit of a processing unit. The processing unit may include a memory controller associated with each program memory and a hardware peripheral. The method includes, in response to a request to update the microcode, a transmission, to each hardware peripheral, of a global authorization request signal obtained from an elementary authorization request signal generated by each corresponding memory controller, a transmission of a global authorization signal obtained from an elementary authorization signal generated by each hardware peripheral in response to the global authorization request signal and after satisfying a predetermined elementary condition, and an updating of each microcode by the corresponding memory controller only after the global authorization signal is received.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: August 10, 2021
    Assignee: STMICROELECTRONICS (ROUSSET) SAS
    Inventor: Vincent Onde
  • Patent number: 11042392
    Abstract: Described herein is a system and method for flow state save/restore of a virtual filtering platform. A first instance of a driver manages policy and flow state for ongoing flows between client device(s) and virtual machine(s). The virtual filtering platform is transitioned from the first instance of a driver to a second instance of the driver by serializing the policy and state for the ongoing flows on the first instance of the driver using a one pass algorithm. The serialized policy and state for the ongoing flows can be de-serialized with the ongoing flows re-established and/or reconciled on the second instance of the driver in accordance with the de-serialized policy and state for the plurality of ongoing flows. In some embodiments, a memory management technique can use a single operating system memory allocation call to allocate memory for the transition, with the technique managing utilization of the allocation memory.
    Type: Grant
    Filed: June 14, 2019
    Date of Patent: June 22, 2021
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Harish Kumar Chandrappa, Milan Dasgupta, Daniel Max Firestone
  • Patent number: 11042485
    Abstract: An example method of implementing firmware runtime services in a computer system having a processor with a plurality of hierarchical privilege levels, the method including: calling, from software executing at a first privilege level of the processor, a runtime service stub in a firmware of the computer system; executing, by the runtime service stub, an upcall instruction from the first privilege level to a second privilege level of the processor that is more privileged than the first privilege level; and executing, by a handler, a runtime service at the second privilege level in response to execution of the upcall instruction.
    Type: Grant
    Filed: June 20, 2018
    Date of Patent: June 22, 2021
    Assignee: VMware, Inc.
    Inventors: Andrei Warkentin, Cyprien Laplace, Alexander Fainkichen, Ye Li, Regis Duchesne
  • Patent number: 11023258
    Abstract: Dynamically configurable server platforms and associated apparatus and methods. A server platform including a plurality of CPUs installed in respective sockets may be dynamically configured as multiple single-socket servers and as a multi-socket server. The CPUs are connected to a platform manager component comprising an SoC including one or more processors and an embedded FPGA. Following a platform reset, an FPGA image is loaded, dynamically configuring functional blocks and interfaces on the platform manager. The platform manager also includes pre-defined functional blocks and interfaces. During platform initialization the dynamically-configured functional blocks and interfaces are used to initialize the server platform, while both the pre-defined and dynamically-configured functional blocks and interfaces are used to support run-time operations.
    Type: Grant
    Filed: December 30, 2016
    Date of Patent: June 1, 2021
    Assignee: Intel Corporation
    Inventors: Neeraj S. Upasani, Jeanne Guillory, Wojciech Powiertowski, Sergiu D Ghetie, Mohan J. Kumar, Murugasamy K. Nachimuthu
  • Patent number: 10990424
    Abstract: A device configured to emulate a node in a correlithm object processing system includes a memory and a node. The memory stores a node table that links source correlithm objects to target correlithm objects. The node receives an input correlithm object and determines n-dimensional distances between it and the source correlithm objects, and determines that it is not within an n-dimensional distance threshold from any of the source correlithm objects. The node receives a stimulus condition correlithm object in conjunction with receiving the input correlithm object and adds the input correlithm object to the node table as a new source correlithm object in response to determining that it is not within the n-dimensional distance threshold and further in response to receiving the stimulus condition correlithm object. The node then links a new target correlithm object to the new source correlithm object in the node table.
    Type: Grant
    Filed: May 7, 2019
    Date of Patent: April 27, 2021
    Assignee: Bank of America Corporation
    Inventor: Patrick N. Lawrence
  • Patent number: 10976959
    Abstract: An optimized solution for accessing virtual machine state while restoration of a respective virtual machine is underway. Specifically, the optimized solution disclosed herein implements a fetching mechanism for retrieving granular virtual machine state over a network and/or from a remote storage system. The fetching mechanism leverages block allocation information in parallel with disk caching to provide instant (or near instant) access to a virtual machine state while also, concurrently, restoring the respective virtual machine.
    Type: Grant
    Filed: July 23, 2018
    Date of Patent: April 13, 2021
    Assignee: EMC IP Holding Company LLC
    Inventors: Aaditya Bansal, Shelesh Chopra, Soumen Acharya, Sunil Yadav
  • Patent number: 10963280
    Abstract: Systems, apparatuses, and methods for implementing hypervisor post-write notification of processor state register modifications. A write to a state register of the processor may be detected during guest execution. In response to detecting the write to the state register, the processor may trigger microcode to perform the write and copy the new value of the register to a memory location prior to exiting the guest. The hypervisor may be notified of the update to the state register after it occurs, and the hypervisor may be prevented from modifying the value of the guest's state register. The hypervisor may terminate the guest if the update to the state register is unacceptable. Alternatively, the hypervisor may recommend an alternate value to the guest. If the guest agrees, the guest may set the state register to the alternate value recommended by the hypervisor when the guest resumes operation.
    Type: Grant
    Filed: February 3, 2016
    Date of Patent: March 30, 2021
    Assignee: Advanced Micro Devices, Inc.
    Inventors: David A. Kaplan, Joel Howard Schopp
  • Patent number: 10956497
    Abstract: Disclosed herein are embodiments of systems, methods, and products comprises an analytic server, which uses scalable vector graphic (SVG) format to encapsulate building floorplan and metadata. The analytic server creates a floorplan map in SVG format that includes both a graphic map and a specification file. When a user issues an information request by clicking on one graphical element, the analytic server determines the object identifier of the clicked graphical element, queries the specification file to receive metadata about the clicked graphical element based on the object identifier, and renders a user interface to display the metadata about the graphical element. When the user modifies the graphical element, the analytic server determines new data of the graphical element and updates the corresponding object metadata with the new data in the specification file.
    Type: Grant
    Filed: October 4, 2018
    Date of Patent: March 23, 2021
    Assignee: United States Automobile Association (USAA)
    Inventor: Jesse Plymale
  • Patent number: 10949537
    Abstract: Electronic computing devices provide a method to update firmware. The method includes receiving a firmware image at an electronic device, the electronic device having a processor and a memory arranged to store instructions executed by the processor. In the electronic device, a unique device identifier is retrieved and a random number is generated. The generated random number is securely stored. The random number and a representation of the unique device identifier are computationally combined to create a device-binding value, and an address-offset is generated from the device-binding value. The firmware image is stored in the memory at the address-offset.
    Type: Grant
    Filed: October 30, 2018
    Date of Patent: March 16, 2021
    Assignee: STMICROELECTRONICS, INC.
    Inventors: Maurizio Gentili, Massimo Panzica
  • Patent number: 10929764
    Abstract: An apparatus includes a state machine engine. The state machine engine may also include an automaton, whereby the automaton is configured to analyze data from a beginning of an input data stream until a point when an end of data signal is seen. The automaton may further be configured to report an event representative of a satisfaction of a Boolean clause of a conjunctive normal form (CNF) Boolean expression representative of a Boolean Satisfiability problem (SAT) by a portion of the input data stream.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: February 23, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Matthew T. Grimm, Jeffery M. Tanner
  • Patent number: 10922375
    Abstract: A client computing device includes an embedded browser that includes first and second browsers, a copy file user interface (UI) control and a processor. The first browser is for a user to identify a file to be copied from a source application, and the second browser is for the user to identify a location of where the file is to be copied within a target application. The processor cooperates with the embedded browser in response to the user selecting the copy file UI control to retrieve the identified file in the source application and copy to the identified location within the target application without requiring further user input.
    Type: Grant
    Filed: February 4, 2019
    Date of Patent: February 16, 2021
    Assignee: CITRIX SYSTEMS, INC.
    Inventor: Jeroen Mattijs Van Rotterdam
  • Patent number: 10891133
    Abstract: Code-specific affiliated register prediction. A determination is made as to whether a unit of code is a candidate for affiliated register prediction. The determining employs a code specific indicator specific to the unit of code. Based on determining the unit of code is a candidate for affiliated register prediction, an indication of an affiliated register is loaded into a selected location. Based on the loading, the affiliated register is employed in speculative processing.
    Type: Grant
    Filed: September 6, 2019
    Date of Patent: January 12, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael K. Gschwind, Valentina Salapura
  • Patent number: 10890939
    Abstract: A method for generating a not-yet (NYET) signal in a recovered reference system for recovering a device reference clock on a device, wherein the NYET signal indicates that the device is not yet ready for transition into a low power mode, in order to improve a quality of a recovered reference clock representative of a host reference clock of a host communicatively coupled to the device, may be provided. The method may include detecting receipt of start-of-frame markers from the host to the device, responsive to detecting receipt of the markers, determining whether a condition for NYET generation is being met, responsive to the condition for NYET generation being met, generating the NYET signal to cause the host to continue generating the markers, and responsive to the condition for NYET generation not being met, causing the device to generate an acknowledge signal for transition of the device into the low power mode.
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: January 12, 2021
    Assignee: Cirrus Logic, Inc.
    Inventors: Bradley Allan Lambert, Bruce E. Duewer, David Hisky, Marc J. Kobayashi, Michael A. Kost
  • Patent number: 10884787
    Abstract: Systems and methods are described for implementing execution guarantees in an on-demand code execution system or other distributed code execution environment, such that the on-demand code execution system attempts to execute code only a desired number of times. The on-demand code execution system can utilize execution identifiers to distinguish between new and duplicative requests, and can decline to allocate computing resources for duplicative requests. The on-demand code execution system can further detect errors during execution, and rollback the execution to undo the execution's effects. The on-demand code execution system can then restart execution until the code has been execute the desired number of times.
    Type: Grant
    Filed: September 23, 2016
    Date of Patent: January 5, 2021
    Assignee: Amazon Technologies, Inc.
    Inventors: Timothy Allen Wagner, Marc John Brooker, Jonathan Paul Thompson, Ajay Nair
  • Patent number: 10853213
    Abstract: Installation errors for removable hardware components are typically identified only after placing an IHS (Information Handling System) back into service. Upon servicing a removeable hardware component and powering the IHS, a hardware validation request may be issued during booting of the IHS. In certain instances, a technician may trigger a hardware validation request via keyboard inputs during booting. If a hardware validation request is detected, the IHS is diverted from booting to a hardware validation process that identifies the removeable hardware components coupled to the hardware connectors supporting removeable hardware and determines a support level for the removeable hardware components at their installed connector locations. If performance issues are indicated by the support level for the hardware component, a hardware installation recommendation is displayed. The technician may resume booting or perform additional service on the IHS based on the recommendation.
    Type: Grant
    Filed: June 22, 2018
    Date of Patent: December 1, 2020
    Assignee: Dell Products, L.P.
    Inventors: Vaideeswaran Ganesan, Suren Kumar
  • Patent number: 10838920
    Abstract: A server executes in a virtual machine and facilitates execution of lightweight plug-in functions that respond to user interface commands from a client device. The functions augment the commands with additional processing even though they may not implement a user interface, they generate data in real time, they access any data repository or data source, can be written in any programming language, and they perceive that they have infinite storage. The client device need not have custom software and implements a traditional file-folder user interface using standard applications. Folders and file contents displayed on the client device need not exist until specifically requested by the user. Plug-in functions have their own root file system but may share a network namespace. Data may be input to a function using a folder name or a micro Web server. Two functions share a database connection to a remote computer.
    Type: Grant
    Filed: August 11, 2017
    Date of Patent: November 17, 2020
    Assignee: ESOPTRA NV
    Inventors: Paul Carpentier, Jan Van Riel
  • Patent number: 10824451
    Abstract: Simulation of execution of a processing workload by a target hardware device is provided by providing workload data specifying the processing workload, passing the workload data to both a primary partial simulation and a complementary partial simulation that run in parallel and acquire input data from different levels of abstraction of the target hardware and then simulating execution of the processing workload using a primary partial simulation to generate primary partial result state data and using the complementary partial simulation to generate complementary partial result state data. The target hardware device may be a graphics processing unit and the workload data may specify the processing to be performed in a hardware independent form, such as, for example, OpenGL ES. The host system supporting the simulation may include a graphics processing unit serving to provide the complementary partial simulation due to its own execution of the workload data.
    Type: Grant
    Filed: February 11, 2015
    Date of Patent: November 3, 2020
    Assignee: ARM LIMITED
    Inventors: Robert James Catherall, Anthony Neil Berent, Rhys David Copeland, Mark Edgeworth, Jonathan Stephen Black
  • Patent number: 10824524
    Abstract: An information handling system may include one or more processors, a memory system communicatively coupled to the one or more processors, and a program of instructions embodied in non-transitory computer readable media and configured to, when read and executed by the one or more processors, create operating system level-mirroring of address spaces for data associated with one or more processes executing on the one or more processors and dynamically reallocate address spaces used for mirroring of the data for a process of the one or more processes from a first address space to a second address space responsive to a determination that a number of correctable bit errors of a memory page associated with the first address space exceeds a threshold.
    Type: Grant
    Filed: November 2, 2018
    Date of Patent: November 3, 2020
    Assignee: Dell Products L.P.
    Inventors: Krishnaprasad Koladi, Wei G. Liu, Gobind Vijayakumar, Murugan Sekar
  • Patent number: 10826970
    Abstract: A system for terminal emulation includes a first processor, a first terminal emulator being addressable by a first identifier, and a first router incorporated into the first terminal emulator. The system also includes a second processor, a second terminal emulator being addressable by a second identifier, and a second router incorporated into the second terminal emulator. A first bidirectional connection exists between the first terminal emulator and the second terminal emulator. A first terminal is addressable by the second terminal emulator via a third identifier over a second bidirectional connection. A second terminal is addressable by the second terminal emulator via a fourth identifier over a third bidirectional connection. The first and second routers facilitate communication between the first terminal emulator and both the first terminal and the second terminal via the first bidirectional connection via the first identifier, the second identifier, the third identifier, and/or the fourth identifier.
    Type: Grant
    Filed: May 9, 2019
    Date of Patent: November 3, 2020
    Assignee: TermySequence LLC
    Inventor: Eamon F. Walsh
  • Patent number: 10810306
    Abstract: The present invention is directed to system for and methods of real time observing, monitoring, and detecting anomalies in programs' behavior at instruction level. The hardware assist design in this invention provides fine grained observability, and controllability. Fine grained observability provides unprecedented opportunity for detecting anomaly. Controllability provides a powerful tool for stopping anomaly, repairing the kernel and restoring the state of processing. The performance improvement over pure software approach is estimated to be many orders of magnitudes. This invention is also effective and efficient in detecting mutating computer viruses, where normal, signature based, virus detection is under performing.
    Type: Grant
    Filed: August 30, 2017
    Date of Patent: October 20, 2020
    Inventor: Sukarno Mertoguno
  • Patent number: 10795655
    Abstract: A method and system is provided for provisioning software applications on edge devices in an Internet-of-Things (IoT) environment. In an embodiment, a method includes generating a plurality of simulation instances capable of simulating behavior of a software application on one or more edge devices in the IoT environment. Each simulation instance is configured with a unique resource configuration. The method includes processing the software application on each simulation instance using data from a plant. Furthermore, the method includes computing an optimum resource configuration associated with the software application based on processing of the software application on the simulation instances.
    Type: Grant
    Filed: September 19, 2018
    Date of Patent: October 6, 2020
    Assignee: Siemens Aktiengesellschaft
    Inventor: Amit Verma
  • Patent number: 10789180
    Abstract: A serial peripheral interface (SPI)-based data transmission method, including sending, by a first device, a first query request to a second device through a universal asynchronous receiver/transmitter (UART) interface, where the first query request queries the second device for an SPI mode supported by the second device, sending, by the first device, in response to the first device determining, according to a first query response returned by the second device, that the second device supports an SPI master mode, an SPI connection establishment request to the second device, where the SPI connection establishment request causes the second device to initiate establishment of an SPI connection to the first device, and performing, by the first device, through the SPI, and after the first device establishes the SPI connection to the second device, at least one of receiving data sent by the second device, or sending data to the second device.
    Type: Grant
    Filed: January 16, 2017
    Date of Patent: September 29, 2020
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventor: Shaohua Zhong
  • Patent number: 10733134
    Abstract: In accordance with embodiments of the present disclosure, an information handling system may include a motherboard, a plurality of information handling resources communicatively coupled to the motherboard, a socket communicatively coupled to the motherboard and configured to receive one of a plurality of different types of interposers, wherein each of the plurality of interposers is configured to provide routing of electrical signals between the socket and a respective system on a chip communicatively coupled to such interposer, and a configuration module. The configuration module may be configured to receive identifying information associated with an interposer, of the plurality of interposers, communicatively coupled to the socket and based on the identifying information, configure the plurality of information handling resources for interoperability with a system on a chip communicatively coupled to the interposer.
    Type: Grant
    Filed: August 30, 2018
    Date of Patent: August 4, 2020
    Assignee: Dell Products L.P.
    Inventors: Ayedin Nikazm, Ramesh Radhakrishnan
  • Patent number: 10735514
    Abstract: Systems and methods are disclosed for remote configuration of applications on a network-attached storage device (NAS). In certain embodiments, a NAS includes a non-volatile memory module, a network interface, and control circuitry configured to store a mapping of an application identifier and a port for each of the plurality of applications stored in the non-volatile memory. The control circuitry receives, from a client over the network interface, a request to configure a first application of the plurality of applications, the request comprising a first port corresponding to the first application. The control circuitry determines a first embedded web server of the first application based on the mapping and the first port received in the request and transmits the request to the first embedded web server on the first application.
    Type: Grant
    Filed: August 29, 2017
    Date of Patent: August 4, 2020
    Assignee: Western Digital Technologies, Inc.
    Inventors: Sapna Murari Todwal, Sailesh Rachabathuni, Cipson Jose Chiriyankandath, Ruslan Azibovich Sharifullin
  • Patent number: RE48514
    Abstract: According to one embodiment, a semiconductor device includes a device. The device includes a decoder, a generation circuit, a register, and a modifier. The decoder analyzes a command of a received packet. The generation circuit generates a unique device number in accordance with information in the packet. The register holds the generated unique device number. The modifier updates and outputs the packet. When a packet issued by a host is a command packet, among broadcast packets which return to the host through one or more devices, for determining the unique device number, the command packet includes parameters of an initial value and final value of device number.
    Type: Grant
    Filed: December 28, 2018
    Date of Patent: April 13, 2021
    Assignee: TOSHIBA MEMORY CORPORATION
    Inventor: Akihisa Fujimoto
  • Patent number: RE49424
    Abstract: According to one embodiment, a semiconductor device includes a device. The device includes a decoder, a generation circuit, a register, and a modifier. The decoder analyzes a command of a received packet. The generation circuit generates a unique device number in accordance with information in the packet. The register holds the generated unique device number. The modifier updates and outputs the packet. When a packet issued by a host is a command packet, among broadcast packets which return to the host through one or more devices, for determining the unique device number, the command packet includes parameters of an initial value and final value of device number.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: February 21, 2023
    Assignee: Kioxia Corporation
    Inventor: Akihisa Fujimoto