Abstract: A method for convolution in a convolutional neural network (CNN) is provided that includes accessing a coefficient value of a filter corresponding to an input feature map of a convolution layer of the CNN, and performing a block multiply accumulation operation on a block of data elements of the input feature map, the block of data elements corresponding to the coefficient value, wherein, for each data element of the block of data elements, a value of the data element is multiplied by the coefficient value and a result of the multiply is added to a corresponding data element in a corresponding output block of data elements comprised in an output feature map.

Abstract: A neural network processor for performing a neural network operation may include a memory storing computer-readable instructions, and kernel intermediate data, the kernel intermediate data including a plurality of kernel intermediate values calculated based on a plurality of weight values included in kernel data; and at least one processor to execute the computer-readable instructions to perform a convolution operation by selecting at least one kernel intermediate value among the plurality of kernel intermediate values based on an input feature map.

Abstract: An accelerator for modern convolutional neural networks applies the Winograd filtering algorithm in a wavelength division multiplexing integrated photonics circuit modulated by a memristor-based analog memory unit.

Abstract: Systems and methods are provided to enable parallelized multiply-accumulate operations in a systolic array. Each column of the systolic array can include multiple busses enabling independent transmission of input partial sums along the respective bus. Each processing element can include a plurality of interconnects to receive a plurality of inputs corresponding to the multiple busses. Each processing element of a given columnar bus can receive an input from a prior element of the given columnar bus at an active bus position and perform arithmetic operations on the input. Each processing element can further receive a plurality of inputs at passive bus positions and provide the plurality of inputs to subsequent processing elements without the plurality of inputs being processed by the processing element. Use of columnar busses can enable parallelization to increase speed or enable increased latency at individual processing elements.

Abstract: The present disclosure is directed to systems and methods for performing discrete cosine transforms and inverse discrete cosine transforms (DCT/IDCT) using a CORDIC algorithm implemented in systolic array circuitry that includes a plurality cells or nodes, each containing circuitry to implement the CORDIC algorithm. DCT/IDCT control circuitry multiplies the systolic array output matrix generated by the systolic array circuitry by a scaling factor that may include a defined scaling value or an actual cosine value. The DCT/IDCT control circuitry causes the transfer of the scaled systolic array output matrix to combination circuitry where the DCT/IDCT input matrix is combined with the scaled systolic array output matrix to provide the DCT/IDCT output matrix. The DCT/IDCT control circuitry also transfers bypass information to at least a portion of the cells or nodes in the systolic array circuitry.

Abstract: A method for convolution in a convolutional neural network (CNN) is provided that includes accessing a coefficient value of a filter corresponding to an input feature map of a convolution layer of the CNN, and performing a block multiply accumulation operation on a block of data elements of the input feature map, the block of data elements corresponding to the coefficient value, wherein, for each data element of the block of data elements, a value of the data element is multiplied by the coefficient value and a result of the multiply is added to a corresponding data element in a corresponding output block of data elements comprised in an output feature map.

Abstract: A convolution operation device includes a convolution calculation module, a memory and a buffer device. The convolution calculation module has a plurality of convolution units, and each convolution unit performs a convolution operation according to a filter and a plurality of current data, and leaves a part of the current data after the convolution operation. The buffer device is coupled to the memory and the convolution calculation module for retrieving a plurality of new data from the memory and inputting the new data to each of the convolution units. The new data are not a duplicate of the current data. A convolution operation method is also disclosed.

Abstract: Described embodiments include a system that includes one or more buffers and circuitry. The circuitry is configured to process a plurality of input values, by identifying each of the input values that is not zero-valued, and, for each value of the identified input values, computing respective products of coefficients of a kernel with the value and storing at least some of the respective products in the buffers. The circuitry is further configured to compute a plurality of output values, by retrieving respective sets of stored values from the buffers, at least some of the retrieved sets including one or more of the products, and summing the retrieved sets. The circuitry is further configured to output the computed output values. Other embodiments are also described.

Abstract: This application relates to an optimization for a technique for filtering an input signal according to a convolution kernel that is stored in a floating point format. A method for filtering the input signal includes: receiving a set of filter coefficients that define the convolution kernel; determining an order for a plurality of floating point operations configured to generate an element of an output signal; and filtering the input signal by the convolution kernel to generate the output signal. Each floating point operation corresponds with a particular filter coefficient, and the order for the plurality of floating point operations is determined based on a magnitude of the particular filter coefficient associated with each floating point operation. The filtering is performed by executing the plurality of floating point operations according to the order. The data path can be a half-precision floating point data path implemented on a processor.

Abstract: A method for providing IQ mismatch (IQMM) compensation includes: sending a single tone signal at an original frequency; determining a first response of an impaired signal at the original frequency and a second response of the impaired signal at a corresponding image frequency; determining an estimate of a frequency response of the compensation filter at the original frequency based on the first response and the second response; repeating the steps of sending the single tone signal, determining the first response and the second response, and determining the estimate of the frequency response of the compensation filter by sweeping the single tone signal at a plurality of steps to determine a snapshot of the frequency response of the compensation filter; converting the frequency response of the compensation filter to a plurality of time-domain filter taps of the compensation filter by performing a pseudo-inverse of a time-to-frequency conversion matrix; and determining a time delay that provides a minimal LSE fo

Abstract: In a communications system having an analog channel configured to convey a data signal from a transmitter to a receiver, a method of mitigating narrow-band impairment imposed by the analog channel on the data signal within a bounded spectral region of a spectrum of the data signal. A transmitter digital signal processor (Tx DSP) applying a first adaptation function to the data signal prior to transmitting the data signal through the analog channel. A receiver digital signal processor (Rx DSP) applying a second adaptation function to the data signal received through the analog channel. The first and second adaptation functions are selected to cooperatively mitigate effects of the narrow-band impairment imposed by the analog channel.

Abstract: A system and method for interpolating non-integer oversamples in a receiver receives a plurality of samples, the plurality of samples having a quantity which has a non-integer ratio to a number of channels of a channelizer of the receiver. A non-linear phase correction is applied to the plurality of samples.

Abstract: An image processing apparatus includes an image acquirer configured to acquire an image, a function acquirer configured to acquire a plurality of optical transfer functions relating to an optical system, a function reviser configured to revise the plurality of optical transfer functions based on information relating to an image pickup element, a converter configured to convert the plurality of optical transfer functions revised by the function reviser into a plurality of point spread functions, and an image restorer configured to perform restoration processing on the image by using the plurality of point spread functions.

Abstract: New hybrid filters are presented based on time and transform domain structures. The hybrid filters have a combined benefit from the advantages obtained by the time and transform domain structures. The overall efficiencies are drawn from combining the pre- and post-processing of the time domain and block based transform domain structures. Further improvements are obtained by interchanging block construction and transforms with linear operations in the pre- and post-processors. The hybrid structures apply to single input, single output, multiple input, and multiple output structures. For the multi input and multi output structures further improvements are obtained by having common processing blocks for the input(s) and common processing blocks for the output(s). They hybrid filters are also efficient in topologies where filter outputs are combined via linear operation(s) generating combined results.

Abstract: An image processor includes generates a content adaptive kernel from an image block with noise of a luminance component signal with a low resolution. The content adaptive kernel is convolved with the luminance component signal. A noise signal and an extracted texture which excludes noise are generated. The luminance component signal is filtered as function of the noise signal to generate an enhanced luminance component signal. Horizontal and vertical scaling is performed on the enhanced luminance component signal, the extracted texture, and the luminance component signal, with the luminance component signal adaptively scaled as a function of the extracted texture. The horizontally and vertically scaled enhanced luminance component signal, extracted texture and luminance component signal are then combined to generate an output luminance component signal with a high resolution.

Abstract: Methods and apparatuses for convolutive blind source separation are described. Each of a plurality of input signals is transformed into frequency domain. Values of coefficients of unmixing filter corresponding to frequency bins are calculated by performing a gradient descent process on a cost function at least dependent on the coefficients of the unmixing filters. In each iteration of the gradient descent process, gradient terms for calculating the values of the same coefficient of the unmixing filters are adjusted to improve smoothness of gradient terms across the frequency bins. With respect to each of the frequency bins, source signals are estimated by filtering the transformed input signals through the respective unmixing filter configured with the calculated values of the coefficients. The estimated source signals on the respective frequency bins are transformed into time domain. The cost function is adapted to evaluate decorrelation between the estimated source signals.

Abstract: The present invention relates to a method for processing a digital input signal by a Finite Impulse Response, FIR, filtering means, comprising partitioning the digital input signal at least partly in the time domain to obtain at least two partitions of the digital input signal; partitioning the FIR filtering means in the time domain to obtain at least two partitions of the FIR filtering means; Fourier transforming each of the at least two partitions of the digital input signal to obtain Fourier transformed signal partitions; Fourier transforming each of the at least two partitions of the FIR filtering means to obtain Fourier transformed filter partitions; performing a convolution of the Fourier transformed signal partitions and the corresponding Fourier transformed filter partitions to obtain spectral partitions; combining the spectral partitions to obtain a total spectrum; and inverse Fourier transforming the total spectrum to obtain a digital output signal.

Abstract: A rectangular wave for determining a range of a weight function is transformed to frequency domain by an FFT or the like, and after being multiplied by a window function (BlackmanHarris window function, for example) generated on a frequency axis by a multiplier, the frequency domain is transformed again to the time domain by an IFFT or the like thereby to generate a weight function.

Abstract: Certain embodiments of the invention may include systems and methods for implementing a multirate digital interpolating filter. According to an example embodiment of the invention, the method includes sampling symbol data from one sample per symbol to N samples per symbol, wherein sampling includes: convolving the symbol data with a decimated finite impulse response (FIR) aperture impulse response coefficient set, convolving the symbol data with one or more shifted decimated FIR aperture impulse response coefficient sets, and summing the convolution results to produce interpolated bandlimited data.

Abstract: Software implementations are provided for performing IQ imbalance correction and/or RF equalization. An input signal, x, is processed in software by executing a vector convolution instruction to apply the input signal, x, to a first complex FIR filter that performs one or more of RF equalization and IQ imbalance correction; and executing a vector convolution instruction to apply a conjugate x* of the input signal, x, to a second complex FIR filter that performs the one or more of RF equalization and IQ imbalance correction, wherein the second complex FIR filter is in parallel with the first complex FIR filter. The first and second complex FIR filters have complex coefficients and the input signal comprises a complex signal.

Abstract: A filtering apparatus for obtaining an output in a case where a discrete-time signal having a length of N (N is an integer) is input to an FIR filter with a filter coefficient having a length of M (M is an integer, N?M?1), including: a division unit for dividing the discrete-time signal; a first zero padding unit for padding zero after the discrete-time signals; a first fast Fourier transform unit for performing FFT on the zero padded data; a second zero padding unit for padding zero after the filter coefficient; a second fast Fourier transform unit for performing FFT on the zero padded data; a multiplication unit for multiplying the frequency domain data by the frequency domain data; an inverse fast Fourier transform unit for performing IFFT on the multiplication results; and an adder unit for adding the discrete-time signals.

Abstract: Convolutions are frequently used in signal processing. A method for performing an ordinal convolution is disclosed. In an embodiment of the disclosed subject matter, an ordinal mask may be obtained. The ordinal mask may describe a property of a signal. A representation of a signal may be received. A processor may convert the representation of the signal to an ordinal representation of the signal. The ordinal mask may be applied to the ordinal representation of the signal. Based upon the application of the ordinal mask to the ordinal representation of the signal, it may be determined that the property is present in the signal. The ordinal convolution method described herein may be applied to any type of signal processing method that relies on a transform or convolution.

Abstract: Methods and apparatuses for convolutive blind source separation are described. Each of a plurality of input signals is transformed into frequency domain. Values of coefficients of unmixing filter corresponding to frequency bins are calculated by performing a gradient descent process on a cost function at least dependent on the coefficients of the unmixing filters. In each iteration of the gradient descent process, gradient terms for calculating the values of the same coefficient of the unmixing filters are adjusted to improve smoothness of gradient terms across the frequency bins. With respect to each of the frequency bins, source signals are estimated by filtering the transformed input signals through the respective unmixing filter configured with the calculated values of the coefficients. The estimated source signals on the respective frequency bins are transformed into time domain. The cost function is adapted to evaluate decorrelation between the estimated source signals.

Abstract: A system and method identifies data peaks representative of empirical data of a sample. The system and method assign a grammar type to correspond to data points represented on a data plot such as a chromatogram and identify the presence of a peak syntax based on an analysis of the grammar element types assigned to the data points of the chromatogram.

Abstract: A method for converting a sampling frequency of a digital signal sampled at a first sampling frequency includes receiving digital signal input samples, and forming output samples corresponding to a second sampling frequency based on the digital signal input samples and an interpolation filter. The first sampling frequency may be larger than the second sampling frequency. The method may further include delivering the output samples. Forming output samples includes, for each of the digital signal input samples, updating current values of N successive output samples with N contributions. The N contributions may be respectively calculated based on a value of a current input sample of the digital input samples weighted by values of N filter coefficients associated with the current input sample, N being fixed and identical for all the digital signal input samples regardless of a value of the conversion ratio between the first and second sampling frequencies.

Abstract: A method of computing matrices of discrete-frequency Discrete Fourier Transform (DFT) coefficients, the method including the steps of (a) for a first frame (10) of samples, multiplying a frame of samples of a discrete-time signal by a twiddle factor matrix (F1, F2) to compute a matrix of DFT coefficients for that first frame, and storing a computation resulting from multiplication of the second half of the frame (b) of samples by the right half (F2) of the twiddle factor matrix; and (b) for each subsequent frame (12, 14) of samples, wherein each subsequent frame overlaps a preceding frame by half, (i) retrieving the stored computation from the preceding frame, inverting the sign of the stored computation every second frame; (ii) multiplying the second half of the current frame of samples by the right half of the twiddle factor matrix, and storing the resultant computation; and (iii) adding the results of steps (i) and (ii).

Abstract: A digital image-processing device with a Bayer sensor and an image memory is provided in which the image data of the sensor is written into an image memory, and from this image memory, image data in the Bayer format with a length L and a width B is written continuously into a data buffer, and in which the sample values are combined by means of a computational device with the help of adders, in each case symmetrically to a central point of one or more (2n+1)×(2n+1) neighborhoods, and one or more (n+1)×(n+1) matrices are derived by means of the computational device, and from this (n+1)×(n+1) matrix or these matrices, with the help of additional adders, at least one n×n matrix is formed, and a first color component is in each case calculated from this by means of an adder network.

Abstract: A product-sum operation circuit has delay circuits of the first to the (n?1)th stage for delaying musical tone data, multiplying circuits 60-6(n?1) for multiplying the musical signal data or the delayed musical signal data output from the delay circuits by impulse response coefficients, and adders 71-7(n?1) for summing up data output from the multiplying circuits. The product-sum operation circuit is provided with a feed back circuit. The feed back circuit includes a multiplying circuit 80 that receives the delayed data from the delay circuit at the (n?1)th stage and multiplies the received data by a multiplication coefficient, and an adder 81 for adding data from the multiplying circuit 80 to the delayed data from the delay circuit at the “p”th stage.

Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, some embodiments of the present invention provide data processing circuits that include both a main data processing circuit and an adaptive setting determination circuit. The main data processing circuit receives a series of data samples and includes: an equalizer circuit and a data detector circuit. The equalizer circuit receives the series of data samples and provides an equalized output. The equalizer circuit is controlled at least in part by a coefficient. The data detector circuit receives the equalizer output and provides a main data output based at least in part on a target. The adaptive setting determination circuit receives the series of data samples and the main data output, and operates in parallel with the main data processing circuit to adaptively determine the coefficient and the target.

Abstract: Systems and methods for converting a data stream from a first sample rate to a second sample rate using a sample rate converter that employs selectable filters. In one embodiment, the filters are implemented by providing multiple sets of filter coefficients in a memory, selecting one of the sets of filter coefficients and performing coefficient interpolation to produce filter coefficients that are convolved with the input data stream to produce a re-sampled output data stream. The input signal can be an audio signal that is convolved with interpolated polyphase filter coefficients in the sample rate converter of a digital PWM audio amplifier. The set of filter coefficients can be selected by a value stored in a filter selection register that is modifiable by a DSP or by user input. The sets of filter coefficients can be stored in a single memory and interpolated according to a cubic spline interpolation algorithm.

Abstract: A method for finite impulse response (FIR) digital filtering is provided that includes generating a frequency domain sample block from an input sample block of length L, adding the computed frequency domain sample block to a reverse time-ordered set of previously generated frequency domain sample blocks as a newest frequency domain sample block, computing a spectral multiplication of each of K newest frequency domain sample blocks in the reverse time-ordered set with a corresponding frequency domain filter block in a time-ordered set of K frequency domain filter blocks of a FIR filter, adding the K results of the K spectral multiplications to generate an output spectral block, inverse transforming the output spectral block to generate a time domain output block, and outputting L filtered output samples from the time domain output block.

Abstract: The present invention is directed to improve efficiency of a filter processing on an image. A filter processing module includes a filter circuit and a control circuit. The filter circuit includes: a first register capable of storing data; a first arithmetic logic unit capable of executing a first filter processing on the basis of output data of the first register; a second register capable of storing a result of the arithmetic operation of the first arithmetic logic unit; and a second arithmetic logic unit capable of executing a second filter processing on the basis of output data of the second register. The control circuit adjusts the number of pieces of data which is input per cycle in the first register in accordance with the number of taps in the first filter processing, size of an execution result of the first filter processing, and the number of second arithmetic logic units, thereby promptly completing the first filter processing.

Abstract: A system and method for performing convolutions on image data using pre-computed acceleration data structures is disclosed. The method may include calculating intermediate convolution values for each of a plurality of blocks of pixels by performing an associative operation on the pixel values in each block. Each intermediate value may be associated with the block and indexed dependent on index values of pixels in the block. An image pyramid may include intermediate convolution values for multiple levels of acceleration by calculating intermediate convolution values for multiple block sizes. A convolution result for a kernel of an image may be produced by performing the associative operation on intermediate convolution values for non-overlapping blocks enclosed within the kernel and on pixel values associated with pixels in the kernel but not in one of the non-overlapping blocks. The methods may be implemented by program instructions executing in parallel on CPU(s) or GPUs.

Abstract: A programming algorithm reduces from ? (2N2) to ? (N2) the number of multiply-and-accumulate (MAC) instructions required to perform a discrete-time convolution on a programmable digital signal processor. Through the use of a single repeat instruction along with a single repeat count register, the algorithm dynamically changes the number of times the multiply-accumulate instruction is repeated depending upon the current term being convolved. The avoids performing the multiply-accumulate when one term is zero. The nature of the discrete-time convolution calculation and the flexibility of a re-programmable single repeat count register offers permits this. Additional instructions are required for data pointer alignment. The trade-off between reduced multiply-accumulate operations and the overhead required to achieve it is examined.

Abstract: Tap coefficients for a filter for removing a ghost signal are converged to optimum values in a short time. The waveform equalizing device includes: an initial tap coefficient generation section for determining and outputting the initial values of tap coefficients for a FIR filter and an IIR filter based on a plurality of correlation values; and a tap coefficient updating section for outputting the initial values of tap coefficients for the FIR filter and the IIR filter to these filters and updating tap coefficients for these filters based on error information.

Abstract: A method for applying a computation utilizing a processor (112) capable of accessing an on-chip memory (114) and data from an off-chip source (116), the method comprising the iterative steps of retrieving at the on-chip memory (114) successive frames of input data from the off-chip source (116); computing from a current input frame of data (30) available in the on-chip memory current result elements for completing a current output frame of results (33, 34, 35), and pre-computing from the current frame of input data future result elements for contributing to at least one future output frame of results.

Abstract: A system for calculating a convolution of a data function with a filter function utilizing an array of processors including first and last processors. A coefficient value based on a derivation of the filter function and a data value representative of the data function are multiplied to produce a current intermediate value. Except in the first processor, a prior intermediate value is then added to the current intermediate value. Except in the last processor, the data and current intermediate values are then sent to the next processor. Then the last processor's prior intermediate value, if any, is added to its current intermediate value to produce a result value, wherein the result values collectively are representative of the convolution of the data function with the filter function.

Abstract: A first series of filter coefficients stored in a memory itself corresponds to a given filter characteristic such as a given high cutoff frequency. A second series of filter coefficients is generated by performing an interpolation process on the first series of filter coefficients. At that time, the contents, such as interpolation coefficients, of the interpolation process are varied in correspondence to a desired filter characteristic to be achieved, so that the interpolation process generates a second series of filter coefficients according to an impulse response characteristic that is obtained as a consequence of expanding or compressing, in a time-axis direction, an impulse response characteristic represented by the given first series of the filter coefficients. Thus, by the interpolation process, there is produced such a second series of filter coefficients that achieves a different filter characteristic (e.g., different high cutoff frequency).

Abstract: Digital filters are provided that include a converter and a data processor. The converter converts successive strings of M successive data elements that occur at a system rate Fs in an input data stream Din to M parallel data elements that respectively occur at a substream rate Fs/M in M data substreams Dsbstrm. At a reduced substream rate Fs/M, the processor generates M convolutions of the filter's quantized impulse response with the M data substreams wherein each of the convolutions is arranged to generate a different one of M successive filtered output signals. Because the convolutions are conducted at the reduced substream rate Fs/M, the filters can operate at increased system rates. Preferably, the digital filter also includes a multiplexer that selects, at the system rate Fs, the M filtered output signals in successive order to thereby form a filtered output data stream Dout.

Abstract: A delay addressed data path register file is designed for use in a programmable processor making up a cell in a multi-processor or array signal processing system. The delay addressable register file is particularly useful in, inter alia, adaptive filters where the filter update latency is variable, interpolation filters where the interpolation factor needs to be programmable, and decimation filters where the decimation factor needs to be programmable. The programmability is achieved in an efficient manner, reducing the number of cycles required to perform this task. A single parameter, the “delay limit” value, is programmed at start-up, setting up an internal delay-line within the register file of the processor. Thus, any of the delayed registers can be addressed by specifying the delay index during run-time. The delay line advances one location, modulo “delay-limit”, when the processing loop starts a new iteration.

Abstract: A device for processing digital data. A module (M2, M3) produces on a data vector of the frequency domain Z(k), wherein K varies from 0 to N?1, a convolution with a function U, convolution which corresponds to a cancellation in the time domain of the samples of the inverse transform of Z(k). The function U is in the form: U(k)=sin c(k?k0/2.e)?j?(?(k?k0/2.P(k)), wherein K0 is a constant integer and P(k) a weighting window symmetrical about k0.

Abstract: A training circuit for training a tap coefficient of an adaptive equalizer that performs error calculations in a training process and updating of the tap coefficient in a time area and thereby makes the tap coefficient converge stably in a short time.

Abstract: A method and apparatus are provided for changing the pitch of a tabulated waveform in wavetable based synthesizers. Harmonics that normally would be aliased before a transposition process are removed by a discrete time low pass filter at the same time that the tabulated waveform is reconstruction and resampling.

Abstract: A collected data is divided into M single valued subsets, where M is greater than zero. A two-dimensional subset image is formed from each single valued subset. Then, a fast Fourier transform is performed on each image to obtain a two-dimensional subset frequency space. Next, a one-dimensional discrete Fourier transform in z, where z is an integer equal to or greater than zero, is performed. Lastly, a two-dimensional discrete Fourier transform in (x,y) for each value of z is performed, thereby forming the three-dimensional volume from the collected data set.

Abstract: A system (100) for signal processing using one or more filters includes a controller (102) that partitions an impulse response of a filter into a plurality of impulse response blocks and calculates a Discrete Fourier Transform (DFT) of each impulse response block using a Fast Fourier Transform (FFT) algorithm. A processor (104) that is coupled to the controller (102) receives an input sample block including samples of a signal to be processed and receives the DFT of each impulse response block from the controller (102). The processor (104) calculates a DFT of the input sample block using an FFT algorithm, performs a spectral multiplication of the DFT of the input sample block with the DFT of each impulse response block, overlap-adds the blocks resulting from each spectral multiplication to create an output spectral block, performs an inverse FFT on the output spectral block to create an output sample block, and communicates the output sample block.

Abstract: A digital filter includes a plurality of filter cells, each of which includes circuitry to determine a coefficient for the filter cell, to adjust the coefficient in accordance with a gain that is used by each of the plurality of filter cells, and to multiply input data by the adjusted coefficient in order to generate a filter cell output. An adder circuit generates a filter output by adding filter cell outputs from each of the plurality of filter cells, and an inverse gain circuit adjusts the filter output in accordance with an inverse of the gain used to adjust the coefficients of the plurality of filter cells.

Abstract: A method and apparatus are provided for changing the pitch of a tabulated waveform in wavetable based synthesizers. Harmonics that normally would be aliased before a transposition process are removed by a discrete time low pass filter at the same time that the tabulated waveform is reconstruction and resampling.

Abstract: A signal processing algorithm has been developed in which a filter function is extracted from degraded data through mathematical operations. The filter function can then be used to restore much of the degraded content of the data through use of any deconvolution algorithm. This process can be performed without prior knowledge of the detection system, a technique known as blind deconvolution. The extraction process, designated Self-deconvolving Data Reconstruction Algorithm (SeDDaRA), has been used successfully to restore digitized photographs, digitized acoustic waveforms, and other forms of data. The process is non-iterative, computationally efficient, and requires little user input. Implementation is straight-forward, allowing inclusion into all types of signal processing software and hardware.

Abstract: A system is provided for digitally processing a one-dimensional digital signal, including convolving the one-dimensional digital signal with a function that is the (n+1)th difference of an nth order discrete piecewise polynomial kernel so as to provide a second one-dimensional digital signal. Here, ‘n’ is at least 1, the polynomial kernel has a plurality of non-zero elements, the function has a plurality of non-zero elements and at least one zero element, and the function has fewer non-zero elements than the polynomial kernel has non-zero elements. Then, the second one-dimensional digital signal is discretely integrated n+1 times. Also, multi-dimensional signals are dimensionally separated and processed using a function for each dimension.

Abstract: An image processing method using memory management and pre-computed look up tables to speed up computations. Application of filters along directions other than image rows is simplified using several structured processing approaches that improve image data cache-ability. Time consuming or repeated computations are pre-computed and stored as look up tables to reduce the time required for image processing and to remove or reduce the need for special purpose image processing hardware.