As Input Or Output Patents (Class 710/12)
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Patent number: 6681268Abstract: A personal computer system enables simultaneous use of a relative-coordinate-mode input device and an absolute-coordinate-mode input device, thereby allowing correct input of absolute coordinate data, such as for characters. A pad-type first input device and a stick-type second input device are provided for a notebook computer. The first input device outputs both absolute coordinate data and relative coordinate data. The second input device outputs only relative coordinate data. When the absolute coordinate data is output, the relative coordinate data format is converted into the same format as the absolute coordinate data, and ID information for distinguishing the relative coordinate data from the absolute coordinate data is added to part of the relative coordinate data format.Type: GrantFiled: December 23, 1999Date of Patent: January 20, 2004Assignee: Alps Electric Co., Ltd.Inventors: Yoshiyuki Kikuchi, Shoji Suzuki, Kouichi Miura, Akihisa Itoh
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Patent number: 6681277Abstract: Two transfer modes of a band-guaranteed cycle and an event-driven asynchronous cycle are defined in a multimedia bus. In the band-guaranteed cycle, stream data is transferred between nodes in real time using a reserved band for each cycle time. Both a single-edge access and a double-edge access are provided for the stream data transfer in the band-guaranteed cycle, and it is possible to select one of the single-edge access and double-edge access for each data transfer between nodes. The transfer band of stream data on the bus can thus be expanded and the transfer efficiency of AV stream can be improved.Type: GrantFiled: August 23, 2000Date of Patent: January 20, 2004Assignee: Kabushiki Kaisha ToshibaInventor: Yasuhiro Ishibashi
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Patent number: 6651111Abstract: The present invention provides for a virtual serial port (VSP) situated between a serial port in a mobile electronic device, applications that require a serial port connection handle, and other applications that require command-mode access to the serial port. Data-communication applications (e.g. web browsing, e-mail, etc.) connect to the serial port through the VSP. The VSP creates a virtual connection handle that is returned to the application. Command-mode requests (e.g., short messaging requests) are received by the hardware abstraction layer, translated into command-mode messages (e.g., AT commands) and placed in a queue. The VSP multiplexes the serial port between the currently-open data communication session (data-mode) and command-mode messages by periodically suspending the currently-open connection and processing one or more command-mode messages that are in the queue. A buffer continually stores incoming data while the data communication session is suspended.Type: GrantFiled: February 16, 2001Date of Patent: November 18, 2003Assignee: Microsoft CorporationInventors: Roman Sherman, Scott R. Shell
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Patent number: 6643721Abstract: A computer user interface and method for its operation are disclosed. The interface uses a new architecture that allows it to adapt readily to the type of input device being used to operate the computer. The look and feel of the interface depends on which input device is selected as primary. Thus, when mouse/keyboard is the primary input device, the interface-controllable elements such as scrollbars, buttons, icons, menus, lists, and dialog boxes may appear as with a conventional GUI. When a different physical input device is primary, such as pen or speech recognition, the look and feel of these elements can change to be more appropriate for that device. This change is virtually transparent to the applications utilizing the user interface.Type: GrantFiled: March 22, 2000Date of Patent: November 4, 2003Assignee: Intel CorporationInventor: Jiming Sun
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Patent number: 6640256Abstract: An input apparatus or keypad (14) for computers and networks is provided. The keypad (14) has a palm size housing (20) having an extended opening (30) in its top surface (28). An input or key assembly (32) mounted in the opening (30) has a number of keys (34) arrayed in a 6 by 4 matrix, for example, to which operator can access to input information. The housing (20) includes a processor for processing information input using keys into a corresponding signal, and a transmitter for transmitting the resultant signal to a receiver of the computer or network by wireless. In particular, the keypad (14) is designed ergonomically so that the operator can learn an input operation with ease and time-consuming and push keys so quickly.Type: GrantFiled: October 6, 1999Date of Patent: October 28, 2003Assignees: J. Morita Manufacturing CorporationInventor: Daryl Raymond Beach
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Patent number: 6618771Abstract: A method and apparatus are provided for interactively guiding a user through a scanner installation procedure. When a scanner installation program is launched, the scanner installation program causes various screens having various options to be displayed to a user. The screens provide the user with information that guides the user step-by-step through the scanner installation procedure. The scanner installation program automatically detects which I/O ports of the user's computer are available for connection to the scanner and displays a message to the user indicating which I/O port(s) is available for connection to the scanner. The scanner installation program then provides the user with the option of seeing a visual demonstration of steps that need to be taken by the user in connecting the scanner to the available I/O port of the computer.Type: GrantFiled: February 16, 2000Date of Patent: September 9, 2003Assignee: Hewlett-Packard Development Company, LP.Inventors: Tina Marie Leja, Michelle A Watson, John D Mathis, Laurie Anderson, Erin E Geegan, Robert M Fontaine
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Publication number: 20030154331Abstract: Disclosed herein are a method and system for sharing a single GPIO line of an integrated circuit (IC) between at least two circuit components connected concurrently, wherein at least one of the circuit components is to provide input via the GPIO line and at least one circuit component is to receive output via the GPIO line. The input and output can be provided at separate times with the status of the GPIO line changing accordingly or, provided that the input is provided at a lower frequency relative to the switching frequency of the GPIO line, an input to the IC can be provided concurrent with an output from the IC since the low frequency input typically persists until an input cycle of the GPIO line. The present invention finds particular benefit when implemented to interface with GPIO lines of a microprocessor.Type: ApplicationFiled: February 13, 2002Publication date: August 14, 2003Applicant: GlobespanVirata IncorporatedInventors: James E. Bader, Don R. Crafton, Bankim M. Wani
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Patent number: 6591314Abstract: A method and an apparatus for automatically selecting an input device from a plurality of input devices coupled to an information handling system via a plurality of inputs, each corresponding to one of the plurality of inputs are disclosed. The plurality of inputs are scanned by a signal detector for the presence of a signal provided by one of the input devices to determine whether a signal is present on one of the inputs provided by the corresponding input device. When a signal is detected, the automatic video multiplexer selects the input on which a signal is detected according to a predefined hierarchy such that the information handling system receives the input signal provided by the corresponding input device. If a signal from a new input device is detected, the input corresponding to the new input device is selected, and the input device is configured to operate in conjunction with the information handling system.Type: GrantFiled: August 30, 1999Date of Patent: July 8, 2003Assignee: Gateway, Inc.Inventor: Mark Allan Colbath
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Patent number: 6587895Abstract: A method and apparatus for generating reminder messages based on a freeform input is disclosed. In one embodiment, freeform inputs are handwritten annotations on paper that are scanned into a computer system. Based on information contained in the freeform input, the system creates a reminder message and transmits it in response to a time reference contained in the freeform input. In an alternative embodiment, freeform digital ink inputs may be directly entered into a pen computer system via a stylus. Reminder messages may be delivered over a computer display, facsimile device, via email, telephone or portable paging device.Type: GrantFiled: August 3, 1999Date of Patent: July 1, 2003Assignee: Xerox CorporationInventors: Gene Golovchinsky, Morgan N. Price, William N. Schilit
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Patent number: 6580288Abstract: The present invention is embodied in a system and method for sharing input and output pins between a plurality of separate logic circuits coexisting within a single microprocessor such that the microprocessor is capable of assuming the characteristics of a desired logic circuit. The present invention achieves controlled sharing of bidirectional input and output pins without the requirement to use multiplexing logic. Because the pins may be shared among a plurality of logic circuits, a single microchip may be used for completely different purposes by enabling or disabling selected logic circuits. In other words, a single microchip can take on any number of properties by simply enabling one or more logic circuits while disabling other.Type: GrantFiled: September 9, 1999Date of Patent: June 17, 2003Assignee: International Business Machines CorporationInventor: Kenneth Douglas Klapproth
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Patent number: 6574515Abstract: A two-wire field-mounted process device with multiple isolated channels includes a channel that can be an input channel or an output channel. The given input or output channel can couple to multiple sensors or actuators, respectively. The process device is wholly powered by the two-wire process control loop. The process device includes a controller adapted to measure one or more characteristics of sensors coupled to an input channel and to control actuators coupled to an output channel. The controller can be further adapted to execute a user generated control algorithm relating process input information with process output commands. The process device also includes a loop communicator that is adapted to communicate over the two-wire loop.Type: GrantFiled: May 12, 2000Date of Patent: June 3, 2003Assignee: Rosemount Inc.Inventors: William R. Kirkpatrick, Robert J. Karschnia, Marcos Peluso, Steven J. DiMarco, Gary A. Lenz
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Patent number: 6574677Abstract: This specification discloses a method for using a smart card on an HPC, which, through the combination of the HPC and a smart card reader and a driver, controls the smart card reader. This also provides application programs a public interface for the user to manipulate the smart card reader for data transmission with the HPC.Type: GrantFiled: February 23, 2000Date of Patent: June 3, 2003Assignee: Inventec CorporationInventors: Jeff Song, Kuang Shin Lin, Xiue Wu Wang, Bin Lo
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Patent number: 6505258Abstract: A system is disclosed for allowing surprise insertion and removal of a peripheral device from the bays of a portable computer system. The peripheral device may be inserted or removed when the portable computer system is powered off, powered on, or in standby or sleep mode. The peripheral device may be any one of a multitude of devices corresponding to the IDE, ATAPI or FLOPPY standard. Insertion or removal of the device is operating system and BIOS independent. A constantly executing detection process determines when a peripheral device has been inserted into or removed from a bay. A multilevel device driver allows layered functionality and simplified interfacing between the operating system and computer system and peripheral hardware. Layering of the multilevel device driver allows simplified BIOS firmware. Identification and configuration of the peripheral device is handled by a IDE/ATAPI bridge device driver that is capable of recognizing any IDE, ATAPI or FLOPPY device inserted into a bay.Type: GrantFiled: February 29, 2000Date of Patent: January 7, 2003Assignee: Compaq Information Technologies Group, L.P.Inventors: Premanand Sakarda, Lan Wang
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Publication number: 20030005187Abstract: Sockets of a computing environment are optimally tuned, even though the environment is dynamic. The tuning is based on information dynamically determined at the time a socket is opened. The information includes, for instance, application specific information and/or socket specific information. Based on the information, one or more parameters of the socket, such as a socket send buffer size and/or a socket receive buffer size, are set to reflect the current configuration of the environment.Type: ApplicationFiled: June 27, 2001Publication date: January 2, 2003Applicant: International Business Machines CorporationInventors: Bernard A. King-Smith, Gary J. Mincher, Murray J. Richman
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Publication number: 20020144024Abstract: A method and system for assigning logical port identification for multiple peripheral devices that may be connected to a peripheral server in a network environment is disclosed. The assigned logical port identification enables client computers to utilize client software to communicate with and control operation of the peripheral devices, even though the peripheral devices may be connected to the server with different types of physical interfaces, such as parallel port interfaces or by a Universal Serial Bus interface. The invention permits peripheral devices to be added and removed without producing peripheral device malfunctions and other problems that often occurred in the prior art.Type: ApplicationFiled: March 30, 2001Publication date: October 3, 2002Inventors: David A. Kumpf, Armando Guzman
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Patent number: 6460095Abstract: A data transfer apparatus and a data transfer system intended to transfer data continuously input or output to/from a main memory without any interruption and to transfer continuous data on a general-purpose bus such as a PCI bus, and a recording medium storing a program that commands a computer to execute all or some of functions of each component of the data transfer apparatus or the data transfer system.Type: GrantFiled: December 15, 1999Date of Patent: October 1, 2002Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Takafumi Ueno, Junichi Komeno
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Patent number: 6457069Abstract: A computer system allows devices to be unmasked so to be detected or to be masked invisible to the Plug-and-Play architecture or similar architectures. When operating under Plug-and-Play, which assigns systems resources to system devices in a predetermined order despite a limited number of such resources, a user uses software to set the switch in the device's memory such that an undesired device becomes “invisible” to a subsequent power-up configuration of the system. Device configuration proceeds in two phases. During a first configuration phase, the invisible device cannot be configured, i.e. cannot be assigned resources, including interrupt request lines. Hence, those lines remain available to other devices on the system that would not have received resource allocation during a prior-art configuration. During the first phase, the other devices can be assigned the necessary resources to operate properly. Thus, software can command a configuration that would otherwise be impossible.Type: GrantFiled: July 23, 1998Date of Patent: September 24, 2002Assignee: Compaq Information Technologies Group, L.P.Inventor: Paul C. Stanley
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Patent number: 6421234Abstract: Electronics devices having a housing with ergonomic features that enhance the ability of a user to hold the electronics devices for extended periods of time using different grips. The housing has a middle gripping region that is narrower than a top section and a bottom section positioned to either side of the gripping region. A keypad structure is positioned at the middle gripping section on a front surface of the housing. The back surface of the housing has a depression positioned generally at the midline of the housing. The depression engages the fingertips, the palm, or other portions of the hand when the user holds the electronics device. Rounded corners where the lateral surface of the housing meet the front surface and the back surface contribute to the user's comfort when holding the electronics device.Type: GrantFiled: October 10, 2000Date of Patent: July 16, 2002Assignee: Juniper Systems, Inc.Inventors: Jeffery D. Ricks, Gary D. Spence, Ronald H. Campbell
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Patent number: 6397265Abstract: An output apparatus for receiving input data from an information processing apparatus through a network and for forming and outputting output data, comprises: a substituting unit for substituting a process to form the output data from the input data to a function of another output apparatus through the network; and an outputting unit for obtaining the data derived by substituting the process to the another output apparatus and for forming and outputting the output data.Type: GrantFiled: December 5, 1997Date of Patent: May 28, 2002Assignee: Canon Kabushiki KaishaInventor: Shinichi Iwamoto
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Patent number: 6378007Abstract: In a tape drive, or other storage device, used for storing computer data, both record data and record structure information such as file marks are encoded with codewords to form an encoded data stream. Of the fixed number of possible fixed-length codewords, one codeword is assigned as a root sequence for one or more longer codewords. Thus, detection of the root sequence during decoding of an encoded data stream triggers the reading of a fixed number of further bits. The further bits represent file marks and any other defined information. In the tape drive (800), the tape drive interface (810) receives record data and file mark commands. The formatter (820) encodes the record data as fixed length codewords.Type: GrantFiled: October 30, 1998Date of Patent: April 23, 2002Assignee: Hewlett-Packard CompanyInventor: Simon David Southwell
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Patent number: 6345317Abstract: A device controller is provided between a plurality of processors and a plurality of input/output devices each having a plurality of input/output terminals. The device controller manages mapping data defining a mapping of the input/output devices and terminals to the processors as well as their state data indicating a mounted state, a not-mounted state, etc., and controls the transmission/reception of information between the processors and the input/output devices by referring to the mapping data and state data. The device controller includes a data change controller which performs data addition, deletion, or updating on the mapping data to accommodate a system change.Type: GrantFiled: May 5, 1999Date of Patent: February 5, 2002Assignee: Fujitsu LimitedInventor: Kazumasa Takeda
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Patent number: 6336149Abstract: A macro recording and playback device has inputs for coupling to a plurality of computer input devices. The computer input devices provide a sequence of input messages for performing a repetitive function. In a record mode, a macro indicative of the sequence of input messages is stored in a memory, with an identifier associated with the macro. In a playback mode, the macro causes output messages to a computer device which are indicative of the serious of input messages. Thereby, playing the macro causes the computing device to perform the repetitive function. Further, a method is disclosed for receiving in a parallel manner a sequence of input messages from computer input devices, with the parallel messages forming a data word. The sequence of data words are stored, forming a macro. When the macro is selected and played, messages are sent to the computer device indicative of the received input messages.Type: GrantFiled: January 26, 1999Date of Patent: January 1, 2002Inventor: Glenn W. Preston
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Patent number: 6334161Abstract: A host computer logs in an image providing device such as a scanner connected by a serial bus, and reverses flow control of data transfer by issuing a Reverse command. The image providing device opens a transfer channel by an OpenChannel command, transfers image data in form of blocks. When the transfer of the image data has been completed, the image providing device closes the transfer channel by a CloseChannel command, and reverses the flow control of the data transfer again by the Reverse command. This changes the data transfer direction of a device having a bi-directional data transfer function, i.e., a device having a data reception function and a data providing function.Type: GrantFiled: February 17, 1998Date of Patent: December 25, 2001Assignee: Canon Kabushiki KaishaInventors: Naohisa Suzuki, Koji Fukunaga, Kiyoshi Katano, Jiro Tateyama, Atsushi Nakamura, Makoto Kobayashi
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Publication number: 20010054119Abstract: An integrated data storage control system provides, in a single integrated circuit, RDC, servo logic, ATA interface, microprocessor, and other formerly discrete components in one highly integrated system design. The integrated circuit is rendered using a single integrated circuit technology type (e.g., digital CMOS) for all components. Analog and digital circuits are combined in such a way as to eliminate or reduce noise or interference in digital circuits from analog circuit components. Individual elements may have their outputs and inputs MUXed together such that individual elements can be selectively switched (during testing modes) such that the integrated circuit emulates or behaves in the same or similar manner as one of the prior art components. The present invention may be applied to magnetic hard disk drives (HDDs) or other types of storage devices such as floppy disk controllers, optical disk drives (e.g., CD-ROMs and the like), tape drives, and other data storage devices.Type: ApplicationFiled: June 28, 2001Publication date: December 20, 2001Inventors: Siamack Nemazie, Kaushik Popat, Balaji Virajpet, William R. Foland, Roger McPherson, Maoxin Wei, Vineet Dujari, Shiang-Jyh Chang
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Patent number: 6327632Abstract: A pin control unit and a plurality of addressable storage locations are provided to an integrated circuit to control the input/output (I/O) pins of a functional block of the integrated circuit or the I/O pins of the integrated circuit. Multiple ones of the addressable storage locations are correspondingly coupled to I/O buffers associated with the I/O pins. The pin control unit selectively loads bit values into appropriate ones of the addressable storage locations. In response, the I/O buffers input bit values from and/or output bit values to the corresponding I/O pins. The pin control unit controls subsets of the I/O pins in a coordinated manner as I/O ports. The pin control unit also controls data movement between the addressable storage locations and various temporary storage elements of the functional block/integrated circuit.Type: GrantFiled: January 14, 1999Date of Patent: December 4, 2001Assignee: Brecis CommunicationsInventor: Donald L. Sollars
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Patent number: 6314475Abstract: A communication system for monitoring and/or controlling communication parameters of a communication device. The communication system monitors a communication channel that is created when the communication device connects to a network, controls the communication device as it operates on the network, and configures the communication device. The communication device is commonly a modem and is communicatively coupled to the network to carry out ongoing communications between the modem and the network through the communication channel. Further, a software module is associated with the modem, and the software module accesses the internal settings of the modem via the communication channel (if necessary) and performs operations such as monitoring, controlling, and configuring the modem (or other communication device) using the internal settings of the modem.Type: GrantFiled: November 16, 1998Date of Patent: November 6, 2001Assignee: Conexant Systems, Inc.Inventors: Zeev Collin, Tal Tamir
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Patent number: 6263385Abstract: A first and second integrated circuit contain respectively a first and second portion of a parallel port, the first portion includes control, configuration, data and status registers and the second portion includes parallel port input and output terminals. A bus couples the first and second integrated circuits and transfers parallel port control and data information between the first and second integrated circuits. The bus includes a clock line providing a clock signal. The bus also includes a data out line that serially transfers output control and data bits from the first to the second integrated circuit, the data and control bits to be provided to the parallel port output terminals on the second integrated circuit. The bus also includes a data in line providing input data and control information from the terminals of the parallel port to the first integrated circuit.Type: GrantFiled: October 20, 1997Date of Patent: July 17, 2001Assignee: Advanced Micro Devices, Inc.Inventors: Dale E. Gulick, David Neal Suggs
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Patent number: 6212579Abstract: A method and system for associating and selecting a set of I/O components as a source or destination of I/O data directed to or from an application. A set of I/O components are modeled as a component object model which becomes a generic access device (GAD) for those components. Relevant interfaces to the components are instantiated within the GAD. The GAD then hands out the interfaces to applications wishing to access the I/O devices modeled by the GAD. The application is thereby enabled to carry out meaningful communication with the I/O devices to which the GAD provided interfaces.Type: GrantFiled: January 22, 1999Date of Patent: April 3, 2001Assignee: Intel CorporationInventor: Jay Connelly
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Patent number: 6212580Abstract: An integrated recorder system includes a recorder main part having a control unit which records instrumental data in a data memory, the control unit and the data memory being interconnected by a shared bus. A plurality of modules are arbitrarily inserted in or withdrawn from the recorder main part, the modules including an input module, the input module having a connector terminal from which an instrumental signal is supplied. A data interface unit is provided in the recorder main part and has a plurality of slots which connect the plurality of modules inserted therein to the data interface unit, the data interface unit being controlled by the control unit through the bus to read the instrumental signal from the input module when inserted in the recorder main part, such that the instrumental data is recorded in the data memory, and controlled by the control unit through the bus to transmit the instrumental data, recorded in the data memory, to an output module when inserted in the recorder main part.Type: GrantFiled: October 13, 1998Date of Patent: April 3, 2001Assignee: Teac CorporationInventors: Keizo Ihara, Shizuo Hosaka, Mineaki Kumamoto
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Patent number: 6199136Abstract: A PC-based home automation system uses a low data-rate transport layer and COM-based software components for control of devices in a home automation network. The home automation system is merged with a messaging-based HAVi-network that uses IEEE 1394 as a high data-rate transport layer. The HAVi-network controls audio/video equipment in a home entertainment system. The home automation services and devices are registered as a HAVi-compliant elements with the HAVi network's FAV or IAV device. The home automation resources (devices and services) have both COM OLE Automation Interfaces and HAVI-compliant interfaces to permit control of the home automation system from the HAVi-network.Type: GrantFiled: September 2, 1998Date of Patent: March 6, 2001Assignee: U.S. Philips CorporationInventor: Yevgeniy Eugene Shteyn
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Patent number: 6182163Abstract: A basic system of an NC unit and a distributed type remote I/O unit executes time division signal transaction through a half-duplex serial communication line, and in case where the distributed type remote I/O can not detect a receiving start state of a transmission frame from the basic system of the NC unit for a specified period of time, output is reset, and the basic system of the NC unit checks a type of and data setting in the distributed type remote I/O unit, and also checks a result for an input/output test and the current situation of communication according to a header pattern of a transmission frame.Type: GrantFiled: July 16, 1998Date of Patent: January 30, 2001Assignee: Mitsubishi Denki Kabushiki KaishaInventors: Akihiro Yamashita, Junichi Mito
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Patent number: 6157975Abstract: A method and apparatus for providing a programming interface to a Universal Serial Bus Device. The programming interface is partitioned so that an external controller does not handle intermediate transfers such as packet retry, handshake packets or intermediate response to error conditions. The programming model consists of a number of endpoint pipes, each of which can be configured to provide one of several functions.Type: GrantFiled: January 7, 1998Date of Patent: December 5, 2000Assignee: National Semiconductor CorporationInventors: David Brief, Kent Bruce Waterson
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Patent number: 6138177Abstract: A system in accordance with the invention provides a chipset for use generally in a PC-type system and that includes a plurality of programmable I/O (PIO) pins. Each of the PIO pins can be programmed to carry signals in accordance with any function in a function pool. In one embodiment, the number of PIO pins total 32 and the number of functions total 70. Such programmability allows a single-chip chipset to be vendor platform-generic while simultaneously minimizing pin count.Type: GrantFiled: December 30, 1997Date of Patent: October 24, 2000Assignee: OPTi Inc.Inventors: Mark Williams, Jay Li
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Patent number: 6128673Abstract: A digital protocol translator including a first protocol circuitry having a first I/O port adapted to communicate using a first digital protocol, the first protocol circuitry including a first controller. The translator further includes a second protocol circuitry having a second I/O port communicating using a second digital protocol different from the first digital protocol, the second protocol circuitry including a second controller in communication with the first controller, such that communications between the first I/O port and the second I/O port are translated between the first protocol and the second protocol. Preferably, the translator further includes a microprocessor and digital memory, where the microprocessor operates under the control of a program stored in the memory.Type: GrantFiled: November 14, 1997Date of Patent: October 3, 2000Inventors: Michael D. Aronson, Joel Silverman
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Patent number: 6125409Abstract: A method for downloading functions between a personal computer including one or more processors, a memory, an input/output unit and a communication unit, and a memory or input/output PCMCIA card having a buffer memory, a PCMCIA Interface is provided between the computer and the cared. The method loads into the buffer memory, through fast access to the memory, a function which is directly sent to the processor of the PCMCIA card for execution.Type: GrantFiled: April 7, 1998Date of Patent: September 26, 2000Inventor: Jean Yves Le Roux
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Patent number: 6108716Abstract: A keyboard-detachable data processing unit which keeps a display unit stable under any condition. A link mechanism linking a system unit and a display unit comprises a guide which runs from front to back, a slider which swivels along the guide, and a swinging arm with one end on a system unit and the other end at a position between the base and the tip of the display unit, both ends capable of swiveling. The base of the display unit is on the swiveling slider, and the slider crank mechanism is composed of the display unit, slider, and swinging arm. The center of gravity G of the display unit is always within the upper area of the system unit regardless of whether the display unit is opened or closed.Type: GrantFiled: October 28, 1997Date of Patent: August 22, 2000Assignee: Hitachi, Ltd.Inventors: Koichi Kimura, Hideaki Genma, Tsuyoshi Nakagawa, Hideki Kamimaki, Kotaro Matsuo
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Patent number: 6081854Abstract: An input circuit for an input/output device adapted for use in a computer system in which a command includes information indicating an application program which initiated the command, the input circuit including a first-in first-out (FIFO) buffer circuit having a plurality of stages, each stage providing storage for commands from application programs including both data and an address for the data, a direct memory access circuit for transferring data between a buffer established in system memory by an application program and the FIFO buffer circuit, computer implemented software means for establishing a transfer buffer in system memory, circuitry for determining from a command which application program has initiated the command, and circuitry for assuring that commands from only one application program reside in the FIFO buffer circuit at any time.Type: GrantFiled: March 26, 1998Date of Patent: June 27, 2000Assignee: Nvidia CorporationInventors: Curtis Priem, David S. H. Rosenthal
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Patent number: 6078402Abstract: A peripheral device (such as a printer) locates shareable resources on an accessory by using an offset mechanism on the accessory. The offset mechanism includes one or more offset values stored in a first memory location on the accessory. The one or more offset values are indicative of offsets of one or more resources within the accessory memory. The one or more accessory resources are shareable with the peripheral device. A further offset value is stored in a second memory location on the accessory. The further offset value is indicative of an offset for determining the first memory location on the accessory. Additionally, a base address is stored in yet another memory location on the accessory and provides a general reference point for locating the first memory and accessory resources as mapped into the peripheral's memory. In a preferred embodiment, the offset mechanism of the present invention is implemented as an enhanced feature of the PCI Local Bus Specification.Type: GrantFiled: September 24, 1997Date of Patent: June 20, 2000Assignee: Hewlett-Packard CompanyInventors: Todd A. Fischer, Harold C. Ockerse, Scott D. Bonar, Steven J. Jahr
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Patent number: 6065067Abstract: During start-up of an advanced configuration and power interface computer system, a resource lock value is read from nonvolatile memory. If the resource lock value indicates system resources are to be locked, possible configuration setting data associated with motherboard input-output devices, is not loaded into memory at a location known to the operating system. If the resource lock value indicates system resources are not to be locked, possible configuration setting data is loaded into memory at a location known to the operating system.Type: GrantFiled: March 5, 1998Date of Patent: May 16, 2000Assignee: Compaq Computer CorporationInventors: Louis B. Hobson, Vicki L. Carruthers
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Patent number: 6038621Abstract: A peripheral system includes (a) a peripheral device having peripheral memory located thereon, (b) at least one input/output (I/O) card communicating with the peripheral device, and (c) a means for managing the peripheral memory between the peripheral device and the at least one I/O card. In a preferred embodiment, the means for managing the peripheral memory includes (a) a means for determining, during normal operation, an optimum amount of peripheral memory for allocating to each I/O card, and (b) a means for allocating, during normal operation, the optimum amount of peripheral memory to each I/O card. A preferred method for managing memory, between a peripheral device, having peripheral memory thereon, and at least one input/output (I/O) card, includes (a) determining, during normal operation, an optimum amount of peripheral memory for allocating to each I/O card, and (b) allocating, during normal operation, the optimum amount of peripheral memory to each I/O card.Type: GrantFiled: November 4, 1996Date of Patent: March 14, 2000Assignee: Hewlett-Packard CompanyInventors: Thomas S. Gale, Patrick W. Fulghum, Kevin N. Smith, Steven J. Jahr, James G. Wendt
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Patent number: 6014716Abstract: A bidirectional communication method, bidirectional communication device and storage medium for automatically setting the communication mode without complications to the user and not causing the malfunctioning of the computer system and the printer are disclosed. The control register of the personal computer is used to set data reception from the laser printer in a byte mode. A specific data is written to the data register, and the value of the data register is read. If the value of the data register is not the specific data, it is recognized that the personal computer can be set to the byte mode. If, on the other hand, the read value of the data register is the specific data, another specific data is written to the data register, then the value of the data register is read, and if the value of the data register is another specific data, it is recognized that the personal computer cannot be set to the byte mode.Type: GrantFiled: June 27, 1997Date of Patent: January 11, 2000Assignee: Brother Kogyo Kabushiki KaishaInventor: Kiyotaka Ohara
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Patent number: 6006281Abstract: A printing subsystem for use in a network printing system, having a database communicating with a client browser, is provided. The database includes a plurality of data sets and the client browser includes a program with a set of instructions for displaying at least one of the plurality of data sets on a user interface display screen. The printing subsystem is disposed remotely of and communicates with both of the database and the client browser. The printing subsystem includes a marking engine and a copy of the program, the program copy receiving the at least one of the plurality of data sets for placing the same in a displayable format. An interface communicates with the program copy for converting the at least one of the plurality of data sets from the displayable format to a printable format, and a print buffer is employed to store the at least one of the plurality of data sets in the printable format in anticipation of producing a print therefrom.Type: GrantFiled: January 8, 1998Date of Patent: December 21, 1999Assignee: Xerox CorporationInventor: Cyril G. Edmunds
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Patent number: 6006344Abstract: A personal computer system is discloses which includes a diagnostic system which uses an input/output controller to perform diagnostic functions. Such a system advantageously allows diagnostic functions to be performed on the computer system including the system processor of the computer system. The diagnostic program may be stored within nonvolatile memory which is coupled to the I/O controller, thus allowing diagnostic functions to be performed without the need for the computer system memory of the computer system.Type: GrantFiled: January 21, 1997Date of Patent: December 21, 1999Assignee: Dell USA, L.P., A Texas Limited PartnershipInventor: Joseph W. Bell, Jr.
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Adapter for wirelessly interfacing a full-size stand alone keyboard with a handheld computing device
Patent number: 5999996Abstract: An adapter is provided to interface a full-size keyboard with a handheld computing device. The adapter couples to the serial cable of the keyboard to convert keyboard generated signals to code, such as ASCII code. The adapter has a wireless transmitter (e.g., IR or RF transmitter) to transmit the code via a wireless link to a compatible receiver in the handheld computing device. The adapter enables a user to employ a full-size keyboard to enter data into a handheld computing device having a miniaturized or limited keypad.Type: GrantFiled: April 14, 1997Date of Patent: December 7, 1999Assignee: Microsoft CorporationInventor: Matthew W. Dunn -
Patent number: 5991826Abstract: A method for configuring devices in a computer system using pattern matching is disclosed. The method constructs the initial configuration pattern by retrieving and storing a working device configuration in the configuration pattern. For each resource item of a supported resource type of a device, the method generates a resource combination matching a configuration pattern, which is updated after each testing iteration, to check in a deterministic order for a configuration conflict until a non-conflicting resource is found. If a conflicting resource is found, the method has the option of moving the conflicting resource to a non-conflicting resource. The process recursively repeats itself for each supported resource type of a device to produce a device configuration matching the configuration pattern. Each next potential device configuration is deterministically generated using a configuration index and the configuration pattern.Type: GrantFiled: March 10, 1997Date of Patent: November 23, 1999Assignee: Compaq Computer CoporationInventors: Cindy R. McGee, Garyl L. Hester, John DeNardo, Kenneth W. Hester
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Patent number: 5983290Abstract: In an information processing system having a portable terminal unit, such as a hand-held computer, driven by a rechargeable battery and a data communication adaptor for enabling communication between the portable terminal unit and a host computer of the system, the terminal unit and the data communication adaptor are designed to minimize the size thereof in the following five ways. First, a memory card holding mechanism for connecting the memory card of the portable terminal unit is provided between a swinging back lid and a recess of the back casing. Second, a normal interface and a high-speed interface are both provided in the portable terminal unit and the data communication adaptor respectively. Third, an auxiliary connector for an optional device to extend a function of the portable terminal unit is provided in the opening of the casing of the portable terminal unit movable in three dimensions mounted on a printed circuit board.Type: GrantFiled: May 23, 1997Date of Patent: November 9, 1999Assignee: Fujitsu LimitedInventors: Takao Obata, Mitsuaki Kumagai, Akihiko Iura, Akio Murata, Shinji Yamamoto, Makoto Sato, Akira Okawado, Shinichiro Tsurumaru, Maki Miyata, Toshiyuki Kobayashi, Nobuaki Akasawa, Masahiko Okano, Takao Miyanaga
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Patent number: 5958021Abstract: An input-output interface circuit operative in three different modes which utilizes a first signal selector, operative selectively in an external signal output mode and an internal signal transmission mode, having one output terminal to which a signal is transmitted from a signal processor and first and second output terminals, a second signal selector, operative selectively in an external signal input mode and an internal signal transmission mode, having one output terminal through which a signal input to the signal processor is transmitted and first and second output terminals, the first output terminal of the first signal selector being connected to the external input-output terminal by an external output signal transmission channel; the second output terminal of the first signal selector being connected to the first input terminal of the second signal selector by an internal signal transmission channel; and the external input-output terminal being connected to the second input terminal of the second signaType: GrantFiled: January 29, 1996Date of Patent: September 28, 1999Assignee: Mazda Motor CorporationInventors: Kiyoyuki Tsuchiyama, Hideyuki Yamada, Kouichi Nakamura