Input/output Polling Patents (Class 710/46)
  • Patent number: 11848771
    Abstract: An encoding method, a decoding method, an encoding device and a decoding device are provided. The encoding method includes: obtaining a first bit stream of an original encoded data; determining whether a number of the successive bits is greater than a predetermined number; if the number of the successive bits is greater than the predetermined number, then selecting at least one target bit from the successive bits; performing a logic NOT operation on the target bit to obtain a symbol bit; and inserting the symbol bit to the successive bits to obtain an encoded bit stream. The present disclosure could raise the encoding speed and reliability.
    Type: Grant
    Filed: May 27, 2021
    Date of Patent: December 19, 2023
    Assignee: TCL CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventor: Jinfeng Liu
  • Patent number: 11726946
    Abstract: An I2C bus communication control method, device and system, and a readable storage medium. The method comprises: receiving configuration information of an I2C bus sent by an upper-layer application; analyzing the configuration information to obtain a plurality of polling parameters; writing the plurality of polling parameters into a polling table; and controlling the I2C bus, and executing a corresponding read-write operation according to the polling table. In the method, the read-write operation executed on the I2C bus is performed according to the polling table, thus an accurate communication condition of the I2C bus can be directly obtained on the basis of the polling table without accessing a bus state in a polling manner; congestion risks can be reduced, and the access efficiency of a single main device can also be achieved when a plurality of main devices exist.
    Type: Grant
    Filed: February 19, 2021
    Date of Patent: August 15, 2023
    Assignee: INSPUR (BEIJING) ELECTRONIC INFORMATION INDUSTRY CO., LTD.
    Inventors: Ningya Lin, Yuanman Tong
  • Patent number: 10862967
    Abstract: This document discloses high performance data storage solutions. In an aspect, some solutions can be employed in a cloud-computing environment that provides shared storage for a plurality of customers. In other aspects, the solutions provided by some embodiments can provide multiple tiers of storage, each having a different performance level. This feature can provide a customer with the ability (e.g., through a web portal) to design its own custom storage solution that blends multiple tiers of storage at different capacity and performance levels to attain an optimal level of capacity, performance, and cost. Some disclosed solutions provide a novel arrangement of different types of storage devices that are provisioned through a common API, which can access each storage device's native management interface, as well as the host computer for which the storage will be provisioned, to allocate multiple tiers of storage to the host computer in an automated manner.
    Type: Grant
    Filed: July 1, 2019
    Date of Patent: December 8, 2020
    Assignee: CenturyLink Intellectual Property LLC
    Inventors: Robert Brunk, Kenneth Suda, James B. Farman, William T. Prange
  • Patent number: 10776116
    Abstract: An instruction translation circuit, a processor circuit, and an executing method thereof are provided. The instruction translation circuit is adapted for being disposed in the processor circuit. The instruction translation circuit includes a formatted instruction queue, a first instruction translator, an instruction detection circuit, and a second instruction translator. The formatted instruction queue stores a plurality of formatted macro instructions. The first instruction translator translates a first formatted macro instruction of the formatted macro instructions and outputs a first micro instruction. When the instruction detection circuit determines that a trap bit in the first formatted macro instruction is set and a part of the first formatted macro instruction can be translated in advance, the instruction detection circuit outputs first trap information.
    Type: Grant
    Filed: August 21, 2018
    Date of Patent: September 15, 2020
    Assignee: Shanghai Zhaoxin Semiconductor Co., Ltd.
    Inventors: Chenchen Song, Xiaolong Fei, Aimin Ling, Yingbing Guan
  • Patent number: 10133526
    Abstract: An image forming apparatus includes a session determining section that determines to execute a multipoint session, a first request section that enquires about whether to participate in the multipoint session to other image forming apparatuses, a group forming section that forms a group that participates in the multipoint session including the image forming apparatus and the other image forming apparatuses that have sent a response to participate in the multipoint session when the response to participate in the multipoint session is received from the other image forming apparatuses, and a second request section that enquires about whether to execute the multipoint session to all of the other image forming apparatuses included in the group.
    Type: Grant
    Filed: January 18, 2018
    Date of Patent: November 20, 2018
    Assignee: KYOCERA Document Solutions Inc.
    Inventor: Daniel Lee RJ
  • Patent number: 10079048
    Abstract: A non-volatile semiconductor memory is disclosed comprising a first memory device and control circuitry operable to issue an access command to the first memory device. A command status is requested from the first memory device after a status delay. When the command status indicates the first memory device has completed the command, a first access time of the memory device is measured. An access sequence of the first memory device is then modified in response to the access time.
    Type: Grant
    Filed: March 24, 2009
    Date of Patent: September 18, 2018
    Assignee: Western Digital Technologies, Inc.
    Inventor: Mei-Man L. Syu
  • Patent number: 9858222
    Abstract: A circuit manages and controls access requests to a register, such as a control and status register (CSR) among a number of devices. In particular, the circuit selectively forwards or suspends off-chip access requests and forwards on-chip access requests independent of the status of off-chip requests. The circuit receives access requests at a plurality of buses, one or more of which can be dedicated to exclusively on-chip requests and/or exclusively off-chip requests. Based on the completion status of previous off-chip access requests, further off-chip access requests are selectively forwarded or suspended, while on-chip access request are sent independently of off-chip request status.
    Type: Grant
    Filed: November 13, 2014
    Date of Patent: January 2, 2018
    Assignee: Cavium, Inc.
    Inventors: Robert A. Sanzone, Wilson P. Snyder, II, Richard E. Kessler
  • Patent number: 9842083
    Abstract: Systems and methods for using completion queues for Remote Direct Memory Access (RDMA) event detection. An example method may comprise: receiving a request to create a queue pair for processing Remote Direct Memory Access (RDMA) requests using an RDMA-enabled network interface controller (RNIC), the queue pair comprising a send queue and a receive queue; associating the queue pair with a completion queue associated with the RNIC, the completion queue employed to store a plurality of completion queue elements associated with completed work requests; receiving a notification of an interrupt associated with the RNIC; and responsive to determining that at least one of a number of send queues associated with the completion queue or a number of receive queues associated with the completion queue exceeds zero, identifying at least one of: a first application registered to be notified of RDMA send events or a second application registered to be notified of RDMA receive events.
    Type: Grant
    Filed: May 18, 2015
    Date of Patent: December 12, 2017
    Assignee: Red Hat Israel, Ltd.
    Inventor: Michael Tsirkin
  • Patent number: 9679059
    Abstract: Systems and methods are provided that allow client programs using APIs for accessing local DB2 databases to access DB2 systems on remote logical partitions and remote zSeries mainframes rather than from a local DB2 system. For example, a method may include intercepting a DB2 request using a documented API for accessing local DB2 databases from a client program executing on a source mainframe system. The method may also include selecting a destination mainframe system and sending a buffer including information from the request from the source mainframe system to the destination mainframe system and establishing, at the destination mainframe system, a DB2 connection with the DB2 system from the request. The method may further include receiving a response from the DB2 system, sending a buffer having information from the response from the destination mainframe system to the source mainframe system, and providing the information to the client program.
    Type: Grant
    Filed: November 17, 2015
    Date of Patent: June 13, 2017
    Assignee: BMC Software, Inc.
    Inventors: Stanley James Dee, Anthony Louis Lubrano, Stephen Ray Cole
  • Patent number: 9614764
    Abstract: A data processing system comprising a plurality of interconnected nodes, each node comprising a media processor and one or more ports, each port connected to a respective media processor. Each port is configured to be active or passive, an active port being arranged, upon receipt of data, to transfer the received data to its output, a passive input port being arranged, upon receipt of data, to retain the received data and to transmit the received data to its output when the received data reaches a specific size, and a passive output port being arranged to trigger the receipt of data when the data capacity of the output port reaches a specific size.
    Type: Grant
    Filed: October 19, 2007
    Date of Patent: April 4, 2017
    Assignee: Entropic Communications, LLC
    Inventor: Roelof P. De Jong
  • Patent number: 9483193
    Abstract: A data storage device includes a first memory device suitable for performing an internal operation in response to a first internal operation command; and a state checking block suitable for performing a state read operation by transmitting a state read command one or more times to the first memory device during one of an initial mode and a repeat mode which is set based on a type of the internal operation.
    Type: Grant
    Filed: July 21, 2016
    Date of Patent: November 1, 2016
    Assignee: SK Hynix Inc.
    Inventors: Dong Yeob Chun, Joong Hyun An, Kwang Hyun Kim
  • Patent number: 9448839
    Abstract: A backoff polling algorithm may use a minimum polling interval which represents an amount of time between repeated polls of a job step queue. When polled, the job step queue may indicate a number of job steps scheduled to execute currently. Additionally, the backoff polling algorithm may repeatedly poll the job step queue at the current polling interval and execute any job steps indicated until the step queue indicates that the number of job steps scheduled to execute currently is below a minimum threshold. While the indicated number of job steps is below the minimum threshold, the backoff polling algorithm may repeatedly increase the polling interval up to a predetermined maximum polling interval and poll at each increased interval until the indicated number of job steps is above the minimum threshold. The backoff polling algorithm may then decrease the polling interval to the minimum polling interval.
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: September 20, 2016
    Assignee: Oracle International Corporation
    Inventor: Nitin Jain
  • Patent number: 9424898
    Abstract: A data storage device includes a first memory device suitable for performing an internal operation in response to a first internal operation command; and a state checking block suitable for performing a state read operation by transmitting a state read command one or more times to the first memory device during one of an initial mode and a repeat mode which is set based on a type of the internal operation.
    Type: Grant
    Filed: October 10, 2014
    Date of Patent: August 23, 2016
    Assignee: SK Hynix Inc.
    Inventors: Dong Yeob Chun, Joong Hyun An, Kwang Hyun Kim
  • Patent number: 9407694
    Abstract: An information handling system is configured to poll a remote data store at an adaptable polling rate. The polling rate can be based on one or more usage characteristics of the information handling system, such as a time of day, geographical location, user profile, management profile, system usage pattern, or other usage characteristic. Between polling requests, the information handling system can be placed in a low-power mode, thereby conserving power.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: August 2, 2016
    Assignee: DELL PRODUCTS, LP
    Inventor: Andrew T. Sultenfuss
  • Patent number: 9362907
    Abstract: A method of dynamically adjusting threshold values for an electronic device is disclosed. The method comprises setting the base proximity value to a maximum proximity value; polling a detected proximity value; determining a first range where the detected proximity value falls according to a mapping table; setting the base proximity value to a largest value of the first range; determining a high threshold value and a low threshold value according to the base proximity value; and resetting the base proximity value to a default value when the proximity function is disabled.
    Type: Grant
    Filed: November 29, 2011
    Date of Patent: June 7, 2016
    Assignee: HTC Corporation
    Inventors: Guan-Ching Juang, Chi-Jung Tseng, Jen-Hsuen Huang, Fa-Da Lin
  • Patent number: 9332037
    Abstract: According to at least one embodiment of the invention, a protocol for managing redundant signaling links to form a reliable signaling connection is provided. The protocol has an initialization phase, in which the availability of signaling links is determined and an available signaling link is selected and activated, followed by an operational phase in which the activated link is used for sending signaling messages for a higher-level protocol. During the operational phase both links are monitored for availability using a query and reply technique. Should either link fail, a status message is sent to the remaining available link along with an activity switchover being performed, as required, depending on whether the failed link was the active link.
    Type: Grant
    Filed: March 26, 2003
    Date of Patent: May 3, 2016
    Assignee: Alcatel Lucent
    Inventors: Balachandar S. Gettala, Michael Jhu, Michael Roberts, Henri R. Vandette, Glenn Arne Karlsen, Jim Hurd, Gerry Dubois, James A. Stanton, Jr., Suryaram Alladi
  • Patent number: 9323467
    Abstract: When a read command is received from a host requesting data stored on a disk of a Data Storage Device (DSD), it is determined whether the DSD is in a startup period and whether the requested data is stored in a solid state memory of the DSD. The requested data is designated for storage in the solid state memory if it is determined that the DSD is in the startup period and the requested data is not stored in the solid state memory.
    Type: Grant
    Filed: December 13, 2013
    Date of Patent: April 26, 2016
    Assignee: Western Digital Technologies, Inc.
    Inventors: Zaihas Amri Fahdzan Hasfar, Choo-Bhin Ong
  • Patent number: 9172628
    Abstract: I/O nodes are dynamically distributed on a multi-node computing system. An I/O configuration mechanism located in the service node of a multi-node computer system controls the distribution of the I/O nodes. The I/O configuration mechanism uses job information located in a job record to initially configure the I/O node distribution. The I/O configuration mechanism further monitors the I/O performance of the executing job to then dynamically adjusts the I/O node distribution based on the I/O performance of the executing job.
    Type: Grant
    Filed: March 6, 2013
    Date of Patent: October 27, 2015
    Assignee: International Business Machines Corporation
    Inventors: Eric L. Barsness, David L. Darrington, Amanda Randles, John M. Santosuosso
  • Patent number: 9143349
    Abstract: Embodiments related to configurable Media Access Controllers (MACs) are described and depicted.
    Type: Grant
    Filed: September 19, 2008
    Date of Patent: September 22, 2015
    Assignee: Lantiq Deutschland GmbH
    Inventors: Charles Bry, Bernhard Rohfleisch
  • Patent number: 9058422
    Abstract: Techniques for polling an input/output (I/O) device are described herein. The techniques include polling a device for data from the I/O device, and receiving the data from the I/O device at the host device as a result of the polling. The techniques include determining whether the data received is the same as data received at a previous polling of the I/O device. Upon determining the data received is the same, the techniques include decreasing the polling rate if the data is the same, and if it is not the same. Upon determining the data is not the same, the techniques include increasing the polling rate if the data is not the same.
    Type: Grant
    Filed: September 28, 2013
    Date of Patent: June 16, 2015
    Assignee: Intel Corporation
    Inventors: Kyungtae Han, Paul Diefenbaugh, Sarah Sharp
  • Publication number: 20150149666
    Abstract: Event systems and methods are provided through which applications can manage input/output operations (“I/O”) and inter-processor communications. An event system in conjunction with fast I/O is operable to discover, handle and distribute events. The system and method disclosed can be applied to combinations that include event-driven models and event-polling models. In some embodiments, I/O sources and application sources direct events and messages to the same destination queue. In some embodiments, the system and methods include configurable event distribution and event filtering mechanisms operable to effect and direct event distribution for multiple event types using multiple methods. In some embodiments, the system disclosed includes enhanced event handler API's. Some embodiments include a multicast API operable to allow applications to perform multicasting in a single API call. In addition, various mechanisms of the disclosed event system can be combined with traditional operating systems.
    Type: Application
    Filed: January 29, 2015
    Publication date: May 28, 2015
    Applicant: MCORELAB, INC.
    Inventors: Yilin Wang, Zheng Liu
  • Patent number: 9032119
    Abstract: A capability is provided for adaptive polling of a device based on a set of polling control regions configured to control polling of the device. The set of polling control regions is defined based on at least one of a set of control parameters and non-parametric control information. A transition within the set of polling control regions is determined based on a current polling control region and a target polling control region that is determined based on input information received while in the current polling control region. The input information may include at least one of values of one or more parameters in the set of parameters and non-parametric input information. The transition may include remaining in the current polling control region or transitioning to a new polling control region. The transition may be performed based on a rapid up controlled down (RUCD) transition scheme.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: May 12, 2015
    Assignee: Alcatel Lucent
    Inventors: Thomas P. Chu, Ahmet A. Akyamac, Dan Kushnir, Huseyin Uzunalioglu
  • Patent number: 8996759
    Abstract: A multi-chip memory device and a method of controlling the same are provided. The multi-chip memory device includes a first memory chip; and a second memory chip sharing an input/output signal line with the first memory chip, wherein each of the first memory chip and the second memory chip determines whether to execute a command unaccompanied by an address, by referring to a history of commands.
    Type: Grant
    Filed: November 14, 2011
    Date of Patent: March 31, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hoiju Chung
  • Patent number: 8990448
    Abstract: Methods, systems and processor-readable media are disclosed for implementing a “smart” discovery process in a data transfer regime having one or more expanders and one or more initiators. Data traffic associated with such a discovery process can be reduced and one or more of the initiators can be prevented from blocking input/output to particular components in communication with the data transfer regime, thereby improving and completing the discovery process in an optimal time frame while enhancing the performance of the initiator(s).
    Type: Grant
    Filed: March 8, 2013
    Date of Patent: March 24, 2015
    Assignee: LSI Corporation
    Inventors: Prashant Prakash Yendigiri, Raghavendra Channagiri Nagendra, Giridhar Danayakanakeri
  • Patent number: 8918557
    Abstract: A SAS expander configured to operate as a SAS expander hub receives IO requests from a plurality of connected SAS expanders. Each SAS expander determines if it is capable of servicing a received IO request and sending such IO requests to the SAS expander hub if necessary. The SAS expander hub relays the IO requests to SAS expanders connected to data storage devices capable of servicing such IO requests.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: December 23, 2014
    Assignee: LSI Corporation
    Inventor: Brett J. Henning
  • Patent number: 8843672
    Abstract: An access method includes: obtaining, by a computer, a result of monitoring a busy rate and a number of access operations per unit time of a storage device, the storage device having a first storage area and a second storage area; calculating a characteristic of correlation between the busy rate and the number of access operations per unit time based on the result; calculating a second number of access operations per unit time based on the characteristic of the correlation such that a sum of a first busy rate corresponding to a first number of access operations per unit time and a second busy rate corresponding to a second number of access operations per unit time becomes equal to or lower than a given busy rate; and controlling a number of operations to access the second storage area per unit time based on the second number of access operations.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: September 23, 2014
    Assignee: Fujitsu Limited
    Inventors: Kazuichi Oe, Kazutaka Ogihara, Yasuo Noguchi, Tatsuo Kumano, Masahisa Tamura, Yoshihiro Tsuchiya, Takashi Watanabe, Toshihiro Ozawa
  • Patent number: 8788722
    Abstract: A method handling a pluggable module selectable from a plurality of pluggable modules is executable at a media converter system of a network configuration. The method provides for automatically enabling of a disabled channel or disabling of an enabled channel of the media converter system when the pluggable module is attached to the media converter system, wherein the suggested channel enabling/disabling feature is executed on the basis of a correlation between module specific information extracted from the respective pluggable module and corresponding information extracted via the media converter system. An arrangement for executing the suggested method is also provided.
    Type: Grant
    Filed: June 17, 2010
    Date of Patent: July 22, 2014
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventor: Wei-Ping Huang
  • Patent number: 8762599
    Abstract: In one embodiment, the present invention includes a method for handling a registration message received from a host processor, where the registration message delegates a poll operation with respect to a device from the host processor to another component. Information from the message may be stored in a poll table, and the component may send a read request to poll the device and report a result of the poll to the host processor based on a state of the device. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: June 24, 2014
    Assignee: Intel Corporation
    Inventors: Michael J. Espig, Zhen Fang, Ravishankar Iyer, David J. Harriman
  • Patent number: 8584244
    Abstract: According to the present invention, a timeout caused by executing a virus scan is avoided. A computer system has a first computer, a second computer coupled to the first computer, and a storage system coupled to the first computer and the second computer. The first computer receives a request to write data, writes the requested data in the storage system, and sends a virus scan request of the written data to the second computer. The second computer receives the virus scan request from the first computer, reads the written data out of the storage system, and partially executes a virus scan of the read data. After the partial virus scan of the read data is finished, the first computer sends a response to the received write request. After the first computer sends the response, the second computer executes the remainder of the virus scan of the read data.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: November 12, 2013
    Assignee: Hitachi, Ltd.
    Inventor: Nobuyuki Saika
  • Patent number: 8547564
    Abstract: An image processing apparatus includes an image forming unit, power supplier, power controller, memory, signal transmission unit and transmission timer. The image forming unit forms an image based on image data from a plurality of host devices. The power supplier supplies power to a power system including the image forming unit. The power controller controls the power from the power supplier to the power system. The memory stores a usage amount of each host device. The signal transmission unit transmits a response request to a host device having at least a predetermined usage amount. The transmission timer counts a first time period from a transmission of the response request. The power controller halts the power from the power supplier to the power system when determining, based on the first time period, that a reply to the response request is not transmitted from the specific host device for a predetermined period.
    Type: Grant
    Filed: July 30, 2008
    Date of Patent: October 1, 2013
    Assignee: Oki Data Corporation
    Inventor: Yukio Ito
  • Patent number: 8538564
    Abstract: A portable media player communicates with a host computer for enabling a user of the player to manage media distribution using the control software of the host computer. The host computer can send a GUI that is displayed on the otherwise “dumb” player, and the user can view the GUI and press a single button to command the control software to download a media title to the player. The host computer can periodically poll the player to determine its status.
    Type: Grant
    Filed: September 4, 2009
    Date of Patent: September 17, 2013
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventors: Cristian Lars Almstrand, Prem Aanand Venkatesan, Hiroyuki Shinkai, Hirokazu Imazeki, Masahiko Seki
  • Patent number: 8539485
    Abstract: A first thread enters a polling loop to wait for a signal from a second thread before processing instructions dependent on the polling loop. When entering the polling loop, the first thread sets a reservation for a predetermined memory address. The first thread then executes a reservation-based instruction that can change the execution state of the first thread. Reservation circuitry of the processing device that was executing the first thread monitors the reservation. In the event that the reservation cleared, such as by the second thread modifying data at the predetermined memory address, the first thread is reinstated to its prior execution state. By using a hardware reservation mechanism to monitor for clearing of a set reservation, repeated memory accesses to the memory address by the first thread can be minimized or avoided while in the polling loop and other threads can be allowed to execute at the processing device with reduced interference from the waiting thread.
    Type: Grant
    Filed: November 20, 2007
    Date of Patent: September 17, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Michael D. Snyder, Gary L. Whisenhunt
  • Patent number: 8521930
    Abstract: Systems and methods schedule periodic and non-periodic transactions in a multi-port bus environment. The method may comprise performing multiple search passes through a first array of endpoints to determine whether dispatch resources are available for active endpoints satisfying a set of sort criteria. When dispatch resources are not available for an endpoint, a sort level may be marked with a marker to indicate that an endpoint has not been serviced. After the active endpoints in the first array have been serviced by dispatching a periodic transaction to the endpoint or by marking a sort level corresponding to the endpoint, a non-periodic transaction may be dispatched to an active endpoint in a second array. In response to receiving an indication that the dispatch resources have become available, a subsequent search pass may be made through the first array, starting with a highest priority sort level that is marked with the marker.
    Type: Grant
    Filed: July 25, 2011
    Date of Patent: August 27, 2013
    Assignee: Fresco Logic, Inc.
    Inventor: Christopher Michael Meyers
  • Patent number: 8473647
    Abstract: Methods and apparatus for enhancing efficiency (e.g., reducing power consumption and bus activity) in a data bus. In an exemplary embodiment, a client-driven host device state machine switches among various states, each comprising a different polling frequency. A client device on the data bus (e.g., serial bus) checks for non-productive periods of polling activity, and upon discovering such a period, informs the host. The state machine then alters its polling scheme; e.g., switches to a lower state comprising a reduced polling frequency, and polling continues at this reduced frequency. In one variant, the client device continuously monitors itself to determine whether it has any data to transmit to a host device and if so, the host is informed, and the state machine restarts (e.g., to its highest polling state). By eliminating extraneous polling, power consumption and serial bus activity is optimized, potentially on both the host and the client.
    Type: Grant
    Filed: September 17, 2007
    Date of Patent: June 25, 2013
    Assignee: Apple Inc.
    Inventors: Alberto Vidal, David Ferguson
  • Patent number: 8473655
    Abstract: A controller is provided that receives a single enclosure management (EM) serial bit stream from an expander or other device and divides the EM serial bit stream into multiple EM serial bit streams for delivery to multiple respective midplanes or backplanes. In this way, a separate EM serial bit stream is provided to each midplane or backplane without having to increase the number of ports that are available on the expander or other device that interfaces with the backplane or midplane.
    Type: Grant
    Filed: January 17, 2011
    Date of Patent: June 25, 2013
    Assignee: LSI Corporation
    Inventors: Jason M. Stuhlsatz, Naman Nair, Debal Krishna Mridha, Lakshmana Anupindi, Kakanuru Lakshmi Kanth Reddy
  • Patent number: 8417849
    Abstract: A method to adjust a multi-path device reservation by supplying a computing device and a storage controller interconnected with a communication link. The method further reserves a data storage device in communication with the storage controller, where that data storage device reservation is held by a first communication path group comprising a first plurality of communication paths configured in the communication link. If the method detects a failed communication path configured in the first communication path group, the method configures a second communication path group by removing the failed communication path from the first communication path group, wherein the second communication path group maintains the data storage device reservation.
    Type: Grant
    Filed: October 7, 2009
    Date of Patent: April 9, 2013
    Assignee: International Business Machines Corporation
    Inventors: Clint Alan Hardy, Matthew Joseph Kalos, Richard Anthony Ripberger
  • Patent number: 8417851
    Abstract: In a disclosed example of a method, a requested value of a target register may be specified as a precondition to performing a requested read or write operation. The requested read or write operation may be generated by a requesting device, such as a processor, and sent over a bus to a peripheral device containing the target register. The target register may be polled internally to the peripheral device without generating additional bus traffic between the requesting device and the peripheral device. A ring topology may be used to internally poll the target register and to perform the requested read or write operation when the polled value of the target register equals the requested value.
    Type: Grant
    Filed: June 27, 2011
    Date of Patent: April 9, 2013
    Assignee: International Business Machines Corporation
    Inventors: Etai Adar, Eric F. Robinson, Yossi Shapira
  • Patent number: 8395481
    Abstract: The present invention relates to an RFID reader and a method thereof, and an RFID data processing method. The RFID reader generates a specific query message to a plurality of RFIDs, receives a first response message corresponding to the query message from at least one RFID among the RFIDs, and sequentially identifies a tag ID of a collided RFID by using a collision solving message when a collision occurs according to the result of receiving a first response message. The RFID reader can quickly and accurately identify a plurality of RFIDs since it can eliminate an unnecessary time such as excessive no response slot generation or repeated rounds through a sequential identification process for the collided RFIDs.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: March 12, 2013
    Assignee: KT Corporation
    Inventor: Yeon-Soo Kim
  • Patent number: 8384938
    Abstract: An image reading apparatus includes: a reading unit; a transmission unit and a limiting unit. The reading unit is configured to read a document and create image data. The transmission unit supports a plurality of transmission modes, and is configured to transmit the image data to an external apparatus using at least one selected from the plurality of transmission modes. The limiting unit is configured to limit selectable transmission modes of the transmission unit based on at least one of: a user-designated attribute of the document set by a user; a reading attribute of the reading unit; and a content of the document read by the reading unit.
    Type: Grant
    Filed: December 21, 2009
    Date of Patent: February 26, 2013
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventor: Hiroto Nakayama
  • Patent number: 8364862
    Abstract: In one embodiment, the present invention includes a method for handling a registration message received from a host processor, where the registration message delegates a poll operation with respect to a device from the host processor to another component. Information from the message may be stored in a poll table, and the component may send a read request to poll the device and report a result of the poll to the host processor based on a state of the device. Other embodiments are described and claimed.
    Type: Grant
    Filed: June 11, 2009
    Date of Patent: January 29, 2013
    Assignee: Intel Corporation
    Inventors: Michael J. Espig, Zhen Fang, Ravishankar Iyer, David J. Harriman
  • Patent number: 8332549
    Abstract: A method for communication between an initiator system and a block storage cluster may include receiving a first input/output (I/O) request from the initiator system. The method may also include sending a referral response from a first storage system included in a plurality of storage systems of the block storage cluster to the initiator system when data associated with the first I/O request is stored in more than one storage system of the plurality of storage systems of the block storage cluster. Additionally, the method may include directing a referral I/O to the first storage system and the second storage system for transferring data to or transferring data from the first storage system and the second storage system, and transferring data associated with the referral I/O to or transferring data associated with the referral I/O from the first storage system and the second storage system.
    Type: Grant
    Filed: March 31, 2009
    Date of Patent: December 11, 2012
    Assignee: LSI Corporation
    Inventors: Andrew J. Spry, Ross Zwisler, Gerald J. Fredin, Kenneth J. Gibson
  • Patent number: 8327042
    Abstract: In a first embodiment of the present invention, a method for configuring a plurality of input/output (I/O) interconnect switch ports is provided, the method comprising: starting a link training and status state machine (LTSSM) for each of the plurality of ports; placing each of the LTSSMs in a receiver detect state; changing all of the LTSSMs to a polling state only once receivers are detected or timeouts occur in the receiver detect states in each of the LTSSMs; changing all of the LTSSMs to a configuration state only once polling is successful or timeouts occur in the polling states in each of the LTSSMs; and completing the configuration state of each of the LTSSMs.
    Type: Grant
    Filed: September 3, 2010
    Date of Patent: December 4, 2012
    Assignee: PLX Technology, Inc.
    Inventor: Christopher R. Millsaps
  • Patent number: 8321608
    Abstract: In a computer system to which a plurality of I/O devices are connected and a pool I/O device is included therein, a periodical operation confirmation is performed on a pool I/O device to be used when a fault occurs. A pool I/O device operation confirmation section obtains pool I/O device status information from a pool I/O device status information storage section (provided inside or outside the computer system). The status information includes a pool I/O device ID for identifying the pool I/O device, a type of the pool I/O device, a status value indicating an operation confirmation result, and an update time indicating the most recent operation confirmation time. Then, the pool I/O device operation confirmation section activates the pool I/O device and performs an operation confirmation thereon; terminates the operation of the pool I/O device after the operation confirmation; and updates the pool I/O device status information using the operation confirmation result obtained by the operation confirmation.
    Type: Grant
    Filed: January 31, 2008
    Date of Patent: November 27, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Hiroyuki Osaki, Futoshi Haga, Yoshifumi Takamoto
  • Patent number: 8312183
    Abstract: For one disclosed embodiment, an apparatus comprises a display and a circuit. The circuit has a first port to be coupled to communicate over data lines with a Universal Serial Bus (USB) port of a device external to the apparatus. The circuit is operable to detect resume signaling of a duration of less than one millisecond and to transition the first port from a first state corresponding to an idle state of the data lines to a second, enabled state in response to the resume signaling. For one disclosed embodiment, the circuit is operable to drive resume signaling for a duration of less than one millisecond to initiate transition of the first port from a first state corresponding to an idle state of the data lines to a second, enabled state. Other embodiments are also disclosed.
    Type: Grant
    Filed: April 20, 2010
    Date of Patent: November 13, 2012
    Assignee: Intel Corporation
    Inventor: John S. Howard
  • Patent number: 8285909
    Abstract: In some embodiments, an electronic apparatus comprises at least one memory module, and a universal serial bus (USB) host controller coupled to the memory, wherein the USB host controller implements hardware assisted idleness endpoint detection.
    Type: Grant
    Filed: December 7, 2010
    Date of Patent: October 9, 2012
    Assignee: Intel Corporation
    Inventor: Paul Diefenbaugh
  • Patent number: 8266343
    Abstract: A device may include polling logic configured to store a table of received addresses, sequentially receive sensor data from each address in the table via a serial data bus, store the sensor data in a memory, receive an address from a processor via a high speed data bus, and provide stored sensor data from the memory to the processor via a parallel data bus.
    Type: Grant
    Filed: August 15, 2011
    Date of Patent: September 11, 2012
    Assignee: Juniper Networks, Inc.
    Inventors: Gunes Aybay, Shreeram Siddhaye, Srinivas Gadgil, Euan F. Mowat
  • Publication number: 20120198108
    Abstract: Administering the polling of a number of devices for device status including determining whether a task identification for polling the device is in the delayed polling queue; if the task identification for polling the device is not in the delayed polling queue, determining whether the task identification for polling the device is in the immediate polling queue; if the task identification for polling the device is in the immediate polling queue; calculating a new time interval for polling the device in dependence upon a predetermined base period and a random selection of a time offset, wherein the time offset is within a predetermined range; calculating a next polling time for polling the device in dependence upon the current time and the new time interval; inserting the task identification in the delayed polling queue in dependence upon the next polling time.
    Type: Application
    Filed: April 9, 2012
    Publication date: August 2, 2012
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nicholas M. Williamson, Yin Jun Xu, Pu Yp Yang
  • Patent number: 8166548
    Abstract: According to the present invention, a timeout caused by executing a virus scan is avoided. A computer system has a first computer, a second computer coupled to the first computer, and a storage system coupled to the first computer and the second computer. The first computer receives a request to write data, writes the requested data in the storage system, and sends a virus scan request of the written data to the second computer. The second computer receives the virus scan request from the first computer, reads the written data out of the storage system, and partially executes a virus scan of the read data. After the partial virus scan of the read data is finished, the first computer sends a response to the received write request. After the first computer sends the response, the second computer executes the remainder of the virus scan of the read data.
    Type: Grant
    Filed: January 8, 2008
    Date of Patent: April 24, 2012
    Assignee: Hitachi, Ltd.
    Inventor: Nobuyuki Saika
  • Publication number: 20120059957
    Abstract: In a first embodiment of the present invention, a method for configuring a plurality of input/output (I/O) interconnect switch ports is provided, the method comprising: starting a link training and status state machine (LTSSM) for each of the plurality of ports; placing each of the LTSSMs in a receiver detect state; changing all of the LTSSMs to a polling state only once receivers are detected or timeouts occur in the receiver detect states in each of the LTSSMs; changing all of the LTSSMs to a configuration state only once polling is successful or timeouts occur in the polling states in each of the LTSSMs; and completing the configuration state of each of the LTSSMs.
    Type: Application
    Filed: September 3, 2010
    Publication date: March 8, 2012
    Applicant: PLX TECHNOLOGY, INC.
    Inventor: Christopher R. MILLSAPS
  • Patent number: 8131892
    Abstract: A storage apparatus is provided that is capable of reducing data maintenance management costs with a performance that is both highly reliable and fast. The present invention is storage apparatus where an intermediary device is arranged between a controller and a plurality of disk devices of different performances arranged in a hierarchical manner. The controller unit carries out I/O accesses to and from the disk devices via the intermediary devices based on access requests sent from host apparatus. The intermediary device includes a power saving control function for the disk device and carries out operation control such as spin off and spin up of disk devices in accordance with conditions set in advance.
    Type: Grant
    Filed: May 7, 2010
    Date of Patent: March 6, 2012
    Assignee: Hitachi, Ltd.
    Inventors: Hiroyuki Kumasawa, Takashi Chikusa, Satoru Yamaura