Hashing Patents (Class 711/216)
  • Patent number: 7702536
    Abstract: A method is provided for using referral data to track software product sell-through and compensate software product distributors. A referral identifier (ID), that identifies a product distributor, is associated with a product. The referral ID may be placed on or within the product container, or in the original equipment manufacturer (OEM) case, directly written to the registry or other storage of a new computer. During product activation, the referral ID is sent, along with other referral data, to a server computer where it is stored. Once the server computer determines that a purchase related to the product has occurred, the server retrieves the referral data to identify the referring product distributor, the product involved, the date the product was activated, the date the related purchase was activated, and other related parameters. The referral data may then be audited and used to determine compensation for the identified product distributor.
    Type: Grant
    Filed: December 4, 2002
    Date of Patent: April 20, 2010
    Assignee: Microsoft Corporation
    Inventors: Ferdinand N. Alabraba, Aidan T. Hughes, Parrish G. Munsell
  • Patent number: 7685377
    Abstract: A method for storing data that is reconstructable in a piecewise manner comprises receiving a user data unit in the form of a data stream to be stored in the data storage system. A plurality of logical data units associated with the user data unit are then identified. A digital signature is associated with each logical data unit and stored within a component of the data storage system. The logical data unit digital signature is used by the data storage system to determine whether or not to actually store each logical data unit. A digital signature for the entire user data unit is also determined and associated with the user data unit. A reconstructed user data unit when desired is then assembled by examining the stored logical data unit digital signatures.
    Type: Grant
    Filed: July 12, 2006
    Date of Patent: March 23, 2010
    Assignee: Storage Technology Corporation
    Inventor: Charles A. Milligan
  • Publication number: 20100070736
    Abstract: An information processing system includes: a data processing unit that executes verification processing for a content recorded in a disk and reproduces the disk-recorded content under a condition that the verification succeeds, wherein the data processing unit randomly selects hash units, which are objects of collation, from among a plurality of hash units formed with component data items of the content, reads the selected hash units sequentially from the disk, calculates hash values, and collates the calculated hash values with collation hash values; and the data processing unit executes reading sequence determination processing so as to determine a reading sequence in which the selected hash units are sorted according to recording positions in a disk, and reads the selected hash units according to the determined reading sequence.
    Type: Application
    Filed: September 16, 2009
    Publication date: March 18, 2010
    Applicant: Sony Corporation
    Inventor: Jumpei Kimura
  • Patent number: 7680998
    Abstract: A backup is performed by a client at a time when a backup server is unable to process the backup. The client maintains a cache including a root tag vector and hash entries. The client begins a backup by writing the root tag vector to a journal file and breaking files into pieces. For each piece, the client performs a hash and compares the resulting hash to entries in the cache. If the hash does not match any entries, the client records a request in the journal file to add the corresponding piece of data to an archive. After completing the backup, the journal file can be sent to the server. Before processing the journal file, the server validates the root tag vector. If the root tag vector is valid, the server processes each of the requests to add data. Otherwise, the server discards the journal file.
    Type: Grant
    Filed: June 1, 2007
    Date of Patent: March 16, 2010
    Assignee: EMC Corporation
    Inventors: Scott Auchmoody, Eric Olsen, Scott Ogata
  • Publication number: 20100058023
    Abstract: The management of a data storage system. The system may store data objects that are subject to change in container sets. The data storage system uses location maps to map the data objects to a corresponding container. When there has been, or will be, a change in the availability of containers, a new location map is created which maps the data objects to a new potentially overlapping set of containers. New data objects are added to the new set of containers, and a data object is found by searching all location maps. As an alternative or as an addition to this system, data objects may be stored in a manner that they may be efficiently removed when a condition is met. A container is created which stores all data objects to be removed when the condition occurs. When the condition occurs, the container is removed.
    Type: Application
    Filed: August 29, 2008
    Publication date: March 4, 2010
    Applicant: Microsoft Corporation
    Inventor: Kee Hern Tan
  • Publication number: 20100058027
    Abstract: A method for selecting a hash function, a method for storing and searching a routing table and devices thereof are provided. The method for selecting a hash function includes: hashing data to be hashed by using a current alternative hash function; decoding a hash result; accumulating decoded results until no carry occurs during the accumulation; and selecting a current alternative hash function with no carry generated as a formal hash function. The method for storing a routing table includes: dividing the routing table into a next-level node pointer portion and a prefix portion for being stored; and selecting a hash function by using the above method for selecting a hash function. The method for searching a routing table includes: directly searching an IP address to be searched according to a directly stored length of a next-level node pointer portion for storing the routing table; and reading a prefix node according to a searched result.
    Type: Application
    Filed: July 29, 2009
    Publication date: March 4, 2010
    Applicant: Huawei Technologies Co. Ltd.
    Inventors: Jun Gong, Chong Zhan, Hongfei Chen, Rui Hu, Jian Zhang, Hunghsiang Jonathan Chao, Hao Su, Xiaozhong Wang, Tuanhui Sun
  • Patent number: 7668740
    Abstract: A method, system and computer program product for interfacing between information requesters and information sources. In an embodiment, information is obtained from one or more information sources in response to client requests. In an embodiment, information received from information sources is cached for future use, such as for future client requests. In a caching embodiment, information can also be received by monitoring traffic between an information source and a third party, and/or by proactively querying the information sources. Proactive queries can be generated to populate a cache and/or to update presently cached information. In a caching embodiment, the invention includes methods for determining whether to respond to a request for information out-of-cache and/or with real-time information from an information source. In an embodiment, the invention interfaces with airline availability information sources.
    Type: Grant
    Filed: September 22, 2000
    Date of Patent: February 23, 2010
    Assignee: ITA Software, Inc.
    Inventors: David M. Baggett, Gregory R. Galperin
  • Patent number: 7668851
    Abstract: A system, method and computer program product for moving a shared list element from a first list location to a second list location includes making the list element appear simultaneously in the first list and the second list under a first key associated with the first list, changing the first key associated with the first list to a second key associated with the second list, and making the list element appear only in the second list under the second key associated with the second list.
    Type: Grant
    Filed: November 29, 2006
    Date of Patent: February 23, 2010
    Assignee: International Business Machines Corporation
    Inventor: Joshua Triplett
  • Patent number: 7664927
    Abstract: Hash tables comprising load factors of up to and above 97% are disclosed. The hash tables may be associated with three or more hash functions, each hash function being applied to a key to identify a location in a hash table. The load factor of a hash table may be increased, obviating any need to increase the size of the hash table to accommodate more insertions. Such increase in load factor may be accomplished by a combination of increasing the number of cells per bucket in a hash table and increasing the number of hash functions associated with the hash table.
    Type: Grant
    Filed: March 29, 2006
    Date of Patent: February 16, 2010
    Assignee: Microsoft Corporation
    Inventors: Ulfar Erlingsson, Mark Steven Manasse, Frank D. McSherry, Abraham D. Flaxman
  • Patent number: 7660794
    Abstract: A database operable in a multithreaded environment has a database update code. Each thread accessing the database obtains lock prior to walking the database. Any thread that alters database structure, such as by adding or deleting a record of the database, writes the database update code. Before releasing lock, the thread copies the database update code and a current record pointer into memory locations private to the thread. When a thread requires a second access to a record of the database, it obtains lock. The thread then compares its copy of the update code to the database update code, if they are different the thread must re-walk the database to locate the record since database structure has changed since the thread first accessed the database.
    Type: Grant
    Filed: June 3, 2003
    Date of Patent: February 9, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Eric C. Scoredos
  • Publication number: 20100031000
    Abstract: An apparatus, system, and method are disclosed for validating that correct data is read from a storage device. A read request receiver module receives a read storage request to read a data segment of a file or object stored on a data storage device. The storage request includes one or more source parameters for the data segment. The source parameters include one or more virtual addresses that identify the data segment. A hash generation module generates one or more hash values from the virtual addresses. A read data module reads the requested data segment and returns one or more data packets and corresponding stored hash values stored with the data packets. The stored hash values were generated from a data segment written to the data storage device that contains data of the data packets. A hash check module verifies that the generated hash values match the respective stored hash values.
    Type: Application
    Filed: April 6, 2008
    Publication date: February 4, 2010
    Inventors: David Flynn, Jonathan Thatcher, John Strasser
  • Patent number: 7657654
    Abstract: A resource unit has a request interface to allow the unit to receive a request and associated data. The resource unit also has a hashing engine to create a hash of the associated data, a modulo engine to create a modulus result, a read engine to perform a memory read, and a results interface to allow the device to return results.
    Type: Grant
    Filed: July 25, 2005
    Date of Patent: February 2, 2010
    Assignee: Cisco Technologies, Inc.
    Inventors: Earl T. Cohen, Ibrahim Delibalta, Jonathan Rosen
  • Patent number: 7657500
    Abstract: Concurrent cuckoo hashing is performed on a hash table that includes a number of locations; each may hold a value. A plurality of processes may concurrently execute on the table; each process includes a sequence of operations, which are divided into a number of phases. Each phase corresponds to one operation in the sequence. An overflow buffer is provided for each location in the table. Each overflow buffer may hold a value displaced from its corresponding location in the table. A plurality of sequences of operations is concurrently executed. Each phase in a sequence executes by acquiring one or two locks on two locations in the table; a lock acts on a location and its overflow buffer. An operation of a phase is then executed. If, on conclusion of the phase execution, any overflow buffer holds a value, the execution is repeated until all overflow buffers are empty.
    Type: Grant
    Filed: March 12, 2007
    Date of Patent: February 2, 2010
    Assignee: Sun Microsystems, Inc.
    Inventors: Nir N. Shavit, Maurice P. Herlihy
  • Publication number: 20100023726
    Abstract: A method, system and program are disclosed for accelerating data storage in a cache appliance that transparently monitors NFS and CIFS traffic between clients and NAS subsystems and caches files in a cache memory by using a dual hash technique to rapidly store and/or retrieve connection state information for cached connections in a plurality of index tables that are indexed by hashing network protocol address information with a pair of irreducible CRC hash algorithms to obtain an index to the memory location of the connection state information.
    Type: Application
    Filed: July 28, 2008
    Publication date: January 28, 2010
    Inventor: Joaquin J. Aviles
  • Publication number: 20100023727
    Abstract: The present invention relates to an IF address lookup apparatus using a Bloom filter and a multi-hashing architecture that includes a buffering means that outputs a prefix of an inputted address having the number of bits reduced by one bit whenever a control signal is received at the time of outputting the prefix of the inputted address; a hashing hardware that generates a plurality of hashing indexes by hashing the prefix (hereinafter, referred to as “output prefix”) outputted from the buffering means; a Bloom filter that determines whether or not the output prefix is an entry of the hash table by using the plurality of hashing indexes; and a processor that includes the hash table and an overflow table and outputs a prefix that matches the output prefix by searching entries of locations of the hash table indicated by the plurality of hashing indexes and entries stored in the overflow table when a Bloom filter's determination result is positive and outputs the control signal to the buffering means when the ma
    Type: Application
    Filed: April 22, 2009
    Publication date: January 28, 2010
    Applicant: Ewha University-Industry Collaboration Foundation
    Inventor: Hyesook Lim
  • Patent number: 7646768
    Abstract: Techniques are provided for re-mapping and interleaving transport packets of multiple transport streams for processing by a single transport demultiplexor. At least one PID re-map table is employed having re-map values indexed by n possible PID values of transport packets associated with at one transport stream of the multiple transport streams. The n possible PID values is less than or equal to the number of PID values which can be handled by the single transport demultiplexor, and is less than all possible PID values of transport packets within the multiple transport streams. The PID values within at least one transport stream are compared with the n possible PID values of the PID re-map table, and when a match is found, the table is indexed using the matching entry and a re-map value is generated therefrom. The re-map value replaces the original PID value within the transport packet.
    Type: Grant
    Filed: February 6, 2006
    Date of Patent: January 12, 2010
    Assignee: International Business Machines Corporation
    Inventors: David Coupe, Eric M. Foster, Bryan J. Lloyd, Chuck H. Ngai
  • Patent number: 7644287
    Abstract: Dynamic run-time verification of a module which is loaded in memory (in whole or in part) for execution is enabled by using pre-computed portion-level verification data for portions of the module smaller than the whole (e.g. at the page-level). A portion of the module as loaded into memory for execution can be verified. Pre-computed portion-level verification data is retrieved from storage and used to verify the loaded portions of the executable. Verification data may be, for example, a digitally signed hash of the portion. Where the operating system loader has modified the portion for execution, the modifications are reversed, removing any changes performed by the operating system. If the portion has not been tampered, this will return the portion to its original pre-loaded state. This version is then used to determine validity using the pre-computed portion-level verification.
    Type: Grant
    Filed: July 29, 2004
    Date of Patent: January 5, 2010
    Assignee: Microsoft Corporation
    Inventors: Timothy J. Oerting, Philip J. Lafornara, Robert Ian Oliver, Scott A. Brender, Michael David Marr
  • Publication number: 20090328218
    Abstract: A log output device and a program are provided, which append a signature to a log, prevent an undetectable tampering (alteration, insertion, deletion, etc.), and are able to narrow tampered position if tampered. The log output device forms a log record including a data part and a hash part, and outputs to a disk; the hash part is formed by combining a hash of the data part (data hash) and a hash of the hash part of the previous record (link hash); a signature is appended to only a part of records of a hash chain; when outputting the record to the disk, a copy of the hash part of the record is maintained on a process memory; when outputting next record, the hash part of the latest record on the disk and the hash part maintained on the process memory are compared; if they are matched, the record on the disk is determined as not being tampered, and if mismatched, the record is determined as tampered.
    Type: Application
    Filed: August 28, 2006
    Publication date: December 31, 2009
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventor: Tatsuya Tsurukawa
  • Patent number: 7640437
    Abstract: An electronic memory component provides a plurality of access-secured sub-areas. Each access-secured memory sub-area has at least one assigned parameter, for example, an address. The memory encrypts the assigned parameters of the access-secured sub-areas in such a way that on the one hand the security of such devices is increased considerably and on the other hand the associated expense and technical complexity are not too great. The encryption allows access to at least one sub-area dependent on at least one further sub-area.
    Type: Grant
    Filed: November 19, 2003
    Date of Patent: December 29, 2009
    Assignee: NXP B.V.
    Inventors: Markus Feuser, Sabine Sommer
  • Patent number: 7636824
    Abstract: A method, system and computer program product for data backup such that: for each block of a storage device to be backed up to an image, generating a hash function value corresponding to contents of that block; generating a map of links between blocks in the image and corresponding blocks the storage device; using the hash function values to identify blocks of the storage device with identical contents, such that links for the blocks in the storage device with identical contents point to a single block in the image; and modifying the link in the map when a block in the storage is moved (for example, due to defragmentation) but its contents is not altered, so that the link points to the same backed up block.
    Type: Grant
    Filed: June 4, 2007
    Date of Patent: December 22, 2009
    Assignee: Acronis Inc.
    Inventor: Alexander G. Tormasov
  • Patent number: 7634632
    Abstract: A method and system that aggregates data associated with one or more entities from different data sources are provided. The data sources include documents, web pages, or images that have information about one or more entities. The information is extracted from the data sources based on criteria that define the entities. The extracted information is utilized to generate a hash identifier that corresponds to each entity and one or more storage locations. The one or more storage locations and associated hash identifiers are utilized to store the extracted information corresponding to the entities, and the extracted information for each entity is structured as a virtual page that is stored in an index having references to the data sources. The index storing the virtual pages is notified or updated when the associated data sources are modified.
    Type: Grant
    Filed: January 8, 2009
    Date of Patent: December 15, 2009
    Assignee: Microsoft Corporation
    Inventors: Dzmitry Suponau, Jay Girotto, Qiang Wu, Rohit Vishwas Wad, Yue Liu
  • Patent number: 7631060
    Abstract: A system for identifying principals within a computing environment is disclosed. The system includes principal objects containing identity claims. The principal objects are used by computer processes within the environment to perform tasks related to the association of principals to activated resource objects. Exemplary principals include individuals, a group of individuals, organizations and computer modules and devices. Each identity claim uniquely identifies a specific principal within a particular scheme. To accomplish this, each identity claim includes an assertion that specifies an identification string unique to a principal within the associated scheme. Exemplary schemes for an individual include email accounts, telephone numbers, credit card account numbers and social security numbers. Thus, exemplary identification strings for an individual are specific email addresses, specific telephone numbers, etc.
    Type: Grant
    Filed: October 23, 2003
    Date of Patent: December 8, 2009
    Assignee: Microsoft Corporation
    Inventors: Kim Cameron, Don Hacherl
  • Publication number: 20090300321
    Abstract: The invention provides a method for reducing identification of chunk portions in data de-duplication. The method includes detecting sequences of stored identification of chunk portions of at least one data object, indexing the detected stored identification of chunk portions based on a sequence type, encoding first repeated sequences of the stored identifications with a first encoding, encoding second repeated sequences of the stored identifications with a second encoding, and avoiding repeated stored identifications of chunk portions.
    Type: Application
    Filed: May 29, 2008
    Publication date: December 3, 2009
    Applicant: International Business Machines Corporation
    Inventors: Subashini Balachandran, Mihail Corneliu Constantinescu
  • Patent number: 7627609
    Abstract: A method, article of manufacture, and apparatus for tracking a plurality of objects being stored are disclosed. In an embodiment, this comprises computing the hash value of the name of each object being stored, transforming the hash value into a plurality of bytes such that none of the bytes has the value of a flag used by the system, concatenating the transformed hashed values into a hint, and storing the hint in an index. In an embodiment, bytes having the flag value are mapped to an unused value during the transformation. In an embodiment, the hint is retrieved from the index and hashed values are transformed back. Mapped values are restored to the flag values. This allows use of the hint with a system that uses a flag in the index as an indicator; for example, to indicate that an endpoint has been reached.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: December 1, 2009
    Assignee: EMC Corporation
    Inventors: Yasemin Ugur Ozekinci, Thomas Papadakis
  • Publication number: 20090287904
    Abstract: The present invention comprise methods and systems for enforcing allowable hardware configurations. The present invention utilizes shadow registers, which act as gatekeepers for actual sensitive configuration registers. An attempted write to the actual sensitive configuration registers is first stored in a corresponding shadow register and is subsequently validated via a cryptographic hash register before the values are passed to the actual configuration register.
    Type: Application
    Filed: May 15, 2008
    Publication date: November 19, 2009
    Applicant: International Business Machines Corporation
    Inventors: ANTHONY J. BYBELL, Jason M. Sullivan
  • Publication number: 20090287901
    Abstract: A system and method for effectively increasing the amount of data that can be stored in the main memory of a computer, particularly, by a hardware enhancement of a memory controller apparatus that detects duplicate memory contents and eliminates duplicate memory contents wherein the duplication and elimination are performed by hardware without imposing any penalty on the overall performance of the system.
    Type: Application
    Filed: May 16, 2008
    Publication date: November 19, 2009
    Applicant: International Business Machines Corporation
    Inventors: Bulent Abali, Mohammad Banikazemi
  • Patent number: 7620766
    Abstract: A computer system has one or more software contexts that share use of a memory that is divided into units such as pages. In the preferred embodiment of the invention, the contexts are, or include, virtual machines running on a common hardware platform. The contents, as opposed to merely the addresses or page numbers, of virtual memory pages that are accessible to one or more contexts are examined. If two or more context pages are identical, then their memory mappings are changed to point to a single, shared copy of the page in the hardware memory, thereby freeing the memory space taken up by the redundant copies. The shared copy is then preferably marked copy-on-write. Sharing is preferably dynamic, whereby the presence of redundant copies of pages is preferably determined by hashing page contents and performing full content comparisons only when two or more pages hash to the same key.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: November 17, 2009
    Assignee: VMware, Inc.
    Inventor: Carl A. Waldspurger
  • Patent number: 7613669
    Abstract: A method and apparatus for storing pattern matching data and a pattern matching method using the method and apparatus are provided. The method of storing original data for pattern matching in a pattern matching apparatus includes: dividing the original data into segments of a predetermined size; performing a hash operation on each of the divided segments; determining whether or not the hash operation value of each segment causes a hash collision with a hash operation value stored in a first external memory disposed outside the pattern matching apparatus; and controlling the hash operation value of each segment determined not to cause a hash collision to be stored in the first external memory. According to the method and apparatus, the original data desired to be used for pattern matching can be stored at a faster speed in a pattern matching data storing apparatus.
    Type: Grant
    Filed: June 14, 2006
    Date of Patent: November 3, 2009
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seung Won Shin, Jin Tae Oh, Jong Soo Jang, Sung Won Sohn
  • Patent number: 7610483
    Abstract: One embodiment of the present invention sets forth a technique for concisely identifying the hardware configuration of a computer system through a single signature value. This signature value is computed by passing specific hardware configuration information through a hashing function. The hardware configuration information may include, among other things, selected elements of the SMBIOS system description as well as PCI topology and PCI bus type information.
    Type: Grant
    Filed: July 25, 2006
    Date of Patent: October 27, 2009
    Assignee: NVIDIA Corporation
    Inventors: Andrew Currid, Mark A. Overby
  • Patent number: 7609657
    Abstract: An address learning method for a network device having a plurality of connection ports, at least one of which is electrically connected to a terminal device. The method includes a fetching process, a hashed-address generating process, a data registering process and an address registering process. The fetching process fetches an address data string from a first memory unit by a programmable logic device (PLD). The hashed-address generating process generates a hashed-address by the programmable logic device. The data registering process writes the address data string into an address data table. The address registering process writes the hashed-address into a hashed-address table. A network device for performing the address data learning method is also disclosed.
    Type: Grant
    Filed: August 29, 2006
    Date of Patent: October 27, 2009
    Assignee: Accton Technology Corporation
    Inventors: Chih-Chiang Lee, Li-Hua Wu, Jia-Jang Young
  • Patent number: 7606994
    Abstract: In one embodiment, a cache memory system includes a cache memory coupled to a cache controller. The cache memory controller may receive an address and generate an index value corresponding to the address for accessing a particular entry within the cache memory. More particularly, the cache controller may generate the index value by performing a hash function on a first portion of the address such as an address tag, and combining a result of the hash function with a second portion of the address such as an index, for example.
    Type: Grant
    Filed: November 10, 2004
    Date of Patent: October 20, 2009
    Assignee: Sun Microsystems, Inc.
    Inventor: Robert E. Cypher
  • Patent number: 7602787
    Abstract: Methods and apparatus are disclosed herein for classifying packets using ternary and binary content-addressable memory stages to classify packets. One such system uses a stage of one or more TCAMS followed by a second stage one or more CAMS (or alternatively some other binary associative memories such as hash tables or TRIEs) to classify a packet. One exemplary system includes TCAMs for handling input and output classification and a forwarding CAM to classify packets for Internet Protocol (IP) forwarding decisions on a flow label. This input and output classification may include, but is not limited to routing, access control lists (ACLs), quality of service (QoS), network address translation (NAT), encryption, etc. These IP forwarding decisions may include, but are not limited to IP source and destination addresses, protocol type, flags and layer 4 source and destination ports, a virtual local area network (VLAN) id and/or other fields.
    Type: Grant
    Filed: December 28, 2005
    Date of Patent: October 13, 2009
    Assignee: Cisco Technology, Inc.
    Inventor: David R. Cheriton
  • Patent number: 7602789
    Abstract: A system and method for detecting new connection rates for network traffic that employs a set of tables and a hash function. Information identifying a connection is hashed to a hash value using the hash function. Each hash value identifies a location in a first table and a second table. The hash values for the connections detected during a predetermined time period are stored in the first table. The hash values for the connections detected during the predetermined time period preceding the current time period are stored in the second table. As the hash values are stored in the first table, they are compared to the hash values stored in the second table to identify new connections. The new connections are accumulated. The second table is then cleared, and the hash values for the detected connections in the next time period are stored in the second table.
    Type: Grant
    Filed: October 23, 2006
    Date of Patent: October 13, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Alan R. Albrecht
  • Patent number: 7600094
    Abstract: A linked list traversal system identifies when a linked list has become inefficient, either through attack or an undue multiplicity of collisions. A data unit is parsed to extract a key. A first hash result associated with the key is calculated based on a first hash function. A first linked list is identified based on the first hash result. It is determined whether the first linked list has been compromised. A second hash result associated with the key is calculated based on a second hash function when the first linked list has been compromised. A second linked list is established based on the second hash result, where the second hash result is different from the first hash result.
    Type: Grant
    Filed: June 30, 2006
    Date of Patent: October 6, 2009
    Assignee: Juniper Networks, Inc.
    Inventors: Xiangdong Jin, Dongping Luo, Wen Wei
  • Publication number: 20090249023
    Abstract: A novel method is described for applying various hash methods used in conjunction with a query with a Group By clause. A plurality of drawers are identified, wherein each of the drawers is made up of a collection of cells from a single partition of a Group By column and each of the drawers being defined for a specific query. A separate hash table is independently computed for each of the drawers and a hashing scheme (picked from among a plurality of hashing schemes) is independently applied for each of the drawers.
    Type: Application
    Filed: March 28, 2008
    Publication date: October 1, 2009
    Applicant: International Business Machines Corporation
    Inventors: Lin Qiao, Vijayshankar Raman, Garret Frederick Swart
  • Publication number: 20090240913
    Abstract: An input data enlarging unit (100) derives a first enlargement unit output and a second enlargement unit output that are uniquely specified by input data (103) to output the same. The first enlargement unit output and the second enlargement unit output are elements of output data set B which forms a group. An ?-? hash function calculation unit (101) receives as input the first enlargement unit output to calculate an h? function which is specified by hash-function-specifying data (104) and an element of the H? function set. The function set H? is such that the number of h?H ? which satisfies h(x)?h(y)=d for an arbitrary element d of the output data set B and two different elements x and y of the output data set B is equal to or smaller than |H?|·?. An adding unit (102) adds together the result of calculation of the function H? and the second enlargement unit output to output a result of the addition.
    Type: Application
    Filed: September 7, 2006
    Publication date: September 24, 2009
    Applicant: NEC CORPORATION
    Inventors: Satoshi Obana, Akihiro Tanaka
  • Patent number: 7594071
    Abstract: The present invention carries out cache management in such a manner that the management region required for cache management does not increase, and neither does the performance decline. It is possible to combine use of both a hierarchical directory method and a hash directory method, in order to manage cache data. In a hierarchical directory method, the desired data is retrieved by referring to respective tables T1 to T7, in succession. In a hash directory method, the desired data is reached by referring to a hash table TI0 and tables T4 to T7. Access conflicts between the respective methods are avoided by using the EDEV number and a portion of the VDEV number for a hash key. By combining use of both of these methods, it is possible to respond to cases where the storage capacity of the storage system has been increased, without having to raise the management region, and without causing a decline in performance.
    Type: Grant
    Filed: July 28, 2006
    Date of Patent: September 22, 2009
    Assignee: Hitachi, Ltd.
    Inventors: Takashi Sakaguchi, Sachiko Hoshino, Yasuyuki Nagasoe
  • Patent number: 7591022
    Abstract: Representing a number of assets on an originating computer begins with selecting the assets to be represented. Cryptographic hash asset identifiers are generated; each of the asset identifiers is computed using the contents of a particular asset. The asset identifier is a content-based or content-addressable asset name for the asset and is location independent. An asset list is generated that includes the asset identifiers computed from the assets. A cryptographic hash asset list identifier is generated that is computed from the asset list. The asset list identifier is stored for later retrieval. The assets selected are also stored for safekeeping either locally or on a computer network. In the event of loss of the files from the originating computer, the asset list identifier is retrieved. Using the asset list identifier, the original asset list is found and retrieved from its safe location.
    Type: Grant
    Filed: June 13, 2005
    Date of Patent: September 15, 2009
    Assignee: EMC Corporation
    Inventors: Paul R. Carpentier, Jan F. Van Riel, Tom Teugels
  • Publication number: 20090228680
    Abstract: A method comprises obtaining a plurality of variable size chunks of data, calculating a first hash for each variable size chunk of data, determining a length representation for each variable size chunk of data, determining a second hash of a subset of each variable size chunk of data, and forming a signature of each variable size chunk of data that is comprised of the first hash, the length representation and the second hash.
    Type: Application
    Filed: May 30, 2008
    Publication date: September 10, 2009
    Applicant: CA, Inc.
    Inventors: Chandra Reddy, Pratap Karonde, Prashant Parikh
  • Publication number: 20090228534
    Abstract: Systems and methods enabling search of a repository for the location of data that is similar to input data, using a defined measure of similarity, in a time that is independent of the size of the repository and linear in a size of the input data, and a space that is proportional to a small fraction of the size of the repository. The similar data segments thus located are further analyzed to determine their common (identical) data sections, regardless of the order and position of the common data sections in the repository and input, and in a time that is linear in the segment size and in constant space.
    Type: Application
    Filed: March 19, 2009
    Publication date: September 10, 2009
    Applicant: INERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael Hirsch, Haim Bitner, Lior Aronovich, Ron Asher, Eitan Bachmat, Shmuel T. Klein
  • Patent number: 7587574
    Abstract: Context information pertaining to the virtual address is obtained, and a storage location for storing the address translation information is determined based on the context information.
    Type: Grant
    Filed: November 12, 2004
    Date of Patent: September 8, 2009
    Assignee: Fujitsu Limited
    Inventors: Masanori Doi, Iwao Yamazaki, Tsuyoshi Motokurumada, Masahiro Doteguchi
  • Publication number: 20090222675
    Abstract: Various mechanisms are disclosed for protecting the security of memory in a computing environment. A security layer can have an encryption layer and a hashing layer that can dynamically encrypt and then dynamically hash sensitive information, as it is being loaded to dynamic memory of a computing device. For example, a memory unit that can correspond to a memory page can be processed by the security layer, and header data, code, and protect-worthy data can be secured, while other non-sensitive data can be left alone. Once such information is secured and stored in dynamic memory, it can be accessed at a later time by a processor and unencrypted and hash checked. Then, it can be loaded back onto the dynamic memory, thereby preventing direct memory access attacks.
    Type: Application
    Filed: February 29, 2008
    Publication date: September 3, 2009
    Applicant: Microsoft Corporation
    Inventors: Sebastian Lange, Dinarte R. Morais, Victor Tan, Adam G. Poulos
  • Patent number: 7577848
    Abstract: Systems and methods for validating integrity of an executable file are described. In one aspect, multiple partial image hashes are generated, the combination of which represent a digest of an entire executable file. Subsequent to loading the executable file on a computing device, a request to page a portion of the executable file into memory for execution is intercepted. Responsive to intercepting the request, and prior to paging the portion into memory for execution, a validation hash of the portion is computed. The validation hash is compared to a partial hash of the multiple partial image hashes to determine code integrity of the portion. The partial hash represents a same code segment as the portion.
    Type: Grant
    Filed: January 18, 2005
    Date of Patent: August 18, 2009
    Assignee: Microsoft Corporation
    Inventors: Jonathan D. Schwartz, Yu Lin Sie, Philip Joseph Hallin
  • Publication number: 20090198947
    Abstract: Memory mapping techniques for non-volatile memory are disclosed where logical sectors are mapped into physical pages using data structures in volatile and non-volatile memory. In some implementations, a first lookup table in non-volatile memory maps logical sectors directly into physical pages. A second lookup table in volatile memory holds the physical address of the first lookup table in non-volatile memory. In some implementations, a cache in volatile memory holds the physical addresses of the most recently written logical sectors. Also disclosed is a block TOC describing block content which can be used for garbage collection and restore operations.
    Type: Application
    Filed: August 18, 2008
    Publication date: August 6, 2009
    Applicant: APPLE INC.
    Inventors: Vadim Khmelnitsky, Nir Jacob Wakrat
  • Patent number: 7571484
    Abstract: A file system protection mechanism for an operating system image for a portable computing device is provided to assist in ensuring a good user experience. A signed catalog file is embedded in a resource-sparing operating system (OS), such as a Windows CE image, for security enhancement and load verification purposes. The invention performs various checks on the image and the signature of the image to ensure that image has not been maliciously modified and that it complies with a release standard. Such a mechanism is important to protect image loads from external threats made possible by, e.g. recent incorporation of broadband wireless and wireline connectivity for portable computing devices. The signing technique includes creating a signed catalog of the image and embedding that catalog into the image as it is loaded onto the portable computing device.
    Type: Grant
    Filed: December 4, 2003
    Date of Patent: August 4, 2009
    Assignee: Microsoft Corporation
    Inventors: Mark Kraus, Sudhakar Prabhu
  • Patent number: 7571299
    Abstract: Methods and arrangements to insert values in hash tables are contemplated. Embodiments include transformations, code, state machines or other logic to insert values in a hash table stored in electronic memory by hashing a value to determine a home address of an entry in the hash table, the hash table having a plurality of entries, each entry comprising an address, a value, and a link. The embodiments may include determining whether there is a collision of the value with a value stored in the entry; inserting the value in the entry if there is no collision; and generating the addresses of further entries until an entry is found in which the value can be inserted if there is a collision. The embodiments may include generating a plurality of addresses of entries based upon the address of a previously generated entry.
    Type: Grant
    Filed: February 16, 2006
    Date of Patent: August 4, 2009
    Assignee: International Business Machines Corporation
    Inventor: Mitchell L. Loeb
  • Publication number: 20090193224
    Abstract: Techniques for reducing storage space and detecting corruption in hash-based applications are presented. Data strings are hashed or transformed into numerically represented strings. Groupings of the numeric strings form a set. Each numeric string of a particular set is associated with a unique co-prime number. All the numeric strings and their corresponding co-prime numbers for a particular set are processed using a Chinese Remainder Theorem algorithm (CRT) to produce a single storage value. The single storage value is retained in place of the original numeric strings. The original numeric strings can be subsequently reproduced and verified using the single storage value and the co-prime numbers.
    Type: Application
    Filed: January 25, 2008
    Publication date: July 30, 2009
    Inventors: Vardhan Itta Vishnu, H. B. Puthali
  • Publication number: 20090193223
    Abstract: The present invention is directed toward methods and systems for data de-duplication. More particularly, in various embodiments, the present invention provides systems and methods for data de-duplication that may utilize a vectoring method for data de-duplication wherein a stream of data is divided into “data sets” or blocks. For each block, a code, such as a hash or cyclic redundancy code may be calculated and stored. The first block of the set may be written normally and its address and hash can be stored and noted. Subsequent block hashes may be compared with previously written block hashes.
    Type: Application
    Filed: January 24, 2008
    Publication date: July 30, 2009
    Inventors: George Saliba, Theron White
  • Publication number: 20090187727
    Abstract: Embodiments of the present invention provide a system that generates an index for a cache memory. The system starts by receiving a request to access the cache memory, wherein the request includes address information. The system then obtains non-address information associated with the request. Next, the system generates the index using the address information and the non-address information. The system then uses the index to fulfill access the cache memory.
    Type: Application
    Filed: January 23, 2008
    Publication date: July 23, 2009
    Applicant: SUN MICROSYSTEMS, INC.
    Inventors: Paul Caprioli, Martin Karlsson, Shailender Chaudhry
  • Patent number: RE41012
    Abstract: A double indirect method of accessing a block of data in a register file is used to allow efficient implementations without the use of specialized vector processing hardware. In addition, the automatic modification of the register addressing is not tied to a single vector instruction nor to repeat or loop instructions. Rather, the technique, termed register file indexing (RFI) allows full programmer flexibility in control of the block data operational facility and provides the capability to mix non-RFI instructions with RFI instructions. The block-data operation facility is embedded in the iVLIW ManArray architecture allowing its generalized use across the instruction set architecture without specialized vector instructions or being limited in use only with repeat or loop instructions.
    Type: Grant
    Filed: June 3, 2004
    Date of Patent: November 24, 2009
    Assignee: Altera Corporation
    Inventors: Edwin Franklin Barry, Gerald George Pechanek, Patrick R. Marchand