Abstract: A data storage device including, in one implementation, a non-volatile memory device having a memory block including a number of memory dies, and a controller coupled to the non-volatile memory device. The controller is configured to monitor a temperature of the data storage device and determine whether the monitored temperature exceeds a first temperature threshold. The controller is also configured to perform a default thermal throttling operation based on the monitored temperature exceeding the first temperature threshold, determine whether the monitored temperature exceeds a second temperature threshold, and perform a customized thermal throttling operation based on the monitored temperature exceeding the second temperature threshold.

Abstract: A memory includes a memory device including plural memory blocks, each memory block including plural pages, and a controller coupled to the memory device and configured to select a target memory block among the plural memory blocks, the target memory block including a first page to an N page (N is a positive integer), and program data in the target memory block, based on a type of the data, either in a first direction from the first page to the N page or in a second direction from the N page to the first page.

Abstract: A method and system for self-sizing dynamic cache for virtualized environments is disclosed. The preferred embodiment self sizes unequal portions of the total amount of cache and allocates to a plurality of active virtualized machines (VM) according to VM requirements and administrative standards. As a new VM may emerge and request an amount of cache, the cache controller reclaims currently used cache from the active VM and reallocates the unequal portions of cache required by each VM. To ensure cache availability, a quick reclamation amount of cache is immediately available to each new VM as it makes the request begins operation. After reallocation, the newly created VM may rely on a guaranteed minimum quota of cache to ensure performance.

Abstract: An autonomous sub-system receives a database downloaded from a host controller. A controller monitors bus traffic and/or allocated resources in the subsystem and re-allocates resources based on the monitored results to dynamically improve system performance.

Abstract: A cache page management method can include paging out a memory page to an input/output controller, paging the memory page from the input/output controller into a real memory, modifying the memory page in the real memory to an updated memory page and purging the memory page paged to the input/output controller.

Abstract: Memory of a database management system (DBMS) that is running in a virtual machine is managed using techniques that integrate DBMS memory management with virtual machine memory management. Because of the integration, the effectiveness of DBMS memory management is preserved even though the physical memory allocated to the virtual machine may change during runtime as a result of varying memory demands of other applications, e.g., instances of other virtual machines, running on the same host computer as the virtual machine.

Abstract: According to at least one embodiment, a method comprises partitioning a computer system into a plurality of soft partitions that each run an operating system. The method further comprises instantiating a separate firmware instance for each of the plurality of soft partitions, wherein each of the firmware instances provides a pre-defined firmware interface for the operating system of its respective soft partition.

Abstract: The present invention extends to methods, systems, and computer program products for memory pinning through buffer encapsulation. Within a managed execution environment, a wrapper object encapsulates a memory buffer that is to be shared with a native routine executing in a native execution environment. The wrapper object manages operation of a memory manager on a memory heap corresponding to the memory buffer. The wrapper object includes a first function which sets a pin on the memory buffer and returns a pointer identifying the memory buffer. Setting the pin causes the memory manager to cease moving the memory buffer within the memory heap. The wrapper object also includes a second function which releases the pin on the memory buffer.

Abstract: Incoming data frames are parsed by a hardware component. Headers are extracted and stored in a first location along with a pointer to the associated payload. Payloads are stored in a single, contiguous memory location.

Abstract: A system for performance optimization of storage allocation to virtual logical units includes a storage entity having data storage space divided into slices for storing data. A slice allocation table stores slice allocation status. A memory stores statistics regarding the allocation of slices to logical units. A management database stores information regarding the allocation of slices to logical units. An allocation module performs an allocation process in response to receiving an I/O write request. A management module performs scheduled post-I/O management processes asynchronously with allocation processes, including updating the management database to reflect the allocation of the selected slice, and updating the status of the selected slice in the slice allocation table to indicate that the post-I/O management process for the selected slice has been performed.

Abstract: A detection module selects logically adjacent first and second control areas of a cluster. The detection module further determines that the first and second control areas satisfy a migration test wherein the first control area has free space exceeding a free threshold, the free space is at least equal to a space requirement for each second control area control interval, and the second control area has fewer control intervals than a control interval threshold. In addition, a copy module copies each second control area control interval to the first control area in response to determining that the first and second control areas satisfy the migration test.

Abstract: A method of operating a data management system includes establishing a base state for a data storage volume, generating a list of blocks associated with the data storage volume that have changed, and creating a snapshot from the list of blocks.

Abstract: Disclosed is a method of collapsing a derivative version of a primary storage volume into the primary storage volume. The method comprises generating the derivative version of the primary storage volume that contains a plurality of data items stored in a secondary storage volume, wherein the derivation version comprises a plurality of blocks, identifying changed blocks of the plurality of blocks that changed as a result of modifying at least one of the data items, identifying which of the changed blocks of the plurality of blocks that changed remain allocated, and collapsing the derivative version of the primary storage volume into the primary storage volume by copying those blocks identified as changed and allocated to the primary storage volume.

Abstract: A data control system comprises a communication interface, a processing system, and a storage system. The communication interface is configured to receive a request to retrieve data from a primary storage volume that includes a secondary storage volume. The storage system is configured to store the primary storage volume that includes the secondary storage volume. The processing system is configured to identify changed segments of a plurality of segments in the primary storage volume and identify allocated segments of the changed segments. The communication interface is further configured to transfer the allocated segments in response to the request.

Abstract: A configurable memory allocation and management system may generate a configuration file with memory settings that may be deployed prior to runtime. A compiler or other pre-execution system may detect a memory allocation boundary and decorate the code. During execution, the decorated code may be used to look up memory allocation and management settings from a database or to deploy optimized settings that may be embedded in the decorations.

Abstract: A configurable memory allocation and management system may generate a configuration file with memory settings that may be deployed at runtime. An execution environment may capture a memory allocation boundary, look up the boundary in a configuration file, and apply the settings when the settings are available. When the settings are not available, a default set of settings may be used. The execution environment may deploy the optimized settings without modifying the executing code.

Abstract: A computer software execution system may have a configurable memory allocation and management system. A configuration file or other definition may be created by analyzing a running application and determining an optimized set of settings for the application on the fly. The settings may include memory allocated to individual processes, memory allocation and deallocation schemes, garbage collection policies, and other settings. The optimization analysis may be performed offline from the execution system. The execution environment may capture processes during creation, then allocate memory and configure memory management settings for each individual process.

Abstract: Example embodiments of the present invention includes systems and methods for implementing a scalable symmetric multiprocessing (shared memory) computer architecture using a network of homogeneous multi-core servers. The level of processor and memory performance achieved is suitable for running applications that currently require cache coherent shared memory mainframes and supercomputers. The architecture combines new operating system extensions with a high-speed network that supports remote direct memory access to achieve an effective global distributed shared memory. A distributed thread model allows a process running in a head node to fork threads in other (worker) nodes that run in the same global address space. Thread synchronization is supported by a distributed mutex implementation. A transactional memory model allows a multi-threaded program to maintain global memory page consistency across the distributed architecture.

Abstract: Memory address resources requests are collected from devices on a bus. The requests are then sorted into descending order. For each resource request, a determination is then made as to whether the request is for a device that is behind a bridge. If the request is not for a device behind a bridge, the request is allocated. The request is also allocated if the request is for a device behind a bridge device and the request can be allocated without allocating padding. If a request is for a device behind a bridge and the request cannot be satisfied without using padding, then sufficient padding is allocated to properly align the request. An amount of padding may be allocated that satisfies the alignment requirement of the next resource request to be allocated. Requests for devices on the primary interface of the bridge device may also be satisfied from within the padding.

Abstract: Reducing remote reads of memory in a hybrid computing environment by maintaining remote memory values locally, the hybrid computing environment including a host computer and a plurality of accelerators, the host computer and the accelerators each having local memory shared remotely with the other, including writing to the shared memory of the host computer packets of data representing changes in accelerator memory values, incrementing, in local memory and in remote shared memory on the host computer, a counter value representing the total number of packets written to the host computer, reading by the host computer from the shared memory in the host computer the written data packets, moving the read data to application memory, and incrementing, in both local memory and in remote shared memory on the accelerator, a counter value representing the total number of packets read by the host computer.

Abstract: A method of operation of a storage control system includes: partitioning memory channels with memory devices; selecting a super device with one of the memory devices from one of the memory channels, the super device having a super chip select connected to chip selects of the memory devices; and selecting a super block associated with the super device.

Abstract: A method and system writes data to a memory device including writing data to varying types of physical write blocks. The method includes receiving a request to write data for a logical block address within an LBA range to the memory device. Depending on whether the quantity of valid data in the memory device meets a predetermined criteria, the data is written to a specific chaotic block, a general chaotic block, or a mapped block. The mapped block is assigned for writing data for the LBA range, the specific chaotic block is assigned for writing data for contiguous LBA ranges including the LBA range, and the general chaotic block is assigned for writing data for any LBA range. Lower fragmentation and write amplification ratios may result by using this method and system.

Abstract: Described are techniques for automatically provisioning storage for an application. A request to provision object-based storage for the application in a data storage system is received The request identifies the application and is received from a user interface interacting with the data storage system at a specified one of a plurality of user levels, each of said plurality of user levels being associated with a different level of abstraction with respect to first processing performed in implementing the request. The first processing is performed to provision object-based storage for the request. The first processing is determined in accordance with the application and includes a level of automation varying in accordance with the specified user level at which the user interface interacts with the data storage system. The automation includes selecting one or more default options in accordance with best practices of the application.

Abstract: A computational device receives a request to copy a source logical block of a thin provisioned source logical unit to a target logical block of a thin provisioned target logical unit, wherein in thin provisioned logical units physical storage space is allocated in response to a write operation being performed but not during creation of the thin provisioned logical units. The computational device generates metadata that stores a correspondence between the source logical block and the target logical block, while avoiding allocating any physical storage space for the target logical block in the thin provisioned target logical unit.

Abstract: An information processing device includes a first storage unit configured to store a set value indicating a value corresponding to a set item to define a function and flag information indicating whether an initialization of the set value is required, a second storage unit configured to store a flag address identifying a storage location of the flag information in the first storage unit in association with the set item at least, and an initialization unit configured to identify the flag information for each set item by using the flag address corresponding to each set item, and if the identified flag address indicates that the initialization is required, initialize the set value corresponding to the set item.

Abstract: A computer software execution system may have a configurable memory allocation and management system. A configuration file or other definition may be created by analyzing a running application and determining an optimized set of settings for the application on the fly. The settings may include memory allocated to individual processes, memory allocation and deallocation schemes, garbage collection policies, and other settings. The optimization analysis may be performed offline from the execution system. The execution environment may capture processes during creation, then allocate memory and configure memory management settings for each individual process.

Abstract: In one embodiment, the present invention includes a semiconductor die such as a system on a chip (SoC) that includes a logic analyzer with a built-in trace buffer to store information communicated between on-die agents at speed and to provide the information to an off-die agent at a slower speed. Other embodiments are described and claimed.

Abstract: Art is provided that is capable of easily performing update processing in a short time even when updating numerous data of a storage medium of a navigation device. A directory structure corresponding to a partition structure of a storage medium is created. Image files IF are generated for updated data content within partitions HDn (n=0, 1, 2, 4, 6). The generated image files IF of the partitions HDn are stored in directories DIR that correspond to the partitions HDn in the created directory structure. Data content of the image files IF read from the directories DIR that correspond to the partitions HDn is written to the partitions HDn of the storage medium.

Abstract: A data array 20 to be stored is first divided into a plurality of blocks 21. Each block 21 is further sub-divided into a set of sub-blocks 22, and a set of data for each sub-block 22 is then stored in one or more body blocks 25. A header data block 23 is stored for each block 21 at a predictable memory address within a header buffer 24. Each header data block contains pointer data indicating the position within a body block 25 where the data for the sub-blocks for the block 21 that that header data block 23 relates to is stored, and data indicating the size of the stored data for each respective sub-block 22.

Abstract: The de-duplication effect is enhanced even when managing data blocks by dividing them into fixed-length data. Every time a data block is entered, a controller for managing data blocks: sequentially sets a search area of a fixed size from a top of each data block to an end thereof; calculates a first hash value of data belonging to each search area; allocates a search area(s), for which the first hash value becomes a first set value, to a first chunk from among each of the search areas; allocates a search area(s), for which the first hash value is a minimum value, to a second chunk from among the search areas existing in an area larger than the search area if the area larger than the search area exists in an area other than the area to which the first chunk is allocated; allocates an area(s) smaller than the search area to a third chunk; calculates a second hash value from data of each chunk; and manages chunks having the same second hash value, as de-duplication chunks.

Abstract: A first communication device estimates upstream channel conditions for an upstream channel and determines an upstream memory requirement for a first buffer at a second communication device and a first buffer at the first communication device based on the upstream channel conditions. A downstream memory requirement is received from the second communication device for a second buffer at the first communication device and a second buffer at the second communication device based on downstream channel conditions estimated at the second communication device for a downstream channel. The first communication device determines whether the sum of the upstream and downstream memory requirements exceeds an available amount of memory for implementing the first and second buffers at the first communication device and revises at least one of the memory requirements if the sum of the upstream and downstream memory requirements is different than the available amount of memory.

Abstract: A method and system writes data to a memory device including dynamic assignment of logical block addresses (LBAs) to physical write blocks. The method includes receiving a request to write data for a logical block address within an LBA range to the memory device. The method assigns the LBA range to a particular write block exclusively or non-exclusively, depending on the existence of previously assigned write blocks and the availability of unwritten blocks. A data structure may be utilized to record the recent usage of blocks for assigning non-exclusive write blocks. An intermediate storage area may be included that implements the dynamic assignment of LBA ranges to physical write blocks. Data in the intermediate storage area may be consolidated and written to the main storage area. Lower fragmentation and write amplification ratios may result by using this method and system.

Abstract: According to one embodiment, memory is allocated between an interleaver buffer and a de-interleaver buffer in a communication device based on downstream and upstream memory requirements. The upstream de-interleaver memory requirement is determined based on upstream channel conditions obtained for a communication channel used by the communication device. The memory is allocated between the interleaver and de-interleaver buffers based on the downstream and upstream memory requirements. The downstream interleaver memory requirement may be determined based on one or more predetermined downstream configuration parameters. Alternatively, the downstream interleaver memory requirement may also be determined based on the upstream channel conditions by estimating the downstream capacity of the communication channel based on the upstream channel conditions and determining an interleaver buffer size that satisfies one or more predetermined downstream configuration parameters and the downstream capacity estimate.

Abstract: Reducing remote reads of memory in a hybrid computing environment by maintaining remote memory values locally, the hybrid computing environment including a host computer and a plurality of accelerators, the host computer and the accelerators each having local memory shared remotely with the other, including writing to the shared memory of the host computer packets of data representing changes in accelerator memory values, incrementing, in local memory and in remote shared memory on the host computer, a counter value representing the total number of packets written to the host computer, reading by the host computer from the shared memory in the host computer the written data packets, moving the read data to application memory, and incrementing, in both local memory and in remote shared memory on the accelerator, a counter value representing the total number of packets read by the host computer.

Abstract: A method for writing data in a system with alignment restriction, where first destination data generated from first source data located in a storage range starting at a first source position is written in a storage range starting at a non-aligned position. The method includes the steps of extracting second source data from a storage range starting at a second source position preceding the first source position, the second source data including the first source data, generating second destination data from the second source data, the second destination data including the first destination data, writing the second destination data in a storage range starting at an aligned position, where the second source position is set such that the first destination data is written in a storage range starting at the non-aligned position.

Abstract: A generic storage container system is provided for a grid-based storage architecture, comprising a generic storage container comprising a plurality of storage domains along one axis against a plurality of rows of stripes along another axis defining a preselected storage capacity, and configuration information allocating the stripes in response to a storage format specified by an allocation request. A method is provided for storing the data, comprising: providing the generic storage container; providing configuration information adapted for selectively allocating the stripes in relation to a data storage format; specifying a desired storage format; and allocating the stripes in response to the desired format.

Abstract: A storage system having a primary storage apparatus for storing data from a host computer in a primary logical volume, and a secondary storage apparatus connected to the primary storage apparatus, for providing a secondary logical volume for storing a copy of the data, the storage system comprising: a search unit for checking whether or not data exists in each primary slot area formed by partitioning a storage area in the primary logical volume into predetermined storage areas; a transmission unit for sending, if no data is held in the primary slot area, a notice indicating no data stored to the secondary storage apparatus; and a data write unit for writing, when the notice is received from the primary storage apparatus, zero data in the secondary slot area.

Abstract: Improvement of read/write access performance with respect to a disk is proposed. A controller manages a first volume format LDEV, in which each distributed user data area and each distributed information area among a plurality of the distributed user data areas for storing a data part and a plurality of the distributed control information area for storing a control information part, are targets that capacity is changed. The controller also manages a second format LDEV, which include a plurality of groups each of which is formed from one distributed user data area and one distributed control information area, and in which each group is a unit that capacity is expanded in a real storage area.

Abstract: A wear leveling method for non-volatile memory is provided, by which the non-volatile memory is substantially divided into a plurality of blocks and the blocks are grouped into a data area and a spare area. The method includes selecting a block based on an erased sequence when getting the block from the spare area. The method also includes performing a wear leveling procedure.

Abstract: A virtual storage layer (VSL) for a non-volatile storage device presents a large, logical address space having a logical capacity that may exceed the storage capacity of the non-volatile storage device. The VSL implements persistent storage operations within the logical address space; storage operations performed within the logical address space may be persisted on the non-volatile storage device. The VSL maintains storage metadata to allocate ranges of the logical address space to storage entities. The VSL provides for allocation of contiguous logical address ranges, which may be implemented by segmenting logical identifiers into a first portion referencing storage entities, and a second portion referencing storage entity offsets. The VSL persists data on the non-volatile storage device in a sequential, log-based format. Accordingly, storage clients, such as file systems, databases, and other applications, may delegate logical allocations, physical storage bindings, and/or crash-recovery to the VSL.

Abstract: A storage controller calculates an access frequency of each logical disk; that is selects a first logical disk device of which the access frequency exceeds a first predetermined value, the first logical disk device being allocated to a first physical disk device; selects a second logical disk device which has the access frequency equal to or less than a second predetermined value, the second logical disk device being allocated to a second physical disk device; and reallocates the first and second logical device; and reallocates the first and second logical devices to the second and the first physical disk device, respectively.

Abstract: To provide a computer system, a management computer and a storage system, and a storage area allocation amount controlling method for improving I/O performance of the host computer. In a computer system comprising a storage system comprising one or more storage devices with storage areas, a host computer which uses a storage area of the storage device, and a management computer for dynamically allocating the storage area in response to an input/output request from the host computer; wherein the management computer monitors dynamic allocation of a real storage area to a storage area in the storage system, and calculates allocation increment amount to the allocated storage area based on the allocation frequency and the total amount of allocation.

Abstract: A method to access a data in a RAID array comprising a plurality of data storage media, wherein information is written to said plurality of data storage media using a RAID configuration, wherein the method receives from a requester a command comprising a data access priority indicator. If a RAID rebuild is in progress, the method determines if the data access priority indicator is set. If the data access priority indicator is set, the method executes a command selected from the group consisting of writing information to the target logical block array range, and returning to the requestor information read from the target logical block array range.

Abstract: Example embodiments of the present invention includes systems and methods for implementing a scalable symmetric multiprocessing (shared memory) computer architecture using a network of homogeneous multi-core servers. The level of processor and memory performance achieved is suitable for running applications that currently require cache coherent shared memory mainframes and supercomputers. The architecture combines new operating system extensions with a high-speed network that supports remote direct memory access to achieve an effective global distributed shared memory. A distributed thread model allows a process running in a head node to fork threads in other (worker) nodes that run in the same global address space. Thread synchronization is supported by a distributed mutex implementation. A transactional memory model allows a multi-threaded program to maintain global memory page consistency across the distributed architecture.

Abstract: An autonomous sub-system receives a database downloaded from a host controller. A controller monitors bus traffic and/or allocated resources in the subsystem and re-allocates resources based on the monitored results to dynamically improve system performance.

Abstract: Reducing remote reads of memory in a hybrid computing environment by maintaining remote memory values locally, the hybrid computing environment including a host computer and a plurality of accelerators, the host computer and the accelerators each having local memory shared remotely with the other, including writing to the shared memory of the host computer packets of data representing changes in accelerator memory values, incrementing, in local memory and in remote shared memory on the host computer, a counter value representing the total number of packets written to the host computer, reading by the host computer from the shared memory in the host computer the written data packets, moving the read data to application memory, and incrementing, in both local memory and in remote shared memory on the accelerator, a counter value representing the total number of packets read by the host computer.

Abstract: A method and system are provided for adjusting a write timing in a memory device. For instance, the method can include receiving a data signal, a write clock signal, and a reference signal. The method can also include detecting a phase shift in the reference signal over time. The phase shift of the reference signal can be used to adjust a phase difference between the data signal and the write clock signal, where the memory device recovers data from the data signal based on an adjusted write timing of the data signal and the write clock signal.

Abstract: Techniques are disclosed for optimizing volume allocation on storage controllers that may have varying degrees of control over directing storage on ranks of pools attached storage components. A performance-based volume allocation algorithm can optimize allocation for such various controllers in a smooth, uniform manner allowing changes from one degree of control to another without incurring costly code changes and re-architecting costs. Where control is not available a surrogate set of possible ranks where the allocation could be made is developed and employed to calculate an adjusted utilization cost. In turn, the adjusted utilization cost is used to calculate a space limit value limited by a target performance threshold.

Abstract: A controller includes a storage for a translation table showing logical and physical addresses in a flash memory in correspondence with one another; another storage storing FAT information indicating the state of data stored in each of pages contained in each of blocks and FAT information identifiers each identifying a block to which pages each storing therein the data in the state indicated by the FAT information belong, while keeping them in correspondence with one another; yet another storage for a block management table showing block identifiers, use-state judging information indicating whether the corresponding block is used/unused, and the FAT information identifiers corresponding to all the blocks indicated as being used by the use-state judging information, while keeping them in correspondence with one another; and a controller controlling unit managing data stored in the flash memory by using the translation table, the FAT information, and the block management table.

Abstract: Object-based conflict detection is described in the context of software transactional memory. In one example, a pointer is received for a block of instructions, the block of instructions having allocated objects. The lower bits of the pointer are masked if the pointer is in a small object space to obtain a block header for the block, and a size of the allocated objects is determined using the block header.