Abstract: Controlling execution of application-specific hardware pipelines includes detecting, using computer hardware, a loop construct contained in a function within a design specified in a high-level programming language, extracting, using the computer hardware, the loop construct from the function into a newly generated function of the design, and generating, using the computer hardware, a state transition graph corresponding to the loop construct. The state transition graph can be pruned by relocating operations from the function entry state and the function exit state into the loop region. A circuit design defining, at least in part, a pipeline hardware architecture implementing the loop construct can be generated using the computer hardware based, at least in part, on the pruned state transition graph.