Threshold Patents (Class 714/47.2)
  • Patent number: 8984375
    Abstract: According to one embodiment, a semiconductor memory stores a program for causing a memory controller to operate in at least one of first and second modes. In the first mode, for each of the blocks, the memory controller autonomously erases and writes data and reads the written data, and determines that the block or the semiconductor storage device is defective when a count of errors in the read data exceeds a correction capability or a threshold. In the second mode, when error correction of read substantial data fails, the memory controller reads the substantial data which failed in the error correction using a read level shifted from the present read level.
    Type: Grant
    Filed: December 13, 2012
    Date of Patent: March 17, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Daisuke Hashimoto
  • Patent number: 8984327
    Abstract: A computer readable storage medium with executable instructions specifies the execution of a state machine operating across a set of computing nodes in a distributed computing system. The executable instructions execute a set of operators, where the execution of each operator is under the control of a state machine that periodically invokes pause control states to pause the execution of an operator in response to a violation of a service level agreement specifying an operating condition threshold within the distributed computing system. Partitions of input data are formed that are worked on independently within the distributed computing system. A set of data batches associated with the input data is processed. Data partition control states to process the partitions associated with the set of data batches are specified. Key control states to process a set of keys associated with a data partition of the partitions are defined.
    Type: Grant
    Filed: December 20, 2012
    Date of Patent: March 17, 2015
    Assignee: Joviandata, Inc.
    Inventors: Parveen Jain, Satya Ramachandran, Sushil Thomas, Anupam Singh
  • Publication number: 20150074469
    Abstract: A method for providing notification of a predictable memory failure includes the steps of: obtaining information regarding at least one condition associated with a memory; calculating a memory failure probability as a function of the obtained information; calculating a failure probability threshold; and generating a signal when the memory failure probability exceeds the failure probability threshold, the signal being indicative of a predicted future memory failure.
    Type: Application
    Filed: September 9, 2013
    Publication date: March 12, 2015
    Applicant: International Business Machines Corporation
    Inventors: Chen-Yong Cher, Carlos H. Andrade Costa, Yoonho Park, Bryan S. Rosenburg, Kyung D. Ryu
  • Publication number: 20150067409
    Abstract: A method for detecting foreign code injected into a computer system including a processor and memory, the processor being configured to execute instructions stored in the memory, includes: detecting, on the computer system, an illegal instruction error; recording the illegal instruction error; determining whether a threshold condition is met; and generating an alert if the threshold condition is met.
    Type: Application
    Filed: September 4, 2013
    Publication date: March 5, 2015
    Applicant: Raytheon BBN Technologies, Corp.
    Inventors: Robert Martz, David Matthews, Joshua Edmison, Greg Vorsanger
  • Patent number: 8972800
    Abstract: Various embodiments of the present invention provide systems and methods for media defect detection.
    Type: Grant
    Filed: July 30, 2012
    Date of Patent: March 3, 2015
    Assignee: LSI Corporation
    Inventors: Fan Zhang, Weijun Tan, Ming Jin, Haitao Xia
  • Patent number: 8972799
    Abstract: The relative health of data storage drives may be determined based, at least in some aspects, on data access information and/or other drive operation information. In some examples, upon receiving the operation information from a computing device, a health level of a drive may be determined. The health level determination may be based at least in part on operating information received from a client entity. Additionally, a storage space allocation instruction or operation may be determined for execution. The allocation instruction or operation determined to be performed may be based at least in part on the determined health level.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: March 3, 2015
    Assignee: Amazon Technologies, Inc.
    Inventors: Marc J. Brooker, Tobias L. Holgers, Danny Wei, Madhuvanesh Parthasarathy, Yu Li
  • Publication number: 20150058679
    Abstract: Methods and systems for automatically identifying an application that is experiencing performance problems caused by a resource utilization event may include receiving an indication that an application is experiencing a performance issue. It may be determined that the performance issue is caused by a resource utilization event on a device. The resource utilization event may include the application and one or more other applications running simultaneously, use of one or more functions of the device simultaneously by at least one of the first application and one or more other applications, and/or a resource utilization overload based on simultaneous use of a plurality of sensors on the device. Next, action may be taken to correct the performance issue of the application.
    Type: Application
    Filed: August 26, 2013
    Publication date: February 26, 2015
    Applicant: Google Inc.
    Inventors: Dean Kenneth Jackson, Daniel Victor Klein
  • Publication number: 20150058680
    Abstract: A network-based testing method and service integrated with a tool that publishes one or more tagged test cases with tags being executable to reproduce a sequence of events for a system under test, SUT, caused by an original test case. The method is performed in a network and is intended for testing software or hardware by first creating an original test case for a system under test, SUT, and performing a sequence of events for the original test case for testing it. The tested case is stored and information of the performed sequence of events is tagged to the tested case. The tagged test case is then sent to a service that publishes tagged test cases. The service publishes the tagged case in a way to be reproduced via the service.
    Type: Application
    Filed: December 4, 2012
    Publication date: February 26, 2015
    Applicant: CODENOMICON OY
    Inventors: Heikki Kortti, Rauli Kaksonen
  • Patent number: 8966132
    Abstract: According to embodiments of the invention, methods, computer readable storage medium, and a computer system for determining a mapping mode for a DMA data transfer are disclosed. The method may include receiving a request for a DMA data transfer within a computer system. The method may also include determining a mapping mode for the DMA data transfer based on available system profile data in response to receiving the request. The method may also include mapping the memory using the determined mapping mode.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: February 24, 2015
    Assignee: International Business Machines Corporation
    Inventors: Brian W. Hart, Liang Jiang, Anil Kalavakolanu
  • Patent number: 8966326
    Abstract: An error detecting circuit of a semiconductor apparatus, comprising: a fail detecting section configured to receive 2-bit first test data signals outputted from a first block and 2-bit second test data signals outputted from a second block, disable a first fail detection signal when the 2-bit first test data signals have different levels, disable a second fail detection signal when the 2-bit second test data signals have different levels, and disable both the first and second fail detection signals when the 2-bit first test data signals have the same level, the 2-bit second test data signals have the same level, and levels of the 2-bit first test data signals and the 2-bit second test data signals are the same with each other.
    Type: Grant
    Filed: February 20, 2013
    Date of Patent: February 24, 2015
    Assignee: SK Hynix Inc.
    Inventors: Kang Youl Lee, Mun Phil Park
  • Patent number: 8966133
    Abstract: According to embodiments of the invention, methods, computer readable storage medium, and a computer system for determining a mapping mode for a DMA data transfer are disclosed. The method may include receiving a request for a DMA data transfer within a computer system. The method may also include determining a mapping mode for the DMA data transfer based on available system profile data in response to receiving the request. The method may also include mapping the memory using the determined mapping mode.
    Type: Grant
    Filed: January 13, 2014
    Date of Patent: February 24, 2015
    Assignee: International Business Machines Corporation
    Inventors: Brian W. Hart, Liang Jiang, Anil Kalavakolanu
  • Patent number: 8959402
    Abstract: Methods for a mobile device restarting subsystem software on a schedule that reduces the likelihood of subsystem failures without requiring a general system restart or impacting other subsystems. The mobile device may calculate a restart time window during which a first subsystem may be restarted efficiently and prior to the occurrence of software failures. Upon initialization of the first subsystem, a restart timer may be established which indicates the period since a previous restart of the first subsystem. Once the restart timer indicates a time within the restart time window, the mobile device may transmit request messages to other subsystems dependent upon the first subsystem. In response to a unanimous vote by the other subsystems or the restart timer exceeding the time restart window, the mobile device may restart the first subsystem. In an aspect, the mobile device may transmit the request messages at an increasing rate.
    Type: Grant
    Filed: October 4, 2012
    Date of Patent: February 17, 2015
    Assignee: QUALCOMM Incorporated
    Inventor: Phani Babu Giddi
  • Publication number: 20150046756
    Abstract: An apparatus comprising a first interface, a second interface and a processor. The first interface may be configured to connect to a host device. The second interface may be configured to connect to a plurality of drives. The processor may be configured to (i) periodically read a drive attribute from each of the drives, (ii) determine a risk factor based on the attribute, (iii) determine if each of the drives is likely to fail based on the risk factor, (iv) determine a cost factor for each of the drives determined to be likely to fail, (v) determine a threshold risk factor based on the cost factor for each of the drives determined to be likely to fail and (vi) if one of the drives is determined to be likely to fail and if the risk factor is more than the threshold risk factor, replace the drive determined to be likely to fail prior to the failure.
    Type: Application
    Filed: August 20, 2013
    Publication date: February 12, 2015
    Applicant: LSI Corporation
    Inventors: Dipu Sreekumaran, Abin Sreedharan Leela, Safeer Asanarukunju
  • Patent number: 8954582
    Abstract: In one embodiment, a management device receives one or more fate-sharing reports locally generated by one or more corresponding reporting nodes in a shared-media communication network, the fate-sharing reports indicating a degree of localized fate-sharing between one or more pairs of nodes local to the corresponding reporting nodes. The management device may then determine, globally from aggregating the fate-sharing reports, one or more fate-sharing groups indicating sets of nodes having a global degree of fate-sharing within the communication network. As such, the management device may then advertise the fate-sharing groups within the communication network, wherein nodes of the communication network are configured to select a plurality of next-hops that minimizes fate-sharing between the plurality of next-hops.
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: February 10, 2015
    Assignee: Cisco Technology, Inc.
    Inventors: Jean-Philippe Vasseur, Jonathan W. Hui
  • Patent number: 8954811
    Abstract: Methods, apparatuses, and computer program products for administering incident pools for incident analysis in a distributed processing system are provided. Embodiments include an incident analyzer receiving a plurality of incidents from an incident queue. The incident analyzer also assigns each received incident to an incident pool having a predetermined initial period of time. The predetermined initial period of time is the time within which the incident pool is open to the assignment of incidents. The incident analyzer calculates an arrival rate that incidents are assigned to the incident pool. The incident analyzer also extends based on the arrival rate, for each incident assigned to the incident pool, the predetermined initial period of time by a particular period of time.
    Type: Grant
    Filed: August 6, 2012
    Date of Patent: February 10, 2015
    Assignee: International Business Machines Corporation
    Inventors: James E. Carey, Philip J. Sanders
  • Patent number: 8949659
    Abstract: Scheduling workloads based on detected hardware errors is provided. In response to determining that a hardware error is detected, it is determined whether the hardware error is a cache error. In response to determining that the hardware error is a cache error, it is determined whether execution of a workload on a processor is changing contents of a cache associated with the cache error more than a threshold value. In response to determining that the execution of the workload on the processor is changing the contents of the cache associated with the cache error more than the threshold value, it is determined whether the cache associated with the cache error is private to a core in the processor. In response to determining that the cache associated with the cache error is private to a core, the execution of the workload is scheduled on a different core of the processor.
    Type: Grant
    Filed: October 18, 2012
    Date of Patent: February 3, 2015
    Assignee: International Business Machines Corporation
    Inventor: Venkatesh Sainath
  • Patent number: 8948938
    Abstract: An alerts and procedures management system for an aircraft comprises a software kernel aboard the aircraft and a parameterization tool for the software kernel, which comprises a conversion module for converting a configuration file describing an operational need of the system into a database of binary parameters which is able to parameterize the software kernel. The software kernel comprises at least four elementary cells: a first cell for acquiring aircraft signals, a second cell for characterizing state variables of the aircraft, a third cell for computing at least one separate event, a fourth cell for scheduling the separate events for communication with the crew; each of the cells comprising a software engine parameterizable by the database.
    Type: Grant
    Filed: April 24, 2013
    Date of Patent: February 3, 2015
    Assignee: Thales
    Inventors: Xavier Chazottes, Stéphane Bertheau, Michel Mazenoux
  • Patent number: 8949668
    Abstract: Methods and apparatus for use in identifying abnormal behavior in a control system. Operating events associated with a control system are received, and an actual behavior of the control system is determined based on the received operating events. The actual behavior is compared to expected behavior to determine whether the actual behavior differs from the expected behavior. The expected behavior includes a correlation between a plurality of operating events associated with the control system. The expected behavior is updated based on an indication of whether the actual behavior is abnormal from a user.
    Type: Grant
    Filed: May 23, 2011
    Date of Patent: February 3, 2015
    Assignee: The Boeing Company
    Inventors: Carl J. Hanks, Steven A. Dorris, Arun Ayyagari
  • Patent number: 8938659
    Abstract: Described embodiments provide a media controller that performs error correction on data read from a solid-state media. The media controller receives a read operation from a host device to read one or more given read units of the solid-state media. The media controller reads the data for the corresponding read units from the solid-state media employing initial values for one or more read threshold voltages. Only if a disparity between an actual number of bits at a given logic level included in the read data and an expected number of bits at the given logic level included in the read data has not reached a predetermined threshold, the media controller decodes the read data and provides the decoded data to the host device.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: January 20, 2015
    Inventors: YingQuan Wu, Earl T. Cohen
  • Patent number: 8935578
    Abstract: An apparatus and method are disclosed to optimize the latency and the power of a link operating inside a processor-based system. The apparatus and method include a latency meter built into a queue that does not rely on a queue-depth threshold. The apparatus and method also include feedback logic that optimizes power reduction around an increasing latency target to react to sluggish re-provisioning behavior imposed by the physical properties of the link.
    Type: Grant
    Filed: September 29, 2012
    Date of Patent: January 13, 2015
    Assignee: Intel Corporation
    Inventors: James W. Alexander, Buck W. Gremel, Pinkesh J. Shah, Malay Trivedi, Mohan K. Nair
  • Patent number: 8930775
    Abstract: A system and a computer program product for executing a method to prevent failure on a server computer due to internally and/or externally induced shock and/or vibration. The method includes acquiring, by at least one sensor, analog acceleration data of components in a server computer. The data is then converted to digital format and stored within a motor drive assembly processor memory unit. The processor analyzes the stored data for existence of machine degradation. In response to detecting the existence of machine degradation, the motor drive assembly processor initiates remediation procedures. The remediation procedures include controlling rotating speed of moving devices or performing a complete system shut down.
    Type: Grant
    Filed: November 28, 2011
    Date of Patent: January 6, 2015
    Assignee: International Business Machines Corporation
    Inventors: Budy D. Notohardjono, Arkadiy O. Tsfasman
  • Patent number: 8930776
    Abstract: A method, system and computer program product are provided for implementing command timing adjustments to alleviate Dynamic Random Access Memory (DRAM) failures in a computer system. A predefined DRAM failure is detected. Responsive to the detected failure, a set of timers is adjusted for controlling predetermined timings used to access the DRAM. Responsive to the failure being resolved by the adjusted set of timers, checking for a predetermined level of performance is performed.
    Type: Grant
    Filed: August 29, 2012
    Date of Patent: January 6, 2015
    Assignee: International Business Machines Corporation
    Inventors: Edgar R. Cordero, Joab D. Henderson, Divya Kumar, Jeffrey A. Sabrowski, Anuwat Saetow
  • Publication number: 20150006972
    Abstract: A method detects anomalies in time series data by comparing universal features extracted from testing time series data with the universal features acquired from training time series data to determine a score. The universal features characterize trajectory components of the time series data and stochastic components of the time series data. Then, an anomaly is detected if the anomaly score is above a threshold.
    Type: Application
    Filed: July 1, 2013
    Publication date: January 1, 2015
    Inventor: Michael J Jones
  • Patent number: 8924797
    Abstract: At least one value of abnormal metrics is identified as being an abnormal dimension value. A dominant dimension related to the anomaly is identified based on the identified abnormal dimension value.
    Type: Grant
    Filed: April 16, 2012
    Date of Patent: December 30, 2014
    Assignee: Hewlett-Packard Developmet Company, L.P.
    Inventors: Ruth Bernstein, Ira Cohen
  • Patent number: 8904240
    Abstract: Resolving virtual machine (VM) issues, by executing VM and operating system (OS) diagnostic monitors, including, monitoring a set of VM and OS health status metrics of a system at a first level, analyzing data of the monitored health status metrics to determine that an instability has occurred when the data exceeds defined bounds for the health status metrics, responding to the instability by monitoring additional VM and OS health status metrics, whereby a level of monitoring of the system is increased from the first level to a second level, greater than the first level, identifying the instability, repairing the system by taking corrective action based on the identified instability; and removing at least one of the set of monitoring and profiling tools to reduce the level of monitoring to a third level once the instability has been resolved, wherein the third level is less than the second level.
    Type: Grant
    Filed: April 20, 2012
    Date of Patent: December 2, 2014
    Assignee: International Business Machines Corporation
    Inventors: Lisa M. W. Bradley, Kevin Grigorenko, Rohit D. Kelapure, Dana L. Price
  • Patent number: 8904241
    Abstract: Processes, computer-readable media, and machines are disclosed for reducing a likelihood that active functional components fail in a computing system. An active monitoring component receives metrics associated with different active functional components of a computing system. The different active functional components contribute to different functionalities of the system. Based at least in part on the metrics associated with a particular active functional component, the active monitoring component determines that the particular active functional component has reached a likelihood of failure but has not failed. In response to determining that the particular active functional component has reached the likelihood of failure but has not failed, the active monitoring component causes a set of actions that are predicted to reduce the likelihood of failure.
    Type: Grant
    Filed: July 27, 2011
    Date of Patent: December 2, 2014
    Assignee: Oracle International Corporation
    Inventors: Deepti Srivastava, Andrew Ingham, Cheng-Lu Hsu, Wilson Wai Shun Chan
  • Publication number: 20140351659
    Abstract: In response to a write operation for a set of encoded data slices, a method begins by a dispersed storage (DS) processing module determining whether to use a performance threshold number of encoded data slices of the set of encoded data slices. When the performance threshold number of encoded data slices is to be used, the method continues with the DS processing module determining the performance threshold number of encoded data slices and sending a performance threshold number of initial phase write requests to storage units. When a write threshold number of write responses are received, the method continues with the DS processing module sending a number of next phase write requests to the storage units, where the number of next phase write requests is equal to or greater than the write threshold number and is less than or equal to the performance threshold number.
    Type: Application
    Filed: April 18, 2014
    Publication date: November 27, 2014
    Applicant: CLEVERSAFE, INC.
    Inventors: Greg Dhuse, Jason K. Resch, Thomas Franklin Shirley, JR.
  • Publication number: 20140351658
    Abstract: A redundant computing architecture includes a first control unit, a second control unit, and a switch. The first control unit is configured to provide a first control signal in response to a sensory input and is further configured to provide a health status indicator that is indicative of a fault condition within the first control unit. Additionally, the second control unit is configured to provide a second control signal in response to the sensory input. Each of the first and second control signals is respectively operative to control an actuator. The switch is configured to: receive the health status indicator, the first control signal, and second control signal; provide the first control signal to the actuator if this health status indicator does not indicate a fault: and provide the second control signal to the actuator if this health status indicator does indicate a fault.
    Type: Application
    Filed: May 22, 2013
    Publication date: November 27, 2014
    Applicant: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventor: Joseph G. D'Ambrosio
  • Patent number: 8898373
    Abstract: Embodiments of the invention are directed to systems and methods for improving wear leveling performance in solid-state memory. The embodiments described herein make more consistent the number of wear leveling operations that needs to be performed, so that sudden spikes in the number wear leveling operations may be reduced in solid-state memory. In one embodiment, a staggered threshold-based wear leveling approach is used to spread out the execution of wear leveling operations that otherwise would have been triggered in clusters. Under the staggered threshold-based approach, wear leveling is periodically triggered by different wear leveling thresholds that are associated with various units of solid-state memory such as a group of blocks, so that only a certain amount of units are wear leveled at any given time.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: November 25, 2014
    Assignee: Western Digital Technologies, Inc.
    Inventors: Ho-Fan Kang, Cliff Pajaro
  • Patent number: 8892961
    Abstract: A method that includes monitoring, by a computing device including a processor, transaction activity level of a plurality of pre-defined IT transactions, and determining, by the computing device, that an IT outage has occurred when the activity level is below a threshold.
    Type: Grant
    Filed: November 26, 2013
    Date of Patent: November 18, 2014
    Assignee: The Boeing Company
    Inventor: Guy Baron Olney
  • Patent number: 8887006
    Abstract: Embodiments are directed to predicting the health of a computer node using health report data and to proactively handling failures in database services. In an embodiment, a computer system monitors various health indicators for multiple nodes in a database cluster. The computer system accesses stored health indicators that provide a health history for the database cluster nodes. The computer system then generates a health status based on the monitored health factors and the health history. The generated health status indicates the likelihood that the node will be healthy within a specified future time period. The computer system then leverages the generated health status to handle current or predicted failures. The computer system also presents the generated health status to a user or other entity.
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: November 11, 2014
    Assignee: Microsoft Corporation
    Inventors: Hao Xia, Todd F. Pfleiger, Mark C. Benvenuto, Ajay Kalhan
  • Patent number: 8887007
    Abstract: A media processing system enables producing a copy of media based on the state of media deterioration. An error rate measurement unit measures the error rate of recorded media after specific data is written to the media; an error rate evaluation unit determines if the media error rate measured by the error rate measurement unit is less than or equal to a preset threshold value; and a data recording unit that, when the error rate evaluation unit determines the error rate exceeds the specific threshold value, writes specific data recorded to the recorded media to other unused media.
    Type: Grant
    Filed: March 23, 2012
    Date of Patent: November 11, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Hidetoshi Maeshima
  • Patent number: 8880922
    Abstract: The power consumption of a computer is dynamically managed independent of the OS or applications and without any delay time caused by system control. A blade server has server blades each including a processor, a power-saving control unit and a power sensor unit; a power supply box that supplies power to the server blades; and a single service processor which defines an electric current consumption upper limit value in the power sensor unit via the power-saving control unit of each server blade. When the electric current consumption of the server blades exceeds the electric current consumption upper limit value, a signal outputted by the power sensor unit is communicated to the processor, the operating frequency of the processor is controlled, and the maximum average power is controlled to be at or below the power consumption upper limit value.
    Type: Grant
    Filed: March 5, 2009
    Date of Patent: November 4, 2014
    Assignee: Hitachi, Ltd.
    Inventors: Yuuitirou Siba, Hidenori Ito
  • Publication number: 20140325288
    Abstract: An adaptive network has respective network nodes and network connections between the network nodes, the network nodes each having a transceiver which is coupled with a respective network connection. The respective transceiver is designed for providing a mean error value (MSE_i) which is representative of deviations of a received signal from predefined reference signal values. In a reference operating state of the adaptive network, a respective reference error value (MSE_REF) is determined as a function of the mean error value (MSE_i) provided by the respective transceiver. In at least one predefined operating state of the adaptive network, a respective actual error value (MSE_AV) is determined as a function of the mean error value (MSE_i) provided by the respective transceiver.
    Type: Application
    Filed: June 20, 2014
    Publication date: October 30, 2014
    Inventors: Thomas KOENIGSEDER, Albrecht NEFF
  • Patent number: 8862947
    Abstract: The subject matter of this specification can be implemented in, among other things, a computer-implemented method for application lifecycle management including providing a first application version to initial computing devices. The method includes receiving first crash reports from the first application version. The method includes determining that the first crash reports include more than a first threshold of reports. The method includes preventing provision of the first application version to additional computing devices in response to determining that the first crash reports include more than the first threshold of reports. The method includes receiving second crash reports from the first application version. The method includes determining that the second crash reports include less than a second threshold of reports.
    Type: Grant
    Filed: January 27, 2012
    Date of Patent: October 14, 2014
    Assignee: Google Inc.
    Inventors: Jessica Lynn Gray, Michael Noth, James Kason Keiger, Siyang Xie
  • Patent number: 8856598
    Abstract: A system and machine-implemented method relating to identifying anomalous events by estimating a processing time for an operation, estimating a processing time for an operation; calculating a maximum threshold time based on the estimated processing time for indicating anomalous processing of the operation, periodically determining during processing of the operation an amount of processing time used to perform the operation; and sending a notification to a user indicating an anomalous run of the operation has occurred if the determined amount of processing time exceeds the maximum threshold time.
    Type: Grant
    Filed: August 5, 2011
    Date of Patent: October 7, 2014
    Assignee: Google Inc.
    Inventors: Sachan Madahar, Ilie O. Grigore, Kim Nga Thi Moore, Igor Belilovets
  • Publication number: 20140298110
    Abstract: In an embodiment, a method of determining whether to trigger an event based on data blocks having status data includes electronically receiving the data blocks over a channel, performing a data integrity check on the data blocks to determine whether a particular data block has a transmission fault, calculating a received error metric based on performing the data integrity check, and disabling an event trigger if the received error metric crosses a first error threshold.
    Type: Application
    Filed: June 17, 2014
    Publication date: October 2, 2014
    Inventors: Dirk Hammerschmidt, Timo Dittfeld
  • Publication number: 20140298111
    Abstract: A controller for operably coupling a drive unit to a host unit in a serial advanced technology attachment (SATA) system is described. The controller comprises a hardware processor arranged to: receive a plurality of SATA data frames; identify a first primitive sequence in at least one of the plurality of SATA data frames that adversely affects a performance of the SATA system; and replace the identified first primitive sequence with a second primitive sequence in response thereto.
    Type: Application
    Filed: November 25, 2011
    Publication date: October 2, 2014
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Eran Glickman, Ron Bar, Idan Ben Ami, BENNY Michalovich
  • Patent number: 8849438
    Abstract: A factory control server stores module configuration data for modules. The modules include processes for producing a final product and have corresponding module requirements. The factory control server analyzes in real-time actual product output data that is generated by a final product tester after a factory produces at least one final product to determine whether the actual product output data meets an expected product output. The factory control server analyzes actual module data in real-time to determine a new module requirement to cause new actual product output data for a subsequent final product to meet the expected product output in response to a determination that the actual product output data does not meet the expected product output. The factory control server notifies a module controller in real-time of the new module requirement. The module controller changes parameters in real-time to manufacture the subsequent final product.
    Type: Grant
    Filed: November 17, 2011
    Date of Patent: September 30, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Suketu Arun Parikh, Alexander T. Schwarm, Sanjiv Mittal, Charles Gay
  • Patent number: 8850262
    Abstract: An approach to detecting processor failure in a multi-processor environment is disclosed. The approach may include having each CPU in the system responsible for monitoring another CPU in the system. A CPUn reads a timestampn+1 created by CPUn+1 which CPUn is monitoring from a shared memory location. The CPUn reads its own timestampn and compares the two timestamps to calculate a delta value. If the delta value is above a threshold, the CPUn determines that CPUn+1 has failed and initiates error handling for the CPUs in the system. One CPU may be designated a master CPU, and be responsible for beginning the error handling process. In such embodiments, the CPUn may initiate error handling by notifying the master CPU that CPUn+1 has failed. If CPUn+1 is the master CPU, the CPUn may take additional steps to initiate error handling, and may broadcast a non-critical interrupt to all CPUs, triggering error handling.
    Type: Grant
    Filed: October 12, 2010
    Date of Patent: September 30, 2014
    Assignee: International Business Machines Corporation
    Inventors: Charles S. Cardinell, Roger G. Hathorn, Bernhard Laubli, Timothy J. Van Patten
  • Publication number: 20140289571
    Abstract: A clock output unit outputs a synchronous clock signal. A serial data receiving unit receives data representing an absolute position and an encoder sends data in synchronization with the synchronous clock signal. A position conversion unit converts the received absolute position into a current position. The position conversion unit calculates a difference between a last received absolute position and an absolute position received immediately before the last received absolute position. The position conversion unit obtains the latest current position by adding the difference and a current position that was calculated immediately before the latest current position. If the absolute value of the calculated difference is greater than a threshold value, the position conversion unit determines that the last received absolute position has an error.
    Type: Application
    Filed: March 4, 2014
    Publication date: September 25, 2014
    Applicant: OMRON Corporation
    Inventors: Yoshimi Niwa, Katsuyuki Kawamata
  • Patent number: 8843893
    Abstract: A modular framework may be provided for configuration checks that enable a developer to classify and describe each check and then subsequently search for checks and integrate them with other checks. Each check may include a dependency on other checks to create a hierarchy. Additionally, multiple checks may be combined. The combination of checks may be used to check configuration of specific processes or systems. Each check unit and business configuration check may contain keywords, descriptions, and documentation to enable the checks to be subsequently searched and reused in different applications. Systems, methods, and articles of manufacture may be provided.
    Type: Grant
    Filed: April 29, 2010
    Date of Patent: September 23, 2014
    Assignee: SAP AG
    Inventors: Jan Krieg, Viktor Folmer, Michelle Braun
  • Publication number: 20140281740
    Abstract: A method of determining vulnerability of a cache memory includes associating a first counter with a cache element and periodically incrementing the first counter. When a read or other access that consumes the data in the cache element occurs, a current value of the first counter is accumulated. When a write or other cache access that modifies data in the cache element occurs, the first counter is reset. At the end of an evaluation period, the value in a total counter approximates the number of clock cycles during which data that was consumed was vulnerable. Dividing this value by the number of clock cycles approximates the vulnerability of this cache element. The vulnerability for a subset of all cache elements may be measured and extrapolated to obtain an estimate for the vulnerability of the cache memory as a whole.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Applicant: Intel Corporation
    Inventors: Javier Carretero Casado, Xavier Vera, Tanausu Ramirez, Daniel Sanchez, Enric Herrero Abellanas, Nicholas Axelos
  • Publication number: 20140281739
    Abstract: Techniques are described for identifying a root cause of a pattern of performance data in a system including a plurality of services. Embodiments provide dependency information for each of the plurality of services, where at least one of the plurality of services is dependent upon a first one of the plurality of services. Each of the plurality of services is monitored to collect performance data for the respective service. Embodiments further analyze the performance data to identify a cluster of services that each follow a pattern of performance data. The first one of the services in the cluster of services is determined to be a root cause of the pattern of performance data, based on the determined dependency information for each of the plurality of services.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: NETFLIX, INC.
    Inventors: Philip Simon Tuffs, Roy Rapoport, Ariel Tseitlin
  • Patent number: 8839047
    Abstract: A client device in a distributed system includes a timer for timing a request time duration substantially including a period of time that the client device is waiting for results to be received via a network from a server in response to a request sent by the client device. A processor of the client device compares the request time duration with a dynamically generated request time threshold, and automatically controls a network interface to issue one or more alert messages to a network operation center (NOC) via the network when the request time duration is greater than the request time threshold. The request time threshold is dynamically calculated according to historic request time durations timed by the timer for a plurality of previous requests sent by the client device.
    Type: Grant
    Filed: August 26, 2013
    Date of Patent: September 16, 2014
    Assignee: Guest Tek Interactive Entertainment Ltd.
    Inventor: John Gyorffy
  • Patent number: 8839046
    Abstract: Re-arranging data handling in a computer-implemented system that comprises a plurality of existing physical entities. At least one reliability rating is assigned to each of various existing physical entities of the computer-implemented system; and in response to change. Reverse predictive failure analysis uses the assigned reliability ratings to determine cumulative reliability rating(s) for at least one arrangement of the system. Data handling is re-arranged with respect to at least a portion of the existing computer-implemented system to provide a designated cumulative reliability rating.
    Type: Grant
    Filed: July 10, 2012
    Date of Patent: September 16, 2014
    Assignee: International Business Machines Corporation
    Inventors: James Gordon McLean, Clifford Alan Pickover, Daniel James Winarski
  • Patent number: 8839073
    Abstract: An SSD controller maintains a zero count and a one count, and/or in some embodiments a zero/one disparity count, for each read unit read from an SLC NVM (or the lower pages of an MLC). In an event that the read unit is uncorrectable in part due to a shift in the threshold voltage distributions away from their nominal distributions, the maintained counts enable a determination of a direction and/or a magnitude to adjust a read threshold to track the threshold voltage shift and restore the read data zero/one balance. In various embodiments, the adjusted read threshold is determined in a variety of described ways (counts, percentages) that are based on a number of described factors (determined threshold voltage distributions, known stored values, past NVM operating events). Extensions of the forgoing techniques are described for MLC memories.
    Type: Grant
    Filed: May 4, 2012
    Date of Patent: September 16, 2014
    Assignee: LSI Corporation
    Inventor: Earl T Cohen
  • Publication number: 20140258787
    Abstract: A scalable method of determining in a firmware environment if the rate of occurrence of a detectable specified type of system event that occurs to a system component or discrete functional unit, has met a criteria with respect to a pre-selected threshold. When the meeting of the threshold criteria is detected, a previously defined action associated with the threshold criteria for the particular event can be invoked by the firmware. Embodiments may establish a sliding time-window that includes a currently detected type of system event and extends back a set duration in the past. Any occurrences of the specified event taking place earlier than the established time-window may be discarded while occurrences of the events during the specified time-window are added together with the newly detected event and compared to a threshold value to see if the threshold criteria has been met.
    Type: Application
    Filed: March 8, 2013
    Publication date: September 11, 2014
    Applicant: INSYDE SOFTWARE CORP.
    Inventor: David EDRICH
  • Patent number: 8832505
    Abstract: Methods and apparatus to provide failure detection are disclosed herein. An example method includes executing, via a plurality of computing nodes, first fenced computing operations; storing a count of issued data operations resulting from the first fenced computing operations; and determining whether a failure condition exists in the plurality of computing nodes by comparing the count of issued data operations to the count of performed data operations resulting from the first fenced computing operations.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: September 9, 2014
    Assignee: Intel Corporation
    Inventors: Joshua Bruce Fryman, Allan D. Knies
  • Patent number: 8825941
    Abstract: Flash memory drives and related methods are disclosed that operate to keep frequently written data, which results in frequently erased blocks, in SLC flash, and relatively static data in MLC flash. A flash drive according to the present disclosure keeps track of the number of times that data for each logical block address (LBA) has been written to the flash memory, and determines whether to store newly received data associated with a particular LBA in SLC flash or in MLC flash depending on the number of writes that have occurred for that particular LBA. For each logical block sent to the flash drive, a comparison is made of the write count of the associated LBA to a threshold. If the write count is above the threshold, the logical block is written to SLC flash. If the write count is below the threshold, the logical block is written to MLC flash.
    Type: Grant
    Filed: June 25, 2009
    Date of Patent: September 2, 2014
    Assignee: STEC, Inc.
    Inventors: Mark Moshayedi, Seyed Jalal Sadr