Abstract: A computer receives one or more processing requests from at least one or more clients through a network and executes an application for processing the received processing requests using a Java servlet. The processing requests each contain one or more addresses as the destinations of the processing requests. The computer is connected to a database including the following information: application information in which an identifier that uniquely identifies each application and binary logic for executing the application are brought into correspondence with each other; and adapter information in which the identifier and each of the addresses are brought into correspondence with each other. When the computer receives the processing request, it identifies the binary logic based on an address contained in the received processing request and executes the identified binary logic and thereby executes the application.

Abstract: A register access control circuit and method includes extracting data written to a plurality of registers by specifying the common address in response to read access to a common address, comparing the data extracted from the respective registers, and outputting the data extracted from one of the registers as read data when the data extracted from the respective registers match.

Abstract: The present invention relates to a coprocessor comprising a calculation unit for executing a command, and a securization device for monitoring the execution of the command and supplying an error signal having an active value as soon as the execution of the command begins and an inactive value at the end of the execution of the command, if no abnormal progress in the execution of the command has been detected. The coprocessor further comprises means for preventing access to at least one unit of the coprocessor, while the error signal is on the active value. Application is provided particularly but not exclusively to the protection of integrated circuits for smart cards against attacks by fault injection.

Abstract: A disclosed example method involves at a network management module, receiving a request for logical circuit data associated with a network circuit. In addition, the example method involves requesting the logical circuit data from a legacy logical element in communication with a network device of the network circuit. The logical circuit data is received from the legacy logical element. The logical circuit data is indicative of whether the network circuit has failed.

Abstract: A thread has a corruption detection mechanism that compares a beginning state of a function with an ending state to determine any inconsistencies. Based on the type of inconsistency, a remedial action may be taken, such as ignoring the inconsistency, cleaning up the inconsistency, and terminating the thread with an exception. The analysis may also include analyzing various states after function execution to find problems such as incomplete transactions. Such a thread may be useful in an operating system as well as a multi-threaded application environment.

Abstract: A write filter cache system for protecting a microprocessor core from soft errors and method thereof are provided. In one aspect, data coming from a processor core to be written in primary cache memory, for instance, L1 cache memory system, is buffered in a write filter cache placed between the primary cache memory and the processor core. The data from the write filter is move to the main cache memory only if it is verified that main thread's data is soft error free, for instance, by comparing the main thread's data with that of its redundant thread. The main cache memory only keeps clean data associated with accepted checkpoints.

Abstract: Packet sequence number checking through a VPN tunnel may be performed by assigning sequence numbers on a per-priority class basis to packets traversing the VPN tunnel. In one implementation, a network device may receive a packet that is to be transmitted over a VPN tunnel, the packet including control information that includes at least a QoS priority class of the packet. The network device may extract the priority class of the packet from the control information and generate a sequence value that describes an arrival sequence of the packet relative to other received packets of the same priority class as the packet. The network device may additionally generate an IPsec header for the packet, the IPsec header including the sequence value and the priority class of the packet; attach the IPsec header to the packet; and transmit the packet through the VPN tunnel.

Abstract: Method and system is provided where PHY state change (PHY CHANGE) notifications from one or more PHYs in a storage infrastructure are monitored as a potential error condition. The rate of PHY CHANGE notifications is monitored to determine if the rate of PHY CHANGE notifications may cause a loss of service or degrade I/O performance. An excessive rate of PHY CHANGE notification that may cause a loss of service is detected by comparing a current PHY CHANGE count with burst threshold value. The current PHY CHANGE count is also compared to an operational threshold value to detect if the rate of PHY CHANGE notification may result in degradation of overall I/O performance. If the PHY CHANGE count for a PHY equals or exceeds the burst threshold value or the operational threshold value, then the PHY is disabled.

Abstract: Techniques for running an Extract Transform Load (ETL) job in parallel on one or more processors wherein the ETL job comprises use of an extensible markup language (XML) document are provided. The techniques include receiving an XML document input, identifying a node in the XML document at which partitioning of the XML document is to begin, sending partition information to each respective processor, performing a shallow parsing of the XML document in parallel on the one or more processors, wherein each processor performs shallow parsing using the identified partition node until it reaches its identified partition, using the shallow parsing to generate the partition of the input XML document, wherein each processor generates a different partition of the same XML document, and sending each partition in streaming format to an ETL job instance.

Abstract: Apparatus methods for capturing flow control errors in FIFO exchanges between producing and consuming circuits operating in different clock domains. Tag information at the start of an exchange is transferred to a synchronizing component before data of a transfer transaction is entered in the FIFO. The tag information is also associated with each unit of data transferred to the FIFO by the producing circuit. The synchronizing component verifies the each unit of data retrieved by the consuming circuit has the expected tag information associated therewith and signals an error is the tag information does not match. Thus an error by the producing circuit in entering too much or too little data for a transfer is detected before erroneous data is retrieved and processed by the consuming circuit.

Abstract: A method and apparatus for identifying a device associated with a transmission error. The method generally comprising including a device identification information upon detection of a transmission error and further modifying an error check parameter according to a predefined rule.

Abstract: Methods and system for exception detecting and alerting are described. An exception indicating an occurrence of an error in an application and a path to the exception in an application space may be received. The received exception may be compared to a stored exception in a prior version of an exception data structure to determine whether the received exception is a new exception. The exception data structure may include a plurality of stored exceptions. The results of the comparison may be provided.

Abstract: A solution is proposed for managing a software application. A corresponding method starts with the step of detecting an error condition of the software application. An error message corresponding to the error condition is logged; the error message includes at least one available field for an information item of a corresponding category. For each available field, the information item of the corresponding category associated with the error message is collected; the information item is collected from one or more information sources, which are external to the software application. The error message is now completed by inserting each retrieved information item into the corresponding available field. At the end, the completed error message (or a part thereof) is output.

Abstract: A method and system for detecting errors in stored pattern definitions. The method describes structuring a pattern definition into a specified format and creating a pattern definition file. The structured pattern definition contents are hashed to generate a filename for the pattern definition file. This filename, along with a corresponding identifier, is added to an identifier document. Each filename in the identifier document is compared with all other filenames to determine a degree of overlap. A potential error is indicated if a filename substantially matches any of the other filenames in the identifier document.

Abstract: In a data relay device, it is judged whether a destination address of data received from an adapter matches with an address specified for an interruption process. Only data that is judged appropriate is sent to a controller.

Abstract: An apparatus, system, and method are disclosed for data priority determination. A receiving module receives a data package. A parsing module parses out priority indicators from the data package. A comparison module compares the priority indicators to entries in a priority matrix, determining whether the data package is of a defined data package type. In response to a determination that the data package is of the defined data package type, a priority determination module determines a data package priority of the data package based on a data package priority of the defined data package type. In response to a determination that the data package is not of the defined data package type, a type definition module defines a new data package type having a data package priority based on the priority indicators. A priority update module updates the data package priority of the defined data package type.

Abstract: A method for testing hard disks under an extensible firmware interface (EFI) provides a device tree of hard disks. Nodes of the device tree represent block devices or file systems of the hard disks. Devices paths and handles corresponding to each of the device paths are obtained from the device tree. Parent controller handles of each of the device paths are obtained. If there are parent controller handles the same as the obtained handles, the parent controller handles the same as the obtained handles are deleted. The computer determines that a number of the hard disks is equal to a number of the device paths corresponding to the remained parent controller handles. Nodes information of each of the device paths corresponding to the remained parent controller handles are determined as hard disk information of each of the hard disks.

Abstract: A user interface component receives an input error message. A query enhancer component derives error messages from the input error messages using error pattern(s) representative of the input error message and error sub-pattern(s) of the error pattern(s). A result aggregator component inputs each error message to search engines, receives search results, aggregates the search results, and provides the search results to the user interface. The enhancer component may include a pattern composer component to locate error patterns representative of the input error message, and a sub-pattern generator component to derive error sub-patterns from the error patterns. The aggregator component may determine whether the search results are in agreement with a predetermined criterion. If not, the aggregator component may request the enhancer component to provide additional error messages to input to the search engines.

Abstract: Enterprises are fast moving towards restructuring their IT infrastructure by exploiting the emerging models of data centers. In one extreme, the whole of application, storage, and network needs of an enterprise are to be managed by third party data centers. While the use of third party data centers is an attractive proposition for enterprises, it can potentially put their intellectual property in the form of applications and data assets under threat. There is a need for a system that is a part of a data center but owned by an enterprise that provides a single point of entry and exit for interacting and communicating with the data center and the enterprise relies on this system to obtain an insight into the functioning and behavior of the data center.

Abstract: An apparatus utilizes distributed coordinating members to distribute member-specific state data to subscribing members in a distributed computing system. Member-specific state data is associated with different subjects, and coordinating members are configured to manage state data associated with particular subjects such that a reporting member that needs to report member-specific state data associated with a particular subject forwards that state data to a coordinating member associated with that subject. Once received, the coordinating member then distributes the member-specific state data to any members that have subscribed to receive state data associated with that subject.

Abstract: Methods and apparatuses for generating a random sequence of commands for a semiconductor device. The method generates random state transitions within a finite state machine model of the semiconductor device. A sequence of commands is determined which are associated to the generated random state transitions based on the finite state machine model of the semiconductor device.

Abstract: A method, system and computer program product for logging and identifying microcode errors in a computing environment is provided. Each of a plurality of errors in the microcode is logged using a plurality of error logging commands. Each of the plurality of errors is indexed to generate a plurality of indexed errors. A plurality of unique keys is associated to each of the plurality of indexed errors. A master index of the plurality of unique keys is created.

Abstract: A system that incorporates teachings of the present disclosure may include, for example, an edge device having a controller to receive a Session Initiation Protocol (SIP) message from a user endpoint device (UE) requesting communication services, forward the SIP message to a network element of a Server Office, receive from the network element a first error message indicating communication services at the Server Office are unavailable, replace the first error message with a second error message, the second error message indicating a temporary unavailability of communication services, and transmit the second error message to the UE. Additional embodiments are disclosed.

Abstract: A control apparatus controls a device to which the control apparatus is connected. The control apparatus includes a storing unit and a linking unit. The storing unit stores an error message that contains information on a failed component in a storage device upon receiving the error message from the device. The linking unit stores the error message and information on a replacement component, which has been installed in the device in place of the failed component, in the storage device in association with each other upon receiving the information on the replacement component.

Abstract: A smart card comprises a storage unit in which various data are stored, a communication unit to perform data communication with an external apparatus, and a processing unit which executes processing corresponding to a command received via the communication unit. The processing unit of the smart card detects data judged to have data abnormality from the data stored in the storage unit in a case where the command received from the external apparatus is an abnormal data confirmation command, and notifies the external apparatus of response data including information indicating the data in which the data abnormality has been detected by the detection.

Abstract: The present invention is directed towards systems and methods for determining failure in and controlling access to a shared resource in a multi-core system. In some embodiments of a multi-core system, individual cores may share the same resource. Additionally, the resource may occasionally fail or need to be reset, and the period during which the resource is being reset may be non-instantaneous. In an embodiment without coordination between the cores, one core experiencing a failure may reset the resource. During the period in which the resource is resetting, another core may interpret the reset as a failure and reset the resource. As more cores interpret the resets as failures, they will trigger resets, quickly resulting in the resource being constantly reset and unavailable. Thus, in some embodiments, a coordination system may be utilized to determine failure of a shared resource and control resets and access to the shared resource.

Abstract: A method for validating SRS registry transaction data includes receiving OLTP transaction data from a first database, parsing the OLTP transaction data, and comparing the parsed OLTP transaction data to one or more of a set of profiles. Each of the one or more of the set of profiles includes metadata in XML files. The method also includes caching the parsed OLTP transaction data in a first data cache, receiving log data associated with the OLTP transaction data; and caching the log data in a second data cache. The method further includes correlating the parsed transaction data cached in the first data cache with the log data cached in the second data cache.

Abstract: A transceiving adapter for wireless network includes a transmitting and receiving module, a microprocessor module, an alarm module, and an input/output module. The transmitting and receiving module is to receive network signals from network and output the network signals to the microprocessor module, and receive an output signal from a computer via the microprocessor module and send the output signal to an access point. When the network signals are unstable, the microprocessor module outputs an alarm signal. When the network signals are stable, the microprocessor module outputs a control signal. The alarm module receives the alarm signal from the microprocessor module and outputs an alarming sound according to the alarm signal. The input/output module receives the control signal from the microprocessor and outputs the network signals to the computer according to the control signal.

Abstract: Systems and methods for use in communication between a client and a server, via a networking device, are provided. The method may include sending a request to establish a data connection from the client to the server via the networking device, setting a data connection keep-alive interval for the data connection to a predetermined safe value, and sending a request to establish a test connection between the client and the server. The method may further include determining an efficient keep-alive interval for communication between the client and server via the networking device, using the test connection, setting the data connection keep-alive interval to the efficient keep-alive interval determined using the test connection, and uploading the efficient keep-alive interval from the client to the server in an efficient keep-alive interval notification message, for communication to other clients connected to the server.

Abstract: A program, an apparatus and a method verify a program that efficiently verifies a concurrent/parallel program, allowing interactively debugging the current/parallel program. The program causes a computer to execute a detection step that detects the function that has been altered and the function that uses a shared variable influenced by the alteration out of the program to be verified before and after the alteration and also detects the part that is influenced by the alteration, the control structure part and the other parts, a model generation step that generates a model on the basis of the outcome of the detection in the detection step and a verification step that verifies the program to be verified after the alteration by comparing the model of the program to be verified before the alteration and the model of the program to be verified after the alteration.

Abstract: Mock exceptions, including mock exception types, are defined by a host to be raised in a plug-in. The mock exceptions might be sanitized. They might be transported from the plug-in to the host. Mock exceptions might also be mapped to real exceptions, which are raised in the host and handled by the host.

Abstract: A procedure for determining the mode of operation of an Ethernet network during passive monitoring of the network. A passive tap is introduced into a network and configured to operate according to a first Ethernet mode. The tap determines whether or not it is operating in the same mode as that being used by devices within the network segment being monitored. If so, the tap continues to operate in the current mode, otherwise, the tap switches modes and the process repeats until the tap is deemed to be operating in the correct mode.

Abstract: Correcting errors in data objects includes executing a main process to process the data objects, detecting an error in a first data object via the main process, sending, to an error correcting process, the data object and information associated with the error, and instantiating an instance of the error correcting process to attempt to correct the error. The error correcting process is implemented using substantially a same environment as the main process. The main process continues to execute during and after sending the data object and the information to the error correcting process and while the error correcting process attempts to correct the error.

Abstract: A system and method for intrusion prevention high availability fail over. The system includes a network infrastructure which comprises a first sensor and at least one back-up sensor. The first sensor and the at least one back-up sensor are in line with a network path. The first sensor and the at least one back-up sensor are configured to share connection and session information via a communication link.

Abstract: Embodiments provide methods and apparatuses for detecting errors in a computation using state variables. In various embodiments, corrections of the errors through the state variables are also provided. In various embodiments, the disclosed techniques may be used for power and/or energy minimization/reduction, and debugging, among other goals. Other embodiments and/or applications may be disclosed and/or claimed.

Abstract: A temperature measuring device having a smart chip, or electronic circuit, integrated therein is provided. The smart chip, or electronic circuit, includes at least a unique identification number or data specific to the particular temperature measuring device stored thereon. The electronic circuit further includes calibration data of the temperature measuring device stored thereon. A module controller of a temperature control system is configured to verify the unique identification number of the thermocouple assembly prior to allowing data to be transferred between the temperature measuring device and a temperature controller. A graphical user interface allows an operator to enter the unique identification number or data to verify the temperature measuring device and display an error message if the number or data entered is not equivalent, or does not match, the unique identification number or data stored on the electronic circuit.

Abstract: A computer-implemented method and system for reconstructing a response message to an improper accessing request in a web application environment. The method includes: obtaining the URL of a web application to be accessed by the improper accessing request and the error parameter information of the improper accessing request; obtaining a response template based on the obtained URL of the web application to be accessed; and merging the obtained error parameter information of the improper accessing request with the obtained response template to generate a reconstructed response message for the improper accessing request. The system includes: a message obtaining device; a response message template obtaining device; and a response message merging device.

Abstract: Systems and methods are provided for identifying a relationship between multiple interrelated applications running in a mainframe environment. A repository is created to store information describing the multiple interrelated applications from the mainframe environment. A target application among the multiple interrelated applications is identified, and a frequency and a dependency relationship between the application and the multiple interrelated applications is determined. The relationship is displayed via a user interface. The relationship may be used to identify a cause of a failure in a mainframe environment.

Abstract: A server-based environment for reporting a status of a security, monitoring and automation controller is provided. Detecting cessation of an always-on persistent network connection between the SMA controller and the server is also provided. Reporting the cessation of the network connection to an end user and defined others is further provided. A further aspect provides for automatically reporting an alarm event to a central station, the end user, and others, in the event the cessation of the network connection occurs while the SMA controller is armed and after a zone fault event, and not receiving a disarm notification prior to expiration of a preset entry delay.

Abstract: Non-inline transaction error correction is disclosed. Where a transaction being processed in a pipeline is determined to include a correctable error, it is output, or drained, from the pipeline into an error queue. The pipeline is switched from a normal mode of operation to a correction mode of operation. In the correction mode, a correction command is inserted into and processed within the pipeline to correct the error within the transaction. The pipeline is switched from the correction mode of operation to a restart mode of operation. In the restart mode, the transaction is reprocessed within the pipeline. The pipeline is then switched from the restart mode of operation back to the normal mode of operation.

Abstract: System and method for converting a class oriented data flow program to a structure oriented data flow program. A first data flow program is received, where the first data flow program is an object oriented program comprising instances of one or more classes, and wherein the first data flow program is executable to perform a first function. The first data flow program is automatically converted to a second data flow program, where the second data flow program does not include the instances of the one or more classes, and where the second data flow program is executable to perform the first function. The second data flow program is stored on a computer memory, where the second data flow program is configured to be deployed to a device, e.g., a programmable hardware element, and where the second data flow program is executable on the device to perform the first function.

Abstract: A user interface component receives an input error message. A query enhancer component derives error messages from the input error messages using error pattern(s) representative of the input error message and error sub-pattern(s) of the error pattern(s). A result aggregator component inputs each error message to search engines, receives search results, aggregates the search results, and provides the search results to the user interface. The enhancer component may include a pattern composer component to locate error patterns representative of the input error message, and a sub-pattern generator component to derive error sub-patterns from the error patterns. The aggregator component may determine whether the search results are in agreement with a predetermined criterion. If not, the aggregator component may request the enhancer component to provide additional error messages to input to the search engines.

Abstract: The invention relates to computer engineering, and its usage ensures the possibility to recognize types of failures occurring during operation of the program computing means, and to respond respectively for a failure of each type. The failures can include errors in storing the core memory content, control transfer to wrong command errors, and errors relating to various time interruptions during a program run.

Abstract: Method and application server for providing an asynchronous error notification from an application server to an application server controller in a network is provided. The method at the application server includes generating an error message when an error occurs at/during Open Service Gateway initiative (OSGi) framework runtime. The method also includes converting the error message as a Universal Plug and Play (UPnP) event. Moreover, the method includes providing the UPnP event comprising error information to the application server controller. The application server includes a receiver configured to receive a command from an application server controller to install an application in an Open Service Gateway initiative (OSGi) framework available at the application server. The application server also includes a processor configured to generate an error message when an error occurs during installation of the application in the framework and convert the error message as a Universal Plug and Play (UPnP) event.

Abstract: A processing unit includes a processor core and a cache memory coupled to the processor core. The cache memory includes a data array, a directory of the data array, error detection logic that sequentially detects a first, second and third correctable errors in the data array of the cache memory and provides indications of detection of the first, second and third correctable errors, and control circuitry that, responsive to the indication of the third correctable error and an indication that the first and second correctable errors occurred at too high a frequency, marks an entry of the data array containing a cache line having the third correctable error as deleted in the directory of the cache memory regardless of which entry of the data array contains a cache line having the second correctable error.

Abstract: Machine-readable media, methods, apparatus and system for caption detection are described. In some embodiments, during a non-quiesce state of a system, a configuration data for a configuration update of a configurable device of the system may be calculated, and it may be determined whether the configuration data is final configuration data or intermediate configuration data, wherein the final configuration data may be used to directly enact the configuration update during a quiesce state of the system, while the intermediate configuration data is used to indirectly enact the configuration update during the quiesce state of the system. Further, during the non-quiesce state of the system, if the configuration data is the intermediate configuration data, then codes associated with the configuration data may be determined, wherein the codes may be used to operate the configuration data to obtain the final configuration data during the quiesce state of the system.

Abstract: A semiconductor memory includes multi-mode reporting signals, a state register, and parity detectors. The parity detector determines whether signals received on a communication bus contain a desired parity. The multi-mode reporting signals enable reporting of communication faults without adding additional signals to the semiconductor memory by being configured in a normal operating mode or a parity fault mode for reporting communication faults to an external memory controller. The state register enables storing of received values from the communication bus. With the state register, a memory controller may determine correctly received signal patterns and failing signal patterns. Parity may be defined as even or odd and may be generated based on various signal configurations. The invention may be configured as a computing system comprising a processor, an input device, an output device, the memory controller, and at least one semiconductor memory.

Abstract: A smart card is formed of a memory having light-sensing cells to sense externally supplied light and generate a detection signal in response to the externally supplied light being sensed by the light-sensing cells, and a reset control circuit generating a reset signal in response to the detection signal, the reset signal operating to reset the smart card.

Abstract: Described is an improved method, system, and computer program product for preventing concurrent access and processing of data by multiple threads. The inventive approach may be applied to prevent concurrent access in resequencers.

Abstract: System and method for managing and communicating state changes of a complex system. The system includes a plurality of configuration items, wherein each configuration item is a functional component of the system and has an associated state value that is one of a set of state values describing operational characteristics of the configuration item. A data structure that represents transitions between the state values is constructed in each of the configuration items. Each of the configuration items receives notification requests that include a first set of state values, a second set of state values, a requester identifier, and a message value. The requester identifier and message value of each notification request are associated with a transition of the configuration item for a transition from a state in the first set of state values to a state value in the second set of state values.