Loop Or Ring Configuration Patents (Class 714/717)
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Patent number: 7398438Abstract: The invention includes a method and apparatus for determining a routing table for use in a network comprising a plurality of type-one nodes and a plurality of type-two nodes where the type-two nodes use respective type-two routing tables having one next-hop node associated with each of a plurality of destination nodes of the network. The method includes obtaining, from the type-one nodes and the type-two nodes, link status information associated with each of a plurality of links of the network, obtaining traffic measurement information from the type-one nodes and the type-two nodes, and determining, using the link status and traffic measurement information, type-one routing tables for the respective type-one nodes. The type-one routing tables are determined as a group in a substantially coordinated manner, and each type one routing table includes a plurality of next-hop nodes associated with each of the destination nodes.Type: GrantFiled: March 30, 2006Date of Patent: July 8, 2008Assignee: Lucent Technologies Inc.Inventors: Sugam Agarwal, Muralidharan Sampath Kodialam, Tirunell V. Lakshman
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Patent number: 7380152Abstract: A multi-device system having a daisy chain system bus structure and related method of operation are disclosed. A reference signal having a defined oscillation period is communicated around the daisy chain bus structure. Total signal transmission time around the daisy chain bus structure as well as signal transmission time to each one of a plurality of client devices connected to a host device by the daisy chain bus structure may be readily determined.Type: GrantFiled: June 24, 2005Date of Patent: May 27, 2008Assignee: Samsung Electronics Co., Ltd.Inventor: Hoe-Ju Chung
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Patent number: 7373577Abstract: Provided is a CAN system that can generate an error signal without requiring hardware for generating an error signal to be connected to a bus. A protocol processing part within a CAN controller incorporates error data into receive data or send data, based on error data information stored in a register.Type: GrantFiled: October 31, 2005Date of Patent: May 13, 2008Assignee: Renesas Technology Corp.Inventors: Toshiyuki Uemura, Yasuyuki Inoue
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Patent number: 7287201Abstract: A data transmission apparatus comprises an estimation device to estimate a transmission condition of the transmission channel in the transmitter based on at least Jitter information or a packet loss rate obtained from the receiver, and a controller to change at least one of a bit rate of transmission data and a error resilience level according to the estimated transmission condition.Type: GrantFiled: November 23, 2005Date of Patent: October 23, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Takeshi Nagai, Yoshihiro Kikuchi, Tadaaki Masuda
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Publication number: 20070205858Abstract: Provided are a method and apparatus for providing state information of a digital device in a home network. The apparatus includes a first network interface module receiving changed state information data from the digital device in the home network, and a control module updating state information of the digital device on the basis of the received state information data.Type: ApplicationFiled: January 24, 2007Publication date: September 6, 2007Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventor: Jin-seok Choi
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Patent number: 7237169Abstract: Cross-monitoring sensor system and method in which a plurality of sensors each having a sensing element, circuitry for processing signals from the sensing element, an output interface for delivering processed signals, and an auxiliary input to which signals from another device can be input for processing and delivery by the output interface. Signals from each of the sensors are applied to the auxiliary input of another one of the sensors, and signals from the output interfaces of the sensors are compared to verify integrity of the system.Type: GrantFiled: July 26, 2004Date of Patent: June 26, 2007Assignee: BEI Technologies, Inc.Inventor: Thad W. (Marc) Smith
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Patent number: 7200108Abstract: A method and apparatus for recovery from faults in a loop network (400) is provided. The loop network (400) has a host means (402), a first loop and a second loop (406, 408), a plurality of ports (410) connected to each of the loops (406, 408) and a control device (414, 440) on or connected to each loop (406, 408) with bypass control over at least one of the ports (410) connected to the loop (406, 408). In the event of a failure on the first loop (406), the host means (402) instructs the bypassing of at least one port (410) on the first loop (406), the host means (402) sending the instructions via the control device (414, 440) on or connected to the second loop (408).Type: GrantFiled: May 17, 2002Date of Patent: April 3, 2007Assignee: International Business Machines CorporationInventors: Reginald Beer, Paul Nicholas Cashman, Paul Hooton, Ian David Judd, Robert Frank Maddock, Neil Morris, Robert Bruce Nicholson, Barry Douglas Whyte
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Patent number: 7193973Abstract: A data transmission apparatus comprises an estimation device to estimate a transmission condition of the transmission channel in the transmitter based on at least Jitter information or a packet loss rate obtained from the receiver, and a controller to change at least one of a bit rate of transmission data and a error resilience level according to the estimated transmission condition.Type: GrantFiled: July 7, 2005Date of Patent: March 20, 2007Assignee: Kabushiki Kaisha ToshibaInventors: Takeshi Nagai, Yoshihiro Kikuchi, Tadaaki Masuda
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Patent number: 7191371Abstract: A testing circuit for testing a series of at least three alternating transmitter and receiver links. The testing circuit including a built-in-self-test (BIST.) macro for generating test data and transmitting the test data to a first link of the series of transmitter and receiver links, and for receiving processed test data from a last link of the series of transmitter receiver links; and at least one test transmission line for transmitting test data received by a link of the series of transmitter and receiver links to a next link of the series of transmitter and receiver links, wherein the at least one test transmission line connects the at least three transmitter and receiver links.Type: GrantFiled: April 9, 2002Date of Patent: March 13, 2007Assignee: Internatioanl Business Machines CorporationInventors: Louis L. Hsu, Li-Kong Wang
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Patent number: 7139925Abstract: A distributed system provides for separate management of dynamic cluster membership and distributed data. Nodes of the distributed system may include a state manager and a topology manager. A state manager handles data access from the cluster. A topology manager handles changes to the dynamic cluster topology. The topology manager enables operation of the state manager by handling topology changes, such as new nodes to join the cluster and node members to exit the cluster. A topology manager may follow a static topology description when handling cluster topology changes. Data replication and recovery functions may be implemented, for example to provide high availability.Type: GrantFiled: April 29, 2002Date of Patent: November 21, 2006Assignee: Sun Microsystems, Inc.Inventors: Darpan Dinker, Mahesh Kannan, Pramod Gopinath
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Patent number: 7054264Abstract: A communication device for interconnection of first and second networks, of which at least the first network is a bidirectional ring network, includes first and second interconnect modules, each such module adapted to receive outgoing data traffic on the first network at a data rate not substantially greater than a predetermined maximum rate for one of the ring directions, and to convey the outgoing data traffic to the second network. When a fault occurs in one of the first and second modules, the other module is reconfigured to receive substantially all of the outgoing data traffic and to convey the outgoing data traffic to the second network regardless of whether the outgoing data traffic is transmitted on the first network in the clockwise or in the counterclockwise direction.Type: GrantFiled: July 24, 2001Date of Patent: May 30, 2006Assignee: Corrigent Systems Ltd.Inventor: Gal Mor
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Patent number: 7055068Abstract: A method for validating operation of a fiber link when the fiber link is initialized includes the steps of entering a trial link up state upon receiving a command to initialize the fiber link so that normal commands to other devices within the fiber channel loop are not resumed, and thereafter entering a final link up state and resuming normal commands to other devices within the fiber channel loop. In exemplary embodiments, the method may be implemented by devices within a system such as a disk array system of a storage area network (SAN), or the like.Type: GrantFiled: July 25, 2002Date of Patent: May 30, 2006Assignee: LSI Logic CorporationInventor: Daniel A. Riedl
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Patent number: 7027411Abstract: A method and system are disclosed for mapping the topology of a network having interconnected nodes by identifying changes in the network and updating a stored network topology based on the changes. The nodal connections are represented by data tuples that store information such as a host identifier, a connector interface, and a port specification for each connection. A topology database stores an existing topology of a network. A topology converter accesses the topology database and converts the existing topology into a list of current tuples. A connection calculator calculates tuples to represent connections in the new topology. The topology converter receives the new tuples, identifies changes to the topology, and updates the topology database using the new tuples. The topology converter identifies duplicate tuples that appear in both the new tuples and the existing tuples and marks the duplicate tuples to reflect that no change has occurred to these connections.Type: GrantFiled: October 31, 2000Date of Patent: April 11, 2006Assignee: Hewlett-Packard Development Company, L.P.Inventors: Eric A Pulsipher, Joseph R Hunt
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Patent number: 7020820Abstract: Disclosed are novel methods and apparatus for efficiently providing instruction-based BIST of external memory. In an embodiment, a built-in self-testing system is disclosed. The system includes an external memory module, an on-chip memory controller coupled to the external memory module, an on-chip built-in self-test (BIST) module coupled to the on-chip memory controller, and an interface controller coupled to the BIST module to provide an interface to access the BIST module. The on-chip memory controller may send and receive data to and from the external memory module. And, the BIST module may include an instruction register to store a plurality of instructions.Type: GrantFiled: December 20, 2002Date of Patent: March 28, 2006Assignee: Sun Microsystems, Inc.Inventors: Olivier Caty, Ismet Bayraktaroglu, Amitava Majumdar
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Patent number: 7003705Abstract: A method and apparatus is provided for automatic protection switching in a ring network by creating a protection domain having a control vlan and protected data vlans and designating a master node and transit nodes connected by a primary port and a secondary port. The master node blocks the secondary port for data vlan traffic until it detects a fault either by notice from a transit node or by polling. When a fault is detected, the master node unblocks the secondary port for data vlan traffic. When the fault is restored, the transit node temporarily blocks the restored port to data vlan traffic thereby preventing a loop. Each time the secondary port is blocked and unblocked, the forwarding databases on all the nodes are flushed.Type: GrantFiled: June 17, 2004Date of Patent: February 21, 2006Assignee: Extreme Networks, Inc.Inventors: Michael Yip, Sunil P. Shah, Michelle M. Ragonese
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Patent number: 6993689Abstract: A data transmission apparatus comprises an estimation device to estimate a transmission condition of the transmission channel in the transmitter based on at least Jitter information or a packet loss rate obtained from the receiver, and a controller to change at least one of a bit rate of transmission data and a error resilience level according to the estimated transmission condition.Type: GrantFiled: October 30, 2001Date of Patent: January 31, 2006Assignee: Kabushiki Kaisha ToshibaInventors: Takeshi Nagai, Yoshihiro Kikuchi, Tadaaki Masuda
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Patent number: 6981186Abstract: A method for establishing communication in an ADSL subscriber loop, the method comprising the steps of determining that showtime cannot be entered during initialization of communication between the modems; requesting entry into a diagnostic mode by one of the modems upon the determining; diagnosing line conditions as being unable to support communication at a predetermined standard; and establishing communication at a standard lower than the predetermined standard.Type: GrantFiled: July 30, 2002Date of Patent: December 27, 2005Assignee: Ciena CorporationInventors: Alberto Ginesi, Scott McClennon
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Patent number: 6973603Abstract: A first device delivers a clock offset message to a second device. The second device offsets its data transmission according to the clock offset message. A test pattern is transmitted from the second device to the first device. The first device then checks the received test pattern to determine whether the transmission was successful. The first device can then deliver an additional clock offset message to the second device to instruct the second device to offset its data transmission by a different value than was used previously. The second device again transmits the test pattern and the first device again checks the received pattern. By trying a number of clock offset values and determining which values result in successful transmissions of data, the first device can determine the optimal clock offset value and instruct the second device to use this value for all transmissions.Type: GrantFiled: June 28, 2002Date of Patent: December 6, 2005Assignee: Intel CorporationInventors: Joseph H. Salmon, Hing Y. To
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Patent number: 6912679Abstract: A system and method provides for direct control of a high speed data link in a computer system for purposes of testing the data link under a full range of anticipated operating conditions. The transmission of test data is preferably under hardware control and preferably does not encounter interference from other data sources in the computer system thereby enabling the intended test pattern data to be experienced by the data link under test in unaltered form. The tested data is preferably compared to the original data in order to evaluate the status of the link under test.Type: GrantFiled: April 29, 2000Date of Patent: June 28, 2005Assignee: Hewlett-Packard Development Company, L.P.Inventors: Kenneth D. Holloway, Jeffery A. Benis
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Patent number: 6892329Abstract: A method for fault protection in a bidirectional ring network includes transmitting first and second flows of packets around the bidirectional ring network while defining the first flow as a wrapping flow and the second flow as a non-wrapping flow. Upon detection by a node in the network that a segment of the network proximal to the node has failed, the packets in the first flow are wrapped at the node between clockwise and counterclockwise directions on the network so as to avoid the failed segment, while the packets in the second flow are not wrapped.Type: GrantFiled: October 3, 2001Date of Patent: May 10, 2005Assignee: Corrigent Systems Ltd.Inventor: Leon Bruckman
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Publication number: 20040153910Abstract: An integrated memory includes command terminals for receiving command signals in-a normal operation and in a test operation of the memory, and also a signal terminal for receiving a further signal, which differs from the command signals. Registers store data patterns or data topologies for use in the test operation of the memory. A register decoder circuit serves for the selection of the registers, it being possible for inputs of the register decoder circuit to be connected to the command terminals and to the signal terminal for the purpose of selection of the registers in the test operation. The invention makes it possible, for the test operation, to address an increased number of registers without driving an additional external terminal pin. A method for testing the memory is also provided.Type: ApplicationFiled: July 14, 2003Publication date: August 5, 2004Inventors: Erwin Thalmann, Sven Boldt
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Patent number: 6766482Abstract: A method and apparatus is provided for automatic protection switching in a ring network by creating a protection domain having a control vlan and protected data vlans and designating a master node and transit nodes connected by a primary port and a secondary port. The master node blocks the secondary port for data vlan traffic until it detects a fault either by notice from a transit node or by polling. When a fault is detected, the master node unblocks the secondary port for data vlan traffic. When the fault is restored, the transit node temporarily blocks the restored port to data vlan traffic thereby preventing a loop. Each time the secondary port is blocked and unblocked, the forwarding databases on all the nodes are flushed.Type: GrantFiled: October 31, 2001Date of Patent: July 20, 2004Assignee: Extreme NetworksInventors: Michael Yip, Sunil P. Shah, Michelle M. Ragonese
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Patent number: 6584535Abstract: A configurable interconnect for use with high-speed electronic system components. The interconnect uses a lightweight protocol with control characters embedded into the data stream. The control characters define events such as end of packet, end of packet with error, transmit on, transmit off, synchronizing codes, and pass-through status. In one described embodiment, the protocol is used in an internetworking device node in which a pair of high-speed counter rotating rings transport data packets. The high-speed interconnect permits data packets to pass through the node without the delays which might otherwise be experienced with time division multiplex bus structures and the like.Type: GrantFiled: January 31, 2000Date of Patent: June 24, 2003Assignee: Cisco Technology, Inc.Inventors: Jean-Yves Ouellet, Leonid Goldin
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Publication number: 20030086369Abstract: A signal quality monitoring device includes alarm producing/canceling sections for first and second grade, and an alarm holding section for, when a grade of low quality of the current signal shifts from one to the other grades and the corresponding alarm producing/canceling section discriminates that the current signal is in the other grade of low quality, holding the continuous output of the one alarm regardless of the cancellation by the one alarm producing/canceling section, until the other alarm producing/canceling section produces the continuous output of the corresponding other alarm as a consequence of expiration of the corresponding producing time period. Therefore, no-alarm states, caused by frequently shifting of low quality among plural grades in accordance with lengths of a producing time period and a canceling time period set for each grade of low quality, can be avoided.Type: ApplicationFiled: March 27, 2002Publication date: May 8, 2003Inventor: Junichi Ishiwatari
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Patent number: 6546498Abstract: A system and method of detecting/eliminating a faulty port in a fiber channel-arbitrated loop, which implements early location/elimination of a port which causes a faulty on a loop in an FC-AL. If no faulty is found in loop 7 at step 914, it can be determined that its own port normally works. Then, an enable instruction is issued to a node destined to a port on the loop 7 from loop 8 at step 915. If a fault is detected in the loop 7 at step 916, it can be determined that the port which has issued the enable instruction at step 915 has been issued faulty. The port which has issued the enable instruction at step 915 is registered as a faulty port at step 918. A bypass instruction is issued from the loop 8 at step 919.Type: GrantFiled: December 2, 1999Date of Patent: April 8, 2003Assignee: NEC CorporationInventor: Takuya Saegusa
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Patent number: 6430151Abstract: An Ethernet network with redundancy properties and an associated method for detecting and eliminating errors in the network. A redundancy manager (6), which is connected to the line ends of the network (1), checks the status of the network by transmitting and receiving test telegrams. If there is an interruption in the network, the redundancy manager (6) connects the line ends (7, 8) and thereby ensures continued network operation within milliseconds. The network has a loop structure that is less expensive than a dual bus structure even though fast media redundancy is ensured.Type: GrantFiled: September 11, 2000Date of Patent: August 6, 2002Assignees: Siemens Aktiengesellschaft, Richard Hirschmann GmbH & Co.Inventors: Karl Glas, Joachim Lohmeyer, Rolf Reuschen, Bernhard Schmid
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Patent number: 6400694Abstract: A duplex communication path switching system provided at each of nodes connected by a communication path which is formed of clockwise and counterclockwise transmission lines in a ring network. The duplex communication path switching system includes a checking circuit for checking whether or not each of a plurality of units of the signal received from each of the clockwise transmission line and the counterclockwise transmission line is normal, and a switching circuit for switching the communication path between the clockwise transmission line and the counterclockwise transmission line based on checking results obtained by the checking circuit so that units which are normal are selected from the signals. Each of the plurality of units of the signal has a constant speed and is provided with frame information defined for the signal transmitted through the communication path, the frame information being used to divide the signal into the plurality of units.Type: GrantFiled: May 24, 1996Date of Patent: June 4, 2002Assignee: Fujitsu LimitedInventor: Takayuki Taniguchi
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Patent number: 6314475Abstract: A communication system for monitoring and/or controlling communication parameters of a communication device. The communication system monitors a communication channel that is created when the communication device connects to a network, controls the communication device as it operates on the network, and configures the communication device. The communication device is commonly a modem and is communicatively coupled to the network to carry out ongoing communications between the modem and the network through the communication channel. Further, a software module is associated with the modem, and the software module accesses the internal settings of the modem via the communication channel (if necessary) and performs operations such as monitoring, controlling, and configuring the modem (or other communication device) using the internal settings of the modem.Type: GrantFiled: November 16, 1998Date of Patent: November 6, 2001Assignee: Conexant Systems, Inc.Inventors: Zeev Collin, Tal Tamir
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Patent number: 6233704Abstract: A multiple counter-rotating ring computer network system having a permission control scheme for client isolation. The peripheral channel allows two rings to be folded into one longer ring so that faulty nodes can be effectively removed from the network. Or, any of the rings can be masked so that they are unoperational. The network system also allows several client isolation states ranging from complete isolation to master access. These types of isolation allow faulty client devices to be tested while maintaining a high-level of network security by configuring the client to an appropriate isolation state.Type: GrantFiled: March 13, 1996Date of Patent: May 15, 2001Assignee: Silicon Graphics, Inc.Inventors: Steven L. Scott, Steven M. Oberlin, Daniel L. Kunkel, Gerald A. Schwoerer
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Patent number: 6199174Abstract: An abnormality recovery system in a network comprising a plurality of station units connected by a ring-like data transmission line enabling circular transmission of communication data in digital form in a single direction. In the system, when it is determined that an abnormality occurs in a communication IC, a CPU performs switch control to switch a communication data route so as to bypass the communication IC and send communication data on a bypass from an optical receiver to an optical transmitter.Type: GrantFiled: April 15, 1998Date of Patent: March 6, 2001Assignee: Yazaki CorporationInventors: Akira Norizuki, Katsumi Murakami, Hiroshi Nishiyama, Katsutoshi Nakajima
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Patent number: 6122249Abstract: An add drop multiplexing (ADM) apparatus has a simple and compact structure. The ADM apparatus has high-order interfaces connected to a high-order network, path setting units each for setting a path for a signal according to path data and inserting or dropping the signal to or from the high-order network, a first path protection switch for selecting one of the signals dropped by the path setting units, low-order interfaces each for receiving the selected signal and transmitting the same to a low-order network, and a second path protection switch for receiving low-order signals from the low-order interfaces and transferring one of them to the path setting units so that the path setting units may insert the signal into the high-order network.Type: GrantFiled: March 4, 1997Date of Patent: September 19, 2000Assignee: Fujitsu LimitedInventors: Hideaki Mochizuki, Ritsuko Ohkura
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Patent number: 6055653Abstract: The gangSIMM Memory Tester is a PWA which plugs directly into a CPU's SIMM slot. The gangSIMM Memory Tester contains a known good SIMM, which is connected directly to the CPU's bus. All memory functions for this SIMM slot is provided by the gold SIMM per normal SIMM operation. The CPU bus routed to the gold SIMM on the gangSIMM Memory Tester is also routed to a test bus via a buffer which provides increased drive capacity. The test bus is distributed in parallel to N number of SIMM slots located on the gangSIMM Memory Tester throughout a second set of tri-stating buffers. During read accesses to memory involving the CPUs SIMM slot location where the gangSIMM PWA is directly plugged into, data provided by the gold SIMM is compared on an individual basis with the data provided by an under-test SIMM. This operation occurs in-parallel for all under-test SIMMs.Type: GrantFiled: April 27, 1998Date of Patent: April 25, 2000Assignee: Compaq Computer CorporationInventors: Michael LeBlanc, Davoud Safari, Edwin Smith
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Patent number: 5996001Abstract: A high availability on-line transaction processing (OLTP) system utilizes both hardware and software. Geographically separated primary (live) and backup (shadow) communications servers link live and shadow OLTP systems to geographically separated live and shadow Wide Area Networks and remote client computers. The remote client computers communicate with the live and shadow OLTP systems through their respective live and shadow WANs and communications servers. The live OLTP system sends "keep-alive" messages to the shadow system via the dedicated circuits on a frequent basis. If the shadow OLTP system does not receive a keep-alive message from the live system within a designated time interval, it sends "probe messages" to the live communications servers and live OLTP system, via the shadow WAN, client computers and live WAN to determine their status.Type: GrantFiled: February 10, 1997Date of Patent: November 30, 1999Inventors: Philip Quarles, Stephanie Quarles
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Patent number: 5951701Abstract: A method of detecting loopbacks on trunks in digital networks, comprises the steps of detecting an out-of-service trunk, continually placing a predetermined bit pattern on an outgoing channel of a trunk card, continually monitoring a receive channel of the trunk card to detect said bit pattern, and identifying the presence of a loopback when said bit pattern is persistently detected on the receive channel. This method avoids the need to dedicate a trunk channel for signaling purposes. By detecting the presence of loopbacks, intelligent networks can be prevented from unjustifiably clearing an alarm condition and returning traffic to a fault path.Type: GrantFiled: February 20, 1998Date of Patent: September 14, 1999Assignee: Newbridge Networks CorporationInventors: Tim Kuhl, Bruce Nolan, Mark Kitowicz
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Patent number: RE37401Abstract: A fault recovery system of a ring network based on a synchronous transport module transmission system, having a fault data writing unit for writing, when an input fault is detected by a node, fault data in a predetermined user byte in an overhead of a frame flowing through both a working line and a protection line running in opposite directions to each other. By detecting the fault data in a supervision node or a node just before the fault position, the supervision node or the node just before the fault position executes a loopback operation.Type: GrantFiled: April 25, 1996Date of Patent: October 2, 2001Assignee: Fujitsu LimitedInventors: Haruo Yamashita, Yuji Takizawa, Kazuo Yamaguchi