Analysis Of Code Form Patents (Class 717/141)
  • Patent number: 8578104
    Abstract: A multiprocessor system has a background memory and a plurality of processing elements, each comprising a processor core and a cache circuit. The processor cores execute programs of instructions and the cache circuits cache background memory data accessed by the programs. A write back monitor circuit is used to buffer write addresses used for writing data by at least part of the processor cores. The programs contain commands to read the buffered write back addresses from the write back monitor circuit and commands from the programs to invalidate cached data for the write back addresses read by the commands to read the buffered write back addresses. Thus cache management is performed partly by hardware and partly by the program that uses the cache. The processing core may be a VLIW core, in which case instruction slots that are not used by the program can be made useful to include instructions for cache management.
    Type: Grant
    Filed: June 9, 2009
    Date of Patent: November 5, 2013
    Assignee: NXP, B.V.
    Inventors: Jan Hoogerbrugge, Andrei Sergeevich Terechko
  • Patent number: 8578352
    Abstract: A capability for limited customization that utilizes existing virtual dispatch table technology and allows selective customization is provided. Such a capability combines the usage of virtual dispatch tables with both customized and non-customized code to reduce, or even eliminate over-customization. Further, such a capability may employ a runtime system that decides what methods to customize based on several factors including, but not limited to the size of a class hierarchy, the amount of available space for compiled code, and the amount of available time for compilation.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: November 5, 2013
    Assignee: Google, Inc.
    Inventors: Srdjan Mitrovic, Lars Bak
  • Patent number: 8572595
    Abstract: Computer-executed transformation of source code enables optimization of the code for one or more of parallelism, locality, and memory footprint of operations represented in the source code on a computing apparatus. This Abstract is provided for the sole purpose of complying with the Abstract requirement rules that allow a reader to quickly ascertain the subject matter of the disclosure contained herein. This Abstract is submitted with the explicit understanding that it will not be used to interpret or to limit the scope or the meaning of the claims.
    Type: Grant
    Filed: August 5, 2011
    Date of Patent: October 29, 2013
    Assignee: Reservoir Labs, Inc.
    Inventors: Richard A. Lethin, Allen K. Leung, Benoit J. Meister, Nicolas T. Vasilache
  • Patent number: 8572589
    Abstract: A computer readable medium stores a program, executable by a computer, for enabling translation of machine-centric commands in an instrument protocol to a programming language for controlling an instrument configured to use the machine-centric commands. The computer readable medium includes an identifying code segment for identifying instrument protocol commands executable by the instrument, and a generating code segment generates methods corresponding to the instrument protocol commands, each method including programming language source code or compiled machine code for executing the corresponding instrument protocol command. A storing code segment stores the methods in a program library associated with the instrument, the program library enabling selection of at least one method by a programming language program that controls the instrument, in order to execute the instrument protocol command corresponding to the selected method.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: October 29, 2013
    Assignee: Agilent Technologies, Inc.
    Inventors: James Adam Cataldo, Long Bill Huynh, Stanley T. Jefferson
  • Patent number: 8561035
    Abstract: A system and method of discovering one or more program variable values may extract an abstract interpretation of a program variable used in a computer program, locate installation-specific repositories associated with the computer program, parse the located installation-specific repositories and extract one or more configuration parameters, and substitute the one or more configuration parameters into the extracted abstract interpretation.
    Type: Grant
    Filed: September 3, 2009
    Date of Patent: October 15, 2013
    Assignee: International Business Machines Corporation
    Inventors: Sergej Chicherin, Nikolai A. Joukov, Birgit Pfitzmann, Marco Pistoia, Vasily Tarasov, Takaaki Tateishi, Norbert G. Vogl
  • Patent number: 8549502
    Abstract: Performance of a program written in dynamic languages is improved through the use of a compiler that provides type inference for methods having a user-defined element. The user-defined element may be an input in a user-defined type. Though, the user-defined element may reflect that the method is user-defined. Type inference may be performed based on a user-defined mapping, relating input types to output types for one or more methods. The mapping may be specified as a data table provided to the compiler or as one or more functions that register with the compiler such that, as the compiler processes portions of a source program and detects a method with a user-defined element, the compiler may access the mapping and infer the type of an output of the method. The inferred type may then be used to optimize code dependent on that output.
    Type: Grant
    Filed: June 21, 2010
    Date of Patent: October 1, 2013
    Assignee: Microsoft Corporation
    Inventor: Parry Jones Reginald Husbands
  • Patent number: 8539450
    Abstract: A system and method for analyzing a concurrent program employ asynchronous function calls for communication and recursion. A control flow graph is constructed based on a context-sensitive pointer analysis, whereupon encountering a function pointer, a points-to set of the function pointer is computed in a context-sensitive fashion to determine a set of potential function calls. The context-sensitive pointer analysis is terminated when no new potential function calls are encountered and where the potential function calls may contribute new data races other than those that exist in the contexts traversed thus far. To decide this, a characterization of pointer aliasing based upon complete update sequences is employed. A set of contexts that may contribute to different data races are enumerated by tracking update sequences for function and lock pointers and pointers that are shared or point to shared memory locations. Data race detection is carried out on the control flow graph.
    Type: Grant
    Filed: February 8, 2010
    Date of Patent: September 17, 2013
    Assignee: NEC Laboratories America, Inc.
    Inventors: Vineet Kahlon, Nishant Sinha, Yun Zhang, Eric J. Kruus
  • Patent number: 8539462
    Abstract: A method of allocating registers for a processor based on cycle information is disclosed. The processor comprises a first cluster and a second cluster. Each cluster comprises a first functional unit, a second functional unit, a first local register file connected to the first functional unit, a second local register file connected to the second register file, and a global register file having a ping-pong structure formed by a first register bank and a second register bank. After building a Component/Register Type Associated Data Dependency Graph (CRTA-DDG), a functional unit assignment, register file assignment, ping-pong register bank assignment, and cluster assignment are performed to take full advantage of the properties of a processor as well as cycle information.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: September 17, 2013
    Assignee: National Tsing Hua University
    Inventors: Chung Ju Wu, Yu Te Lin, Jenq Kuen Lee
  • Patent number: 8533693
    Abstract: An architecture that that extends conventional computer programming languages that compile into an instance of an extensible markup language (XML) document object model (DOM) to provide support for XML literals in the underlying programming language. This architecture facilitates a convenient short cut by replacing the complex explicit construction required by conventional systems to create an instance of a DOM with a concise XML literal for which conventional compilers can translate into the appropriate code. The architecture allows these XML literals to be embedded with expressions, statement blocks or namespaces to further enrich the power and versatility. In accordance therewith, context information describing the position and data types that an XML DOM can accept can be provided to the programmer via, for example, an integrated development environment.
    Type: Grant
    Filed: November 29, 2010
    Date of Patent: September 10, 2013
    Assignee: Microsoft Corporation
    Inventors: Henricus Johannes Maria Meijer, David N. Schach, Avner Y. Aharoni, Peter F. Drayton, Brian C. Beckman, Amanda Silver, Paul A. Vick
  • Patent number: 8533690
    Abstract: A C-to-Java programming language translator that requires no human intervention, translates literally to preserve both procedure and function in the resulting code, and is independent of the purpose of the source code. The program reads in text from a C file, tokenizes each line for C keywords and punctuation, translates most keywords and expressions, and outputs the result to a Java file. The program is modular so that it is capable of running on multiple operating systems and hardware. The invention implements several methods of translation, including whole-line translation, search/replace translation, context-sensitive translation, idiomatic translation, and second-pass translation. The second-pass translation handles those instances when correct translation of a particular line depends on information in another line.
    Type: Grant
    Filed: May 20, 2010
    Date of Patent: September 10, 2013
    Inventor: James B. McAtamney
  • Patent number: 8527962
    Abstract: A method for promotion of a child procedure in a software application for a heterogeneous architecture, wherein the heterogeneous architecture comprises a first architecture type and a second architecture type, comprises inserting a parameter representing a parallel frame pointer to a parent procedure of the child procedure into the child procedure; and modifying a reference in the child procedure to a stack variable of the parent procedure to include an indirect access to the parent procedure via the parallel frame pointer.
    Type: Grant
    Filed: March 10, 2009
    Date of Patent: September 3, 2013
    Assignee: International Business Machines Corporation
    Inventors: Raul Silvera, Ettore Tiotto, Guansong Zhang
  • Patent number: 8527975
    Abstract: A computer readable storage medium includes executable instructions to identify a memory operation in target source code. A set of constraints associated with the memory operation are developed. The constraints are converted into a Boolean expression. The Boolean expression is processed with a Boolean satisfiability engine to determine whether the memory operation is potentially unsafe.
    Type: Grant
    Filed: November 2, 2007
    Date of Patent: September 3, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Brian Chess, Sean Fay, Ayee Kannan Goundan
  • Patent number: 8522219
    Abstract: A recorder, comprising: a context analyzer configured to associate HTTP transactions of a web application with a web session, wherein the web application executes code on the client side; an extensible document parser configured to parse a document included in the HTTP transactions; a library of parser additions used by the context analyzer to generate a context-full replay instruction; and a script generator configured to record a script including the context-full replay instruction in order to recreate the HTTP transactions in order to simulate use of the web application by a user.
    Type: Grant
    Filed: December 17, 2010
    Date of Patent: August 27, 2013
    Assignee: Borland Software Corporation
    Inventors: Gunter Schwarzbauer, Helmut Spiegl, Ernst Ambichl, Bernd Greifeneder
  • Patent number: 8521499
    Abstract: Systems and methods for run-time switching for simulation with dynamic run-time accuracy adjustment. In one embodiment, a computer implemented method performs a simulation of a computer instruction executing on a simulated hardware design by a first simulation model, wherein the first simulation model provides first timing information of the simulation. The first timing information is stored to a computer usable media. A pending subsequent simulation of the instruction is detected. Responsive to the presence of the first timing information in the computer usable media, the computer instruction is simulated by a second simulation model, wherein the second simulation model provides less accurate second timing information of the simulation than the first simulation model. The simulation run time information is updated for the subsequent simulation with the first timing information.
    Type: Grant
    Filed: March 1, 2011
    Date of Patent: August 27, 2013
    Assignee: Synopsys, Inc.
    Inventors: Karl Van Rompaey, Andreas Wieferink
  • Patent number: 8516456
    Abstract: A system and method are disclosed that compiles a sub-expression associated with an inexact pattern contained in a regular expression into a plurality of microprogram instructions that can be stored in contiguous locations of an instruction memory. At least one of the microprogram instructions includes a next instruction address and a fetch length value, where the next instruction address indicates the instruction memory address of the next instruction to be executed and the fetch length value indicates the number of sequentially-executed instructions that are to be fetched from contiguous locations of the instruction memory.
    Type: Grant
    Filed: November 11, 2010
    Date of Patent: August 20, 2013
    Assignee: NetLogic Microsystems, Inc.
    Inventors: Alexei Starovoitov, Greg Watson
  • Patent number: 8516457
    Abstract: Disclosed are embodiments a computer-implemented method, a system and an associated program storage device that provide for automatic programming language grammar partitioning to solve the “code too large” problem. The embodiments partition a particular programming language grammar into logical subsets based on a set of partitioning heuristics and using a dependency graph that is preprocessed so as to be devoid of any cyclically connected grammar rule nodes. For each logical subset, textual code for a corresponding portion of a parsing program can be generated and then converted into machine-readable code for that corresponding portion of the parsing program. Thus, small amounts of textual code for portions of a parsing program are discretely converted into machine-readable code, thereby avoiding the “code too large” problem. The machine-readable code for all portions of the parsing program can then be merged and the parsing program can be executed in order to parse a corpus.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: August 20, 2013
    Assignee: International Business Machines Corporation
    Inventors: Pankaj Dhoolia, Mangala G. Nanda, Krishna Nandivada Venkata, Diptikalyan Saha
  • Patent number: 8516458
    Abstract: A computer-programming tool for generating an implementation of a first data structure, the first data structure representing at least a portion of a computer-programming language. The implementation includes a second data structure and implementation rules which define the syntax rules of the first data structure to be enforced in relation to nodes of the second data structure during a subsequent processing operation which utilizes the implementation in order to establish compliance with the syntax rules represented by the first data structure. Links between nodes of the first data structure are representative of paths of inheritance of substitutability but not implementation and interface between those nodes.
    Type: Grant
    Filed: February 26, 2009
    Date of Patent: August 20, 2013
    Assignee: ITI Scotland Limited
    Inventors: Neil Stewart, Douglas Little
  • Publication number: 20130205283
    Abstract: Methods for constructing an Any-to-Any data machine (consisting of Any-to-Any data components and their environmental requirements) and an Any-to-Any code machine (consisting of Any-to-Any code components and their environmental requirements) and relating them together so that they harmoniously interact and so that the data Any-to-Any machine controls and is also acted upon by the code Any-to-Any machine so as to produce an Any-to-Any system that transforms data in a manner that is useful and which is analogous to the harmonious interaction of the Any-Any binary code and Any-to-Any transistor systems, and which handles data and transforms it in a sufficiently similar manner to the manner in which the human handles and transforms data that the human finds it easy and intuitive to operate, all supported by methods that enable data to be stored in a single logical grid structure that can accept and correctly relate, transmit and receive any data, together examples of methods to derive benefits from these inventi
    Type: Application
    Filed: March 11, 2013
    Publication date: August 8, 2013
    Inventor: Peter D. Warren
  • Patent number: 8504984
    Abstract: In general, the subject matter described in this specification can be embodied in methods, systems, and program products for selecting a first grammar rule in a programming language grammar. The grammar is used for determining a syntax validity of a programming code statement in a text editor and the first grammar rule includes a hard-to-type symbol that is syntactically correct for the programming code statement. A second grammar rule for the grammar is created. The created second grammar rule is substantially identical to the first grammar rule but the hard-to-type symbol is replaced with an easy-to-type symbol that is syntactically incorrect for the programming code statement. An action is associated with the grammar and is performed upon satisfying the second grammar rule. Performance of the second grammar rule causes the easy-to-type symbol in the programming code statement in the text editor to be replaced with the hard-to-type symbol.
    Type: Grant
    Filed: May 29, 2009
    Date of Patent: August 6, 2013
    Assignee: Google Inc.
    Inventor: Don Hsi-Yun Yang
  • Patent number: 8505000
    Abstract: There is described a method of compiling source code for a computer program into corresponding object code. The source code includes several declared variables. The method comprises, for each declared variable in the source code, including in the object code a declaration statement indicating an associated memory location for that variable and indicating the position in the object code of the next declaration statement. During compilation, the memory location for each declared variable can be retrieved from the object code by examining each declaration statement in turn, using the position information from each declaration statement to locate the next declaration statement. This is of particular advantage where the available volatile memory is limited, because there is no requirement for a look-up table of variables against memory locations.
    Type: Grant
    Filed: July 24, 2008
    Date of Patent: August 6, 2013
    Assignee: Ezurio Limited
    Inventor: Mahendra Tailor
  • Patent number: 8499290
    Abstract: The present invention extends to methods, systems, and computer program products for creating text functions form a spreadsheet. Embodiments of the invention extract functions from spreadsheets and represent the functions in textual form. Representation in textual form promotes code reuse, clarify, expressive power, and better performance. Text can be rendered in virtually any programming language, such as, for example, C#, C++, Visual Basic (“VB”), etc. In some embodiments, programming language extensibility to support spreadsheet compatible data types and functions is utilized.
    Type: Grant
    Filed: June 15, 2010
    Date of Patent: July 30, 2013
    Assignee: Microsoft Corporation
    Inventors: John Benjamin Messerly, James J. Hugunin, Jonathon Michael Stall, Curt Oliver Hagenlocher
  • Patent number: 8499286
    Abstract: In one embodiment, a method for testing adjustment and configuration is disclosed. The method can include accessing source code of a test framework that is configured for testing a module, creating a configuration folder having a property override for a test suite for the module testing, determining a source root folder for the test suite, starting the test framework by passing in an identifier for the test suite, and adding a custom test to the source root folder using the configuration folder to customize the test suite. The method can further include compiling the test framework with each of the plurality of test folders enabled. The method also may use a refactoring tool to make changes in a file within the test framework.
    Type: Grant
    Filed: July 27, 2010
    Date of Patent: July 30, 2013
    Assignee: salesforce.com, inc.
    Inventors: Steven S. Lawrance, Marcus Ericsson
  • Patent number: 8495599
    Abstract: An apparatus and method for power savings are provided. The apparatus includes a register analysis unit and a register change unit. The register analysis unit determines if registers among bit-switching targeted registers are one of changeable and unchangeable. The register change unit searches for a register pair having a minimum bit switching frequency among registers determined to be changeable, and changes at least one register.
    Type: Grant
    Filed: October 24, 2008
    Date of Patent: July 23, 2013
    Assignee: Samsung Electronics Ltd., Co.
    Inventor: Il-Hyun Cho
  • Patent number: 8495591
    Abstract: Declarations from an input source code are serialized into a stream of tokens produced by following each branch of a preprocessor conditional directive statement that interrupts a declaration. Tokens are labeled with a parsing path indicator corresponding to a parsing path induced by branches of a preprocessor conditional directive. The declarations that are formed along the different parsing paths are serialized by fetching the tokens that belong to the first parsing path in a first pass, and passing the tokens on to a next phase of a compiler. The pointer that marks the next token is repositioned to return to the start of the declaration. The declaration may be serialized again through the second parsing path in a second pass. The operation may be repeated until each of the parsing paths induced by the presence of branches of the preprocessor conditional directives in the source code is exhausted.
    Type: Grant
    Filed: December 12, 2011
    Date of Patent: July 23, 2013
    Assignee: Microsoft Corporation
    Inventor: Thierry Miceli
  • Patent number: 8495593
    Abstract: A state machine program is generated from a state machine. The state machine has states, transitions and events. A basic structure for the state machine program is generated. The basic structure has therein a structure that operates in non-final states. A statement is generated within the structure for detecting an event. A statement is generated within the structure for evaluating the detected event based on a current state to identify if the current state is valid for the detected event. A statement is generated within the structure for determining a next state if the current state is valid. A statement is generated within the structure for transitioning the current state to the next state.
    Type: Grant
    Filed: September 9, 2005
    Date of Patent: July 23, 2013
    Assignee: International Business Machines Corporation
    Inventors: Gregory D Adams, Jonathan David Bennett, Perry Randolph Giffen, Axel Martens, William Gerald O'Farrell
  • Patent number: 8490069
    Abstract: A method for validating a translation of a graphical workflow of activities into an arbitrary, but structured language uses as input a term of a high level graphically expressed language having a number of graphical elements related logically to each other and analyzes its content and/or structure in order to translate this content and/or structure into a structured set of instructions. The graphical workflow of activities is simulated to arrive at a first set of activity results. Each instruction is translated into a generic language in order to trace the execution of such instruction to arrive at a second set of results from the translated instructions. The first set of activity results is compared with the second set of results, and the translation is validated in case of a match among the first set of activity results and the second set of results.
    Type: Grant
    Filed: February 28, 2008
    Date of Patent: July 16, 2013
    Assignee: Siemens Aktiengesellschaft
    Inventor: Marco Solimano
  • Patent number: 8484629
    Abstract: Various technologies and techniques are disclosed for providing a programming model for modular development. A definition feature is provided that allows a definition to be specified for a particular method that is part of an application. A production feature allows a functionality implementation to be specified for the particular method separately from the definition. A consumption feature allows a method call to be made indirectly to the functionality implementation of the particular method by referencing the definition of the particular method from a consuming method. The consuming method has no awareness of the functionality implementation for the particular method. An analysis process inspects components containing indirect associations between these consumers and producers of application functionality to generate a graph of direct associations between the consumers and producers without having to actually load the components. A loader process uses the graph of direct associations to run the application.
    Type: Grant
    Filed: May 24, 2007
    Date of Patent: July 9, 2013
    Assignee: Microsoft Corporation
    Inventors: Patrick Dengler, Oleg Lvovitch, Randy Kimmerly
  • Patent number: 8479170
    Abstract: In one embodiment, analyze client-tier source code of a client-server software application to extract one or more software modules that handle user-input data of the software application. For each one of the software modules, extract from the software module one or more user-input constraints placed on the user-input data, comprising: analyze source code of the software module to determine one or more failure points in the source code; perform symbolic execution on the software module to extract one or more first expressions that cause the software module to reach the failure points, respectively; obtain a second expression as the disjunction of all the first expressions; obtain a third expression as the negation of the second expression; and extract the user-input constraints from the third expression. Determine one or more user-input data that satisfy all the user-input constraints.
    Type: Grant
    Filed: May 12, 2010
    Date of Patent: July 2, 2013
    Assignee: Fujitsu Limited
    Inventors: Mukul R. Prasad, Sreeranga P. Rajan
  • Patent number: 8473937
    Abstract: Selected components of a piece of software serve in a first variant, as variation points, are converted into a first XML code. The software, now in hybrid form, is shipped. The first code is converted on the customer side via one or more transformations, for example SLT, exclusively in accordance with transformation rules into a second XML code. In a second variant, a first XML code containing at least one language extension is converted in accordance with transformation rules into a more easily verifiable second XML code without said language extensions. In a third variant a source code formulated in XML is transformed in such a way that, following a back-conversion into the original programming language, a new source code is produced in which not only the representation, but also the actual program content and/or functionality has been changed.
    Type: Grant
    Filed: March 29, 2004
    Date of Patent: June 25, 2013
    Assignee: Siemens Aktiengesellschaft
    Inventors: Roy Oberhauser, Christian Reichel
  • Patent number: 8473932
    Abstract: Systems and methods that enhance expressibility in a programming language (e.g., Visual Basic) via relaxation of artificial restrictions and extension of delegates associated therewith, without changing the runtime infrastructure. A stub is employed that can replace an impermissible expression in the programming language, to leverage the existing permissible expressions.
    Type: Grant
    Filed: March 1, 2010
    Date of Patent: June 25, 2013
    Assignee: Microsoft Corporation
    Inventors: Henricus Johannes Maria Meijer, Brian C. Beckman, Peter F. Drayton, David N. Schach, Ralf Lammel, Avner Y. Aharoni
  • Patent number: 8468506
    Abstract: A method and system are described for generating reference tables in object code which specify the addresses of branches, routines called, and data references used by routines in the code. In a suitably equipped processing system, the reference tables can be passed to a memory management processor which can open the appropriate memory pages to expedite the retrieval of data referenced in the execution pipeline. The disclosed method and system create such reference tables at the beginning of each routine so that the table can be passed to the memory management processor in a suitably equipped processor. Resulting object code also allows processors lacking a suitable memory management processor to skip the reference table, preserving upward compatibility.
    Type: Grant
    Filed: November 8, 2010
    Date of Patent: June 18, 2013
    Assignee: Micron Technology, Inc.
    Inventor: Dean A. Klein
  • Patent number: 8468505
    Abstract: A state component saves a present state of a program or model. This state component can be invoked by the program or model itself, thereby making state a first-class citizen. As the state of the program evolves from the saved state, the saved state remains for reflection and recall, for example, for testing, verification, transaction processing, etc. Using a state reference token, the saved state of the program or model can be accessed by the program or model. For example, the program or model by utilizing a state component, can return itself to the saved state. After returning to the saved state, a second execution path can be introduced without requiring re-execution of the actions leading to the saved state. In another example, the state space of an executing model is saved in order to generate inputs required to exercise a program or model.
    Type: Grant
    Filed: August 31, 2009
    Date of Patent: June 18, 2013
    Assignee: Microsoft Corporation
    Inventors: Wolfgang Grieskamp, Yuri Gurevich, Wolfram Schulte, Nikolai Tillmann
  • Publication number: 20130152060
    Abstract: A dual evaluation mode method for use with computer software that includes the acts of determining, for certain functions and expressions within input computer code, whether each function and expression may have any recursive dependencies, generating eager evaluation mode executable code for one or more elements of the input computer code based on the act of determining and providing both eager evaluation mode executable code and non-eager evaluation mode executable code to runtime software that supports both eager and non-eager evaluation modes.
    Type: Application
    Filed: February 8, 2013
    Publication date: June 13, 2013
    Applicant: Epic Games, Inc.
    Inventor: Epic Games, Inc.
  • Patent number: 8464208
    Abstract: Systems and methods are described for capturing and utilizing specific module dependency information. A hierarchical model can be created to arrange the components an existing software system in a particular hierarchy. The model defines a priority of dependencies among the components. A tool is provided for analyzing each class file of the system for references to other class files and determining, for each said class file, whether each reference is acceptable according to the hierarchical model. Once the class files and references have been analyzed, a surrogate class file can be automatically generated for the references that are determined to be unacceptable according to the hierarchical model. This process can utilize white lists and black lists associated with the class files, where the white lists specify modules to which references are acceptable and the black lists specify modules to which references are unacceptable.
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: June 11, 2013
    Assignee: Oracle International Corporation
    Inventor: Lawrence Feigen
  • Patent number: 8464229
    Abstract: A method of creating a form-based web application using a computing device having at least a processor, a memory, a display device and an input device. The method includes retrieving from the memory and providing on the display device a number of form icons, each form icon representing a form to be displayed to a user of the application. The method further includes retrieving from said memory and providing on the display device a number of service icons, each service icon representing a service which may be called in response to actions of the user. The method further includes allowing a developer of the application to use the input device to select one or more of the form icons and one or more of the service icons and to arrange the selected icons on the display device.
    Type: Grant
    Filed: December 29, 2009
    Date of Patent: June 11, 2013
    Assignee: Microgen Aptitude Limited
    Inventors: Neil Thomson, Grzegorz Roman Pusz
  • Patent number: 8453132
    Abstract: A technique for reducing non-local access, in dynamically generated code that resides in a code buffer of a non-uniform memory access computer system including multiple nodes, for improving overall performance of dynamic optimization systems. In one example embodiment, this is accomplished by partitioning the code buffer into multiple smaller code buffers and assigning each of the multiple smaller code buffers to one of the multiple nodes. Statically determining which methods in the generated code are executed by a thread and then to place those methods in associated one of the multiple smaller code buffers to reduce memory latencies introduced by non-local accesses.
    Type: Grant
    Filed: June 20, 2007
    Date of Patent: May 28, 2013
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Sandya S. Mannarswamy, Virendra Kumar Mehta, Prakash Sathyanath Raghavendra
  • Publication number: 20130125101
    Abstract: A hostable compiler interacts with a host application to enable the host application to execute program code supported by the hostable compiler. The host application and the hostable compiler exchange data through an interface that allows the hostable compiler to receive type information pertaining to data elements used applications executing within the host application process. This type information may then be used by the hostable compiler in the compilation of source code to infer a type for data elements used in the source code that are not declared yet associated with a value of an expression used in an application executed within the host application process.
    Type: Application
    Filed: November 10, 2011
    Publication date: May 16, 2013
    Applicant: Microsoft Corporation
    Inventor: Joseph Pamer
  • Patent number: 8443348
    Abstract: A runtime system implemented in accordance with the present invention provides an application platform for parallel-processing computer systems. Such a runtime system enables users to leverage the computational power of parallel-processing computer systems to accelerate/optimize numeric and array-intensive computations in their application programs. This enables greatly increased performance of high-performance computing (HPC) applications.
    Type: Grant
    Filed: March 5, 2007
    Date of Patent: May 14, 2013
    Assignee: Google Inc.
    Inventors: Morgan S. McGuire, Christopher G. Demetriou, Brian K. Grant, Matthew N. Papakipos
  • Patent number: 8438550
    Abstract: System and method for implicit downcasting at compile time in a data flow program. A first data flow function in an object-oriented dataflow program is identified, where the first function includes an input of a parent data type and an output of the parent data type. The first function is analyzed to determine if the output preserves the run-time data type of the input. A second dataflow function in the object-oriented data flow program is identified, where the second function includes a program element that calls the first function, passing an input parameter of a child data type of the parent data type as input. If the analysis determines that an output parameter returned by the output of the first function will always be of the child data type, the program element is automatically configured at compile time to always downcast the output parameter from the parent data type to the child data type at run-time.
    Type: Grant
    Filed: May 13, 2010
    Date of Patent: May 7, 2013
    Assignee: National Instruments Corporation
    Inventors: Stephen R. Mercer, Steven W. Rogers
  • Patent number: 8434074
    Abstract: A single instruction multiple data processor may accomplish register allocation by identifying live ranges that have incompatible write masks during compilation. Then, edges are added in an interference graph between live ranges that have incompatible masks so that those live ranges will not be assigned to the same physical register.
    Type: Grant
    Filed: February 24, 2010
    Date of Patent: April 30, 2013
    Assignee: Intel Corporation
    Inventors: Tomasz Janczak, Ben J. Ashbaugh
  • Patent number: 8433701
    Abstract: An embodiment of the system and method for optimizing pattern query searches on a graph database uses a pattern query optimizer to optimize execution of the search plan for any sequence of SQL expressions by separating or breaking a pattern query into multiple subpattern queries before converting the subpattern queries into SQL expressions. An embodiment of the pattern query optimizer algorithmically, without intervention by an analyst, decomposes any pattern query into a set of subpattern queries by first identifying branches and cycles within a pattern query and then decomposing each identified branch and cycle into equivalent straight line paths, i.e., straight line nodes joined by edges. Cardinality may be used to improve the performance of pattern searches.
    Type: Grant
    Filed: November 19, 2010
    Date of Patent: April 30, 2013
    Assignee: 21CT, Inc.
    Inventors: Daniel Sargeant, Morgan Hollinger
  • Patent number: 8429627
    Abstract: System and method for analyzing a graphical program. A graphical program is displayed on a display. A semantic edit operation is performed on the graphical program in response to user input. The semantic edit operation is performed by a first process. Semantic analysis of the graphical program is performed by a second process in response to performing the semantic edit operation, where the second process is asynchronous with respect to the first process. Results from the semantic analysis of the graphical program are displayed in response to completion of the semantic analysis. If during the semantic analysis, another semantic edit operation is performed on the graphical program, the semantic analysis may be preemptively terminated and re-initiated. Displaying results from the semantic analysis of the graphical program may then include displaying results from the re-initiated semantic analysis of the graphical program in response to completion of the re-initiated semantic analysis.
    Type: Grant
    Filed: October 12, 2009
    Date of Patent: April 23, 2013
    Assignee: National Instruments Corporation
    Inventors: David C. Jedlicka, Jeffrey L. Kodosky, Gregory C. Richardson, John D. Stanhope
  • Patent number: 8429637
    Abstract: Disclosed herein are systems, methods, and computer readable-media for obfuscating code through conditional expansion obfuscation. The method includes identifying a conditional expression in a computer program, identifying a sequence of conditional expressions that is semantically equivalent to the conditional expression, and replacing the conditional expression with the semantically equivalent sequence of conditional expressions. One option replaces each like conditional expression in the computer program with a diverse set of sequences of semantically equivalent conditional expressions. A second option rearranges computer instructions that are to be processed after the sequence of conditional expression is evaluated so that a portion of the instructions is performed before the entire sequence of conditional expressions is evaluated. A third option performs conditional expansion obfuscation of a conditional statement in combination with branch extraction obfuscation.
    Type: Grant
    Filed: September 2, 2008
    Date of Patent: April 23, 2013
    Assignee: Apple Inc.
    Inventors: Gideon M. Myles, Tanya Michelle Lattner, Julien Lerouge, Augustin J. Farrugia
  • Patent number: 8429634
    Abstract: A semiconductor device has an arithmetic processing circuit provided with an arithmetic circuit and a control circuit and a memory circuit provided with a ROM and a RAM, where the arithmetic processing circuit and the memory circuit are connected to each other through an address bus and a data bus, a machine language program executed using the arithmetic processing circuit is stored in the ROM, the RAM has a plurality of banks, processing data obtained by executing the machine language program is divided into a plurality of stacks to be written to the plurality of banks, and the arithmetic processing circuit is operated in accordance with the machine language program so that, in the plurality of stacks stored in the plurality of banks, a stack of which data is not used until the machine language program is terminated is omitted and contiguous stacks are written to the same bank.
    Type: Grant
    Filed: July 25, 2007
    Date of Patent: April 23, 2013
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroki Dembo, Yoshiyuki Kurokawa, Masami Endo
  • Patent number: 8418148
    Abstract: A thread execution analyzer analyzes blocking events of threads in a program using execution data and callstacks collected at the blocking events. The thread execution analyzer attempts to identify an application programming interface (API) responsible for each blocking event and provides blocking analysis information to a user. The blocking analysis information may be used by a developer of the program to understand the causes of blocking events that occur for threads of the program.
    Type: Grant
    Filed: February 27, 2009
    Date of Patent: April 9, 2013
    Assignee: Microsoft Corporation
    Inventors: Hazim Shafi, Brian Adelberg, Khaled S. Sedky
  • Patent number: 8418151
    Abstract: A process for providing a simulated date and/or time to a time-sensitive application is disclosed herein. Such a process may include detecting the invocation of a time handler method configured to retrieve system time. Upon detecting the invocation, the contents of a call stack may be captured and analyzed to determine which requestor method initiated the invocation. The process may then determine whether the requestor method should receive a real or simulated system time. A real system time may be returned to the requestor method in the event it should receive the real system time. A simulated system time may be returned to the requestor method in the event it should receive the simulated system time. A corresponding apparatus and computer program product are also disclosed and claimed herein.
    Type: Grant
    Filed: March 27, 2012
    Date of Patent: April 9, 2013
    Assignee: International Business Machines Corporation
    Inventors: Trent A. Gray-Donald, Marc Warner Price
  • Patent number: 8418160
    Abstract: A method to selectively remove memoizing functions from computer program code includes initially locating a memoizing function call in the program code. The method then replaces the memoizing function call with a simple object allocation. Using escape analysis, the method determines whether the replacement is legal. If the replacement is not legal, the method removes the simple object allocation and reinserts the original memoizing function call in its place. If the replacement is legal, the method retains the simple object allocation in the program code. If desired, certain compiler optimizations, such as stack allocation and scalarization, may then be performed on the simple object allocation. A corresponding computer program product and apparatus are also disclosed.
    Type: Grant
    Filed: October 13, 2010
    Date of Patent: April 9, 2013
    Assignee: International Business Machines Corporation
    Inventor: Patrick R. Doyle
  • Patent number: 8412721
    Abstract: A query controller accesses a cache comprising information related to data that is newly added to a database, responsive to detecting a data extraction application is ready to query the database for at least one data extraction rule. The information is added to the cache for each new data event received by a data processing application, prior to the data processing application adding the data parsed from each new data event to the database. The query controller evaluates each data extraction rule against the information in the cache to determine whether the information is relevant to at least one data extraction rule.
    Type: Grant
    Filed: July 29, 2011
    Date of Patent: April 2, 2013
    Assignee: International Business Machines Corporation
    Inventors: Kerry R. Gunn, Vernon Murdoch
  • Patent number: 8413124
    Abstract: A system and method for compiling and matching regular expressions is disclosed. The regular expression compiling system includes a syntax analyzing module and at least two types of compiling modules. The syntax analyzing module is configured to analyze syntactic characteristics of a regular expression and send the regular expression to an appropriate compiling module according to preset syntactic rules and the syntactic characteristics of the regular expression; and the appropriate compiling module is configured to receive the regular expression and compile the regular expression into a data structure of a specific form.
    Type: Grant
    Filed: January 29, 2010
    Date of Patent: April 2, 2013
    Assignee: Huawei Technologies Co., Ltd.
    Inventor: Hao Wang
  • Patent number: 8407681
    Abstract: A system and associated method for changing the initial size of a variable where intermediate code contains a static method class which in turn contains the initial size of variable. Comparing a statistic with the initial size of the variable, the statistic being derived from all current instances of the variable contained in located in dynamic memory, the comparing being performed in response to an event having occurred. Then modifying the initial size of the variable located in the intermediate code. The modification being in such a way as to change the initial size of variable in dependence of the statistic and all current instances of the variable located in the dynamic memory. Finally, repeating the comparing and changing steps for all variables contained in the dynamic memory.
    Type: Grant
    Filed: May 23, 2008
    Date of Patent: March 26, 2013
    Assignee: International Business Machines Corporation
    Inventor: Edward Slattery