Abstract: In one example, a system for modifying applications to support incremental checkpoints can include logic to generate a dominator tree based on a control flow graph for source code, wherein the control flow graph and the dominator tree comprise a plurality of nodes corresponding to basic blocks of the source code. The processor can select a region based on a leaf node of the dominator tree, the region based on an instruction threshold, and insert a first set of commit instructions into the source code based on entry points into the region and insert a second set of commit instructions into the source code based on exit points from the region. The processor can update the dominator tree to exclude the selected region and compile the source code into an executable application, wherein the first set of commit instructions and the second set of commit instructions enable incremental checkpoints.

Abstract: A source code search comprises a two-pass search. The first pass comprises a topological measure of similarity. The second pass comprises a semantic measure of similarity. The query source code is a user-selected portion of source code. The results may be ranked and output to an I/O device.

Abstract: Described herein are technologies pertaining to semantic baselining. Correctness conditions of a baseline program are inferred based upon a first static analysis undertaken over the baseline program. The correctness conditions are subsequently inserted into a revision to the baseline program. When a second static analysis is undertaken over the revised program with the correctness conditions inserted therein, warnings inherited from the baseline program are suppressed, while warnings caused by revisions are surfaced to a developer.

Abstract: Embodiments are directed to assigning a home memory location for a function call parameter. A method may include determining whether a caller is configured to allocate a memory location for a parameter passed to a callee. The caller is a module that includes a function call to the callee and the callee is a function. The method may include inserting instructions in the callee to allocate a home memory location for the parameter in response to determining that the caller is not configured to allocate a memory location for the parameter. In addition, the method may include inserting instructions in the callee to set the memory location as a home location for the parameter in response to determining that the caller is configured to allocate a memory location for the parameter.

Abstract: A method is provided of performing register allocation for at least one program code module. The method includes constructing a restriction graph for program variables within at least one program instruction, and determining whether the constructed restriction graph is colorable. If it is determined that the constructed restriction graph is not colorable, then the method determines whether at least one alternative form of the at least one program instruction is available, and modifies the at least one program instruction to comprise an alternative form if it is determined that at least one alternative form is available.

Abstract: Disclosed herein is a system and method for optimizing a developer's ability to find and navigate relevant documents, relationships, and other information related to an identifier in the code they are developing. An inline viewport is presented to the user in response to the user selecting an identifier in the code whereby the user is able to see relevant information related to the identifier in a spatially consistent location with the code they are investigating. The developer further has the ability to cascade the viewports such that multiple levels of depth of relationships can be viewed in the viewport.

Abstract: Methods, systems, and apparatus, including computer programs encoded on computer storage media, for generating efficient compiled code. In an example method, a compilation system obtains an un-optimized computational graph comprising a plurality of nodes representing operations and directed edges representing data dependencies. The un-optimized computational graph is analyzed using pattern matching to determine fusable operations that can be fused together into a single fusion operation. The un-optimized computational graph is transformed into an optimized computational graph by replacing the nodes representing the fusable operations in the un-optimized computational graph with a fusion node representing the single fusion operation. The compilation system produces efficient code by translating the fusion node of the optimized computational graph as a call that performs the fused operations.

Abstract: Embodiments are directed to assigning a home memory location for a function call parameter. A method may include determining whether a caller is configured to allocate a memory location for a parameter passed to a callee. The caller is a module that includes a function call to the callee and the callee is a function. The method may include inserting instructions in the callee to allocate a home memory location for the parameter in response to determining that the caller is not configured to allocate a memory location for the parameter. In addition, the method may include inserting instructions in the callee to set the memory location as a home location for the parameter in response to determining that the caller is configured to allocate a memory location for the parameter.

Abstract: A method is implemented in a computer infrastructure having computer executable code tangibly embodied on a computer readable storage medium having programming instructions. The programming instructions are operable to receive a tool error output determined by a code inspection tool and select at least one defect classification mapping profile based on the code inspection tool. Additionally, the programming instructions are operable to map the tool error output to one or more output classifications using the selected at least one defect classification mapping profile and generate at least one report based on the one or more output classifications.

Abstract: One or more processors determine whether a first procedure within a first program meets a first criterion. The first criterion is included in a plurality of criteria that are configured for pessimistic aliasing. Responsive to the determination, one or more processors determine whether to flag the first procedure for pessimistic aliasing.

Abstract: One or more processors determine whether a first procedure within a first program meets a first criterion. The first criterion is included in a plurality of criteria that are configured for pessimistic aliasing. Responsive to the determination, one or more processors determine whether to flag the first procedure for pessimistic aliasing.

Abstract: An embodiment method of global scope basic-block reordering includes profiling an application having a source code decomposable into a plurality of basic-blocks. The profiling yields a global basic-block sequence. The method also includes generating a hierarchical locality model according to the global basic-block sequence. The method also includes generating a target code according to the hierarchical locality model.

Abstract: Provided is an application architecture design method in which an information processing device is used, the method including the steps of: inputting information about dependency relations and design aspects, which are design items regarding modules for running functions, virtual machines for running the modules, and physical machines for running the virtual machines; and executing processing of adapting architecture properly by switching the input information about the dependency relations and the design aspects in matrices in a DSM format, and thereby rearranging allocation of the modules, allocation of the virtual machines, and allocation of the physical machines in stages in the DSM format. As a result, an excellent design solution for architecture suitable for a virtualized environment, a cloud environment deriving, or a similar environment can be derived.

Abstract: Systems and methods for utilizing relation- and query-specific information to specialize DBMS code at runtime based on identifying runtime locally invariant variables. Runtime invariant is often of the form of variables in code that hold values that are constant during a portion of code execution. Micro-specialization is applied to eliminate from the original program unnecessary code such as branching statements that reference local invariant(s) in branch-condition evaluation. The resulting specialized code reduces the code complexity as well as significantly improves the runtime efficiency during code execution.

Abstract: Provided is a multi-module compilation system for generating execution codes for each of modules in a module system. The multi-module compilation system may include a module identifier configured to analyze a program code of the module system and to identify target modules that execute the program code, a module code generator configured to divide the program code into module codes for each of the target modules and to generate the module codes, and a compiler configured to compile the module codes and to generate execution codes for each of the target modules.

Abstract: Aspects are directed to obtaining context information for a software development task. A method includes finding, in response to designating any one tool component associated with the software development task as a root component, at least one other tool component having an at least one-level link with the root component. Context information is extracted n from the root component and the at least one other tool component. A context set is generated based on the extracted context information.

Abstract: Systems and methods for determining a payment to a contributor are provided herein. Methods may include determining the contributor of a portion of software in a collaborative work; tracking the number of times the portion of software is used in a collaborative work; determining a weighting for each contributed portion of software; and calculating the proportional payment to each contributor based on the weighing and an income from the collaborative work.

Abstract: A method for automatically analyzing formulas and adding pattern annotations to quantifiers based on a database of common pattern idioms. The method involves matching base pattern inference for Satisfiability Modulo Theories (SMT) solvers. The method uses a database for fault detection in externally supplied pattern annotated formulas. The method also uses matching code trees to mixed second-order pattern matching.

Abstract: Systems and methods for enhancing performance of programs implemented on an integrated circuit (IC) are provided. A forward-flow selector may determine a common branch for adding a data set to and removing a data set from. By selecting a common branch for adding and removing a data set, there will be a pipeline stage for data flowing into the branch. Accordingly, the embodiments described herein enhance throughput by increasing the number of datasets that may enter a branched pipeline without stalling.

Abstract: A method, executed by a computer, for splitting live register ranges includes identifying one or more H pathways comprising one or more H nodes having high register pressure using a backwards data flow in the graph, identifying an L pathway consisting of two or more L nodes using a depth first search, and inserting register splitting instructions for each symbolic register that is live in both the one or more H pathways and the L pathway. The register splitting instructions are inserted at a starting node of the one or more H pathways. Register merging instructions are inserted at an ending node of the one or more H pathways.

Abstract: This disclosure describes techniques for allocating registers in a computing system that supports vector physical registers. The techniques for allocating registers may allocate physical registers to vector virtual registers based on priority information that is indicative of a relative importance of allocating respective vector virtual registers as vectors rather than scalars. The techniques for allocating registers may involve allocating physical registers to the vector virtual registers in an order that is determined based on the priority information.

Abstract: Embodiments of the invention provide systems and methods for automatically and adaptively optimizing compilation of application code using a rule-based optimization analyzer (RUBOA) that can command a compiler to apply and adapt optimizations at the code segment level according to gathered performance data. For example, source code can be canonically compiled, and annotations can associate compiled code sections with source code sections. The generated binary can then be executed and monitored to gather performance characteristics. The RUBOA can apply the gathered performance characteristics and annotations to a pre-defined rule set to generate compiler optimizations, each associated with and parametrically tailored to respective source code segments.

Abstract: A nominal type framework can be configured to efficiently correlate different nominal types together based on a minimum set of common type shapes or structures. In one implementation, a developer identifies a number of different nominal types of interest (source types), and identifies the minimum set of common type shapes to be accessed by an application program. The minimum set of common type shapes can then be used to create an intermediate type (target type) to which each of the other different source types can be mapped. For example, one or more proxies can be created that map shapes of the one or more source types to corresponding shapes of the created target type. The application program created by the developer, in turn, can access, operate on, or otherwise use the mapped data of each different source type through a single target type.

Abstract: The invention pertains to an optimization method for a compiler, comprising providing a model of inter-operand constraints of physical registers of a target-platform of a compilation; and a) providing an intermediate representation of a source code using virtual registers; b) grouping the virtual registers of the intermediate representation based on the model of inter-operand constraints into two or more groups, each group comprising at least one virtual register; c) if for at least one group at least one interference of virtual registers within the group occurs, amending the intermediate representation to resolve at least one interference and jumping to step b); otherwise d) providing a representation of a group interference graph of interferences between the groups; and e) allocating virtual registers to physical registers using a coloring scheme on the representation of the group interference graph.

Abstract: The present invention generally relates to a method for describing network events in a service aware network (“SAN”). In addition, the present invention relates to software that performs the method and has a programming model containing protocol libraries, abstract protocol messages declarations, and network events. The method and software enable a user to define basic as well as complex network events in the application, presentation, session, transport and/or network layers of a communication model, which result in internet protocol (“IP”) level triggers or other triggers. Such triggers will result in actions which may be applicable in all layers of a communication model up to the highest layer. As a result, the method and software allow a user to describe a hierarchy of high level network events through a hierarchy of lower level events. In addition, a development system and an apparatus which utilizes the method and software are also provided.

Abstract: A stream processing platform that provides fast execution of stream processing applications within a safe runtime environment. The platform includes a stream compiler that converts a representation of a stream processing application into executable program modules for a safe environment. The platform allows users to specify aspects of the program that contribute to generation of modules that execute as intended. A user may specify aspects to control a type of implementation for loops, order of execution for parallel paths, whether multiple instances of an operation can be performed in parallel or whether certain operations should be executed in separate threads. In addition, the stream compiler may generate executable modules in a way that cause a safe runtime environment to allocate memory or otherwise operate efficiently.

Abstract: The facilitated computation of an available symbol set at code locations in a dynamic language program, in which the program is executed up to a particular halt point for which an available symbol set is to be generated. At the halt point, a type of a value of a particular variable may be used in order to generate the available symbol set. However, at the halt point, the variable does not yet have a value of a useful type (e.g., null or undefined), which is possible in a dynamic language program. Rather than return an error, the principles described herein result in return of an available symbol set anyway. Specifically, the variable had previously been annotated with information representing accessed type information for the variable, even though the variable has not formally been defined. This annotated information may be used to generate the available symbol set.

Abstract: The present invention discloses a XSS detection method for detecting the XSS vulnerabilities in a web page, comprising for each parameter-value pair in a set of parameter-value pairs that can be accepted by the web page: constructing a parameter-value pair in which a dedicated script is inserted; assembling a URL corresponding to the web page based on the parameter-value pair in which a dedicated script is inserted; acquiring the dynamic web page content corresponding to the assembled URL; and simulating the execution of the acquired dynamic web page content, if the dedicated script is executed, it is determined that the processing of the parameter in the web page contains XSS vulnerabilities. The present invention further discloses a corresponding XSS detection device and a web site security scanning system and a web scanning system using such a device.

Abstract: A method, computer program product, and computer system for analyzing code to improve efficiency of simulating a hardware system. A computer identifies one or more functions calling an application programming interface of a hardware simulator simulating the hardware system. In response to determining that left hand sides of respective one or more Boolean expressions are associated with the one or more functions calling the application programming interface and right hand sides are not associated with the one or more functions calling the application programming interface, the computer identifies the respective one or more Boolean expressions as one or more improvement points in source code for verifying a hardware model of the hardware system.

Abstract: An intelligent network interface card (INIC) or communication processing device (CPD) works with a host computer for data communication. The device provides a fast-path that avoids protocol processing for most messages, greatly accelerating data transfer and offloading time-intensive processing tasks from the host CPU. The host retains a fallback processing capability for messages that do not fit fast-path criteria, with the device providing assistance such as validation even for slow-path messages, and messages being selected for either fast-path or slow-path processing. A context for a connection is defined that allows the device to move data, free of headers, directly to or from a destination or source in the host. The context can be passed back to the host for message processing by the host. The device contains specialized hardware circuits that are much faster at their specific tasks than a general purpose CPU.

Abstract: One embodiment of the present invention sets forth a technique for translating application programs written using a parallel programming model for execution on multi-core graphics processing unit (GPU) for execution by general purpose central processing unit (CPU). Portions of the application program that rely on specific features of the multi-core GPU are converted by a translator for execution by a general purpose CPU. The application program is partitioned into regions of synchronization independent instructions. The instructions are classified as convergent or divergent and divergent memory references that are shared between regions are replicated. Thread loops are inserted to ensure correct sharing of memory between various threads during execution by the general purpose CPU.

Abstract: According to one embodiment, a code optimizer is configured to receive first code having a program loop implemented with scalar instructions to store values of a first array to a second array based on values of a third array and to generate second code representing the program loop using at least one vector instruction. The second code include a shuffle instruction to shuffle elements of the first array based on the third array using a shuffle table in a vector manner, a blend instruction to blend the shuffled elements of the first array using a blend table in a vector manner, and a store instruction to store the blended elements of the first array in the second array.

Abstract: Provided is an apparatus and method for generating code overlay capable of minimizing the number of memory copies. A static temporal relationship graph (STRG) is generated in which each of functions of a program corresponds to a node of the STRG and a conflict miss value corresponds to an edge of the STRG. The conflict miss value is the maximum number of possible conflict misses between functions. Overlay is generated by selecting at least one function from the STRG, calculating an allocation cost for each region of a memory to be given when the at least one selected function is allocated, and allocating the at least one selected function to a region that has the smallest allocation cost.

Abstract: Use of an Abstract Syntax Tree (AST) to select portions of source code when analyzing the affect of changes in that source code from one version to another. In this way, it is possible to better focus on how changes in the source code, especially changes which only impact limited portion(s) of the source code, affect code quality with respect to measures like code complexity, performance and so on.

Abstract: Embodiments of the invention relate to test case maintenance for user interfaces. In one embodiment, user source and test cases are linked for test case maintenance. A link is determined to have been created between a user interface and at least one test script. The test script includes a set of test instructions. The user interface includes a set of user interface elements. Each test instruction is run against the user interface. Mapping information for each test instruction is generated. A change is determined to have occurred in at least one of the user interface and the test script. In response to a change having occurred to the user interface, at least one test instruction affected by the change is identified. In response to a change having occurred to the test script, at least one user interface element affected by the change to the test script is identified.

Abstract: A system that enables end-users who are not skilled in the art of traditional computer programming to intuitively program, configure and manage computers and devices and/or systems that contain many computers and devices. End-users connect graphical parts using graphical wires using a graphical user interface. The timing of the messages that are carried in the wires that connect the parts is deterministic, consistent and intuitive to the end-user. Parts and their user-configurable features are typically designed, fully tested and certified by the original equipment manufacturer or independent software vendor. This invention relates to ubiquitous computing, a model of human-computer interaction in which information processing has been thoroughly integrated into everyday objects and activities associated with those objects.

Abstract: A computer based method, system and apparatus specify graphical concrete syntax in a modeling language. The invention system declaratively describes the graphical concrete syntax of a diagram of a subject model. A mapping engine maps between (i) the graphical concrete syntax and (ii) the abstract syntax and corresponding diagram interchange syntax of the subject model. The declarative descriptions define structure of the graphical concrete syntax rather than a rendering (painting) logic of the graphical concrete syntax.

Abstract: A system that implements a memory management policy at runtime when receiving a syntax tree in response to initiating the compiling of software code identifies a plurality of calls within the syntax tree and modifies each the plurality of calls with a corresponding memory-modified call to create a plurality of memory-modified calls. Each memory-modified call is linked with a memory management class and the modifying occurs during the compiling of the software code. Following modification of each of the plurality of calls, the system compiles the plurality of memory-modified calls to generate a bytecode.

Abstract: A system and method for performing functional decomposition of a software design to generate a computer-executable finite state machine. Initially, the software design is received in a form wherein functions in the software design are repetitively decomposed into (1) data and control transformations. Included between the functions are control flow indicators which have transformation-selection conditions associated therewith. The data transformations and the control transformations are translated into states in the finite state machine. The transformation-selection conditions associated with the control transformations are translated into state transitions in the finite state machine.

Abstract: A parallelization method, system and program. A program expressed by a block diagram or the like is divided into strands and a balance in calculation time is made among the strands. The functional blocks are divided into strands and the strand involving the maximum calculation time from a strand set is found. One or more movable blocks in the strand involving the maximum calculation time is found. The next step is obtaining calculation time of each strand after the movable block is moved to the strand in the input or output direction according to its property, and moving the block to a strand most largely reducing the calculation time of the strand having the maximum calculation time before the movement. This process loops until calculation time is no longer reduced. Strands are then transformed into source codes. Source codes are compiled and assigned to separate cores or processors for execution.

Abstract: Embodiments of the invention relate to test case maintenance for user interfaces. In one embodiment, user source and test cases are linked for test case maintenance. A link is determined to have been created between a user interface and at least one test script. The test script includes a set of test instructions. The user interface includes a set of user interface elements. Each test instruction is run against the user interface. Mapping information for each test instruction is generated. A change is determined to have occurred in at least one of the user interface and the test script. In response to a change having occurred to the user interface, at least one test instruction affected by the change is identified. In response to a change having occurred to the test script, at least one user interface element affected by the change to the test script is identified.

Abstract: An information processing apparatus generates first and second operation trees representing a dependency relationship among the instructions included in a first code, and computes first and second operation sequences from the first and second operation trees. Then, the information processing apparatus computes the longest ones of operation subsequences common to the first and second operation sequences, evaluates, for each longest operation subsequence, the utilization of computing resources used for executing the combinations of instructions of the first and second operation trees corresponding to the operations included in the longest operation subsequence, and selects a combination pattern of instructions indicated by any one of the longest operation subsequences on the basis of the evaluation results.

Abstract: The present disclosure relates to a method and system for file processing. The file processing method may include the steps of scanning a source files, identifying a target code block, and generating a first abstract syntax tree (AST) reflecting the structure of the target code block. The file processing method may further include the steps of identifying a position to place a plugin code, placing the plugin code into the first AST, generating a second AST reflecting the structure of the target code block with the plugin code, and using the write-back interface to write the second AST into the source file. The present disclosure may improve the efficiency and enhance the flexibility of the file processing system.

Abstract: A method for speculative object shapes comprises obtaining values for objects of a first and second shape, determining, by a processor and during runtime, a first speculative type for the first value and a second speculative type for the second value, generating, based on the first speculative type and the second speculative type, a shape tree comprising a first subtree for the first shape and a second subtree for the second shape, marking, by the processor, the first subtree as obsolete based on a determination that the first speculative type is incorrect and that the second shape is a super shape of the first shape, and transforming, in response to marking, the first object from the first shape to the second shape by: merging the first subtree into the second subtree.

Abstract: Abstract Syntax Trees (ASTs) are generated using the source code of a programming language that include information relating to the structure of the program. The generation of the ASTs may be performed in parallel. The types are split into a number of modules (e.g. configurable) that form an assembly. During the different stages of the compilation process, each module may be compiled in parallel. As the different modules are being compiled (e.g. in parallel), compiler metadata from the different modules may be written to a repository accessible by the different compilation processes. After flowing through the compilation pipeline, each of the enriched ASTs are used for code generation where they are transformed into the target language (e.g. a code stream that can be executed on hardware). The executable code is then stored as part of the assembly. The storage of the code may also be performed in parallel.

Abstract: A system and computer implemented method includes receiving an input file containing a mark-up language based description of a syntax diagram having multiple elements and variations for multiple elements describing a set of test case queries, checking and validating the syntax diagram via a parser running on a processor, and generating and storing, on a computer readable medium, the set of test case queries by calculating permutations of the elements in the syntax diagram.

Abstract: There are provided methods and computer program products for generating code for an architecture encoding an extended register specification. A method for generating code for a fixed-width instruction set includes identifying a non-contiguous register specifier. The method further includes generating a fixed-width instruction word that includes the non-contiguous register specifier.

Abstract: A compiler for compiling a server application is disclosed wherein the server is configured to automatically generate an API (Application Programing Interface) for use is a client device. The API allows communication between the client device and the compiled server application.

Abstract: A method for generating a binary executable of a program so that private symbols in a module are accessible from another module. In one embodiment, the method compiles a source program to an intermediate representation and scans the representation to find the private symbols in the program's modules. It then wraps a function around each private symbol. When called, the function returns an address of the private symbol, so that the other module can access the symbol from outside the module in which the symbol is found. At run time, a call is made to obtain the address of the function, which is then executed to obtain the address of the private symbol so that the symbol can be accessed. In another embodiment, a Just-In-Time compiler executes the wrapper functions and patches the executable program with the direct address of the private symbol to avoid a call to the wrapper function.

Abstract: A matching library of a code analysis system defines a number of predicates applicable to an abstract syntax tree (AST) corresponding to program code being analyzed. The predicates represent whether or not nodes of the program code's AST have corresponding properties, such as representing a class that inherits from another given class. The code analysis system obtains an AST to analyze, a predicate expression query that includes predicates of the matching library, and action code. The code analysis system identifies nodes of the AST that match the predicate expression query by executing code of the matching library and executes the action code against the identified nodes.