Using Procedure Or Function Call Graph Patents (Class 717/157)
  • Patent number: 8898197
    Abstract: A method and apparatus for generating a data structure. A plurality of entity reference relationship structures is accessed. Each entity reference relationship structure establishes a relationship between a different pair of entity structures of a plurality of entity structures. Each path from a first vertex to a second vertex that corresponds to a second entity structure is determined. For each path, all coupled sets of pairs of entity instance identifiers, wherein each coupled set comprises a pair of entity instance identifiers from each entity reference relationship structure corresponding to the path are identified. For each coupled set, a first entity instance identifier in the each coupled set that refers to the first entity structure and a second entity instance identifier in the each coupled set that refers to the second entity structure are stored in association with one another in a new entity reference relationship structure.
    Type: Grant
    Filed: May 23, 2011
    Date of Patent: November 25, 2014
    Inventor: Bhargav Senjalia
  • Patent number: 8893102
    Abstract: In general, in one aspect, the invention relates to a method for static analysis. The method includes: obtaining source code; constructing a control flow graph (CFG) corresponding to the source code, by identifying control structures within the source code, creating a set of graph nodes of the CFG, and creating a set of directed graph edges of the CFG connecting the set of graph nodes; assigning a first Boolean flow value to a selected node of the set of graph nodes; backward traversing the CFG from the selected node to a target node; computing, by a computer processor and while backward traversing the CFG, disjoint predicate expressions representing flow values at the set of directed graph edges; computing, based on the disjoint predicate expressions, a resulting disjoint predicate expression; and identifying, based on the resulting disjoint predicate expression, a potential program property in the source code.
    Type: Grant
    Filed: July 27, 2011
    Date of Patent: November 18, 2014
    Assignee: Oracle International Corporation
    Inventors: Nathan Robert Albert Keynes, Cristina N. Cifuentes, Lian Li
  • Patent number: 8868370
    Abstract: The present invention is a sample analyzing system, including a sample analyzer and a management apparatus connected to the sample analyzer via a communication network. The management apparatus includes: a first memory that stores a computer program for the sample analyzer and manual data which corresponds to a version of the computer program; a first communication device; and a first controller configured to transmit, via the first communication device to the sample analyzer, the computer program and the manual data corresponding to the version of the computer program stored in the first memory. The sample analyzer includes: a second communication device; a second memory that stores the computer program and the manual data received by the second communication device; and a second controller configured to execute the computer program stored in the second memory.
    Type: Grant
    Filed: September 22, 2011
    Date of Patent: October 21, 2014
    Assignee: Sysmex Corporation
    Inventors: Naoki Shindo, Yusuke Suga, Aya Konishi, Daigo Fukuma, Keisuke Kuwano
  • Patent number: 8863093
    Abstract: A method to instrument program code for a virtual machine that comprises, in the course of loading a class to a virtual machine, adding code to the class to declare a field that corresponds to a field declared in a first bootstrap class.
    Type: Grant
    Filed: March 6, 2009
    Date of Patent: October 14, 2014
    Assignee: Coverity, Inc.
    Inventors: Andy Chou, John Kodumal
  • Patent number: 8856767
    Abstract: A system and method for monitoring the performance and execution flow of a target application and generating a corresponding data model are provided. The system and method comprise attaching to a thread or process of a target application and tracking the execution of subroutines using instrumentation commands. Data representing the execution flow of the various subroutines, subroutine calls, and their performance is gathered and used to generate data models representing the threads and processes of the application. The data models are optionally merged and/or pruned. A visualization of the data models is generated indicating relevant points of interest within the target application's execution flow.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: October 7, 2014
    Assignee: Yahoo! Inc.
    Inventors: Rohit Jalan, Arun Kejariwal
  • Patent number: 8856809
    Abstract: A computer implemented method, apparatus, and computer usable program product for processing application code. In one embodiment, a call is received to invoke a set of methods of annotated application code. The annotated application code includes a set of annotations specifying a selection of the set of methods. A selected method from the set of methods is invoked in response to determining that the call is valid according to the set of annotations. Thereafter, a subsequent set of valid methods for execution is identified based upon an annotation associated with the selected method.
    Type: Grant
    Filed: March 19, 2008
    Date of Patent: October 7, 2014
    Assignee: International Business Machines Corporation
    Inventors: Francisco Phelan Curbera, Matthew J. Duftler, Michael Levi Fraenkel, Rania Y. Khalaf, Axel Martens, Johannes Riemer, Gal Shachor
  • Patent number: 8850410
    Abstract: A system and method for improving software maintainability, performance, and/or security by associating a unique marker to each software code-block; the system comprising of a plurality of processors, a plurality of code-blocks, and a marker associated with each code-block. The system may also include a special hardware register (code-block marker hardware register) in each processor for identifying the markers of the code-blocks executed by the processor, without changing any of the plurality of code-blocks.
    Type: Grant
    Filed: January 29, 2010
    Date of Patent: September 30, 2014
    Assignee: International Business Machines Corporation
    Inventors: Ramanjaneya S. Burugula, Joefon Jann, Pratap C. Pattnaik
  • Publication number: 20140282454
    Abstract: Methods and apparatus for managing stack data in multi-core processors having scratchpad memory or limited local memory. In one embodiment, stack data management calls are inserted into software in accordance with an integer linear programming formulation and a smart stack data management heuristic. In another embodiment, stack management and pointer management functions are inserted before and after function calls and pointer references, respectively. The calls may be inserted in an automated fashion by a compiler utilizing an optimized stack data management runtime library.
    Type: Application
    Filed: March 7, 2014
    Publication date: September 18, 2014
    Applicant: Arizona Board of Regents, a body corporate of the State of Arizona, acting for and on behalf of Ariz
    Inventors: Ke Bai, Aviral Shrivastava, Jing Lu
  • Patent number: 8813044
    Abstract: A method, system, and article of manufacture are disclosed for transforming a definition of a process for delivering a service. This service process definition is comprised of computer readable code. The method comprises the steps of expressing a given set of assumptions in a computer readable code; and transforming said process definition by using a processing unit to apply said assumptions to said process definition to change the configuration of the process definition. The process definition may be transformed by using factors relating to the specific context in or for which the process definition is executed. Also, the process definition may be transformed by identifying, in a flow diagram for the service process definition, flows to which the assumptions apply, and applying program rewriting techniques to those identified flows.
    Type: Grant
    Filed: September 6, 2012
    Date of Patent: August 19, 2014
    Assignee: International Business Machines Corporation
    Inventors: David F. Bantz, Steven J. Mastrianni, James R. Moulic, Dennis G. Shea
  • Patent number: 8813054
    Abstract: A parallel-code optimization system includes a siloed program reference-identifier and an intermediate representation (IR) updater. The siloed program reference identifier determines siloed program references in parallel code, wherein siloed program references are free of cross-thread interference. The IR updater modifies data-flow abstractions based on the identified siloed program references.
    Type: Grant
    Filed: December 13, 2010
    Date of Patent: August 19, 2014
    Assignee: Hewlett-Packard Development Company, L. P.
    Inventors: Pramod G. Joisha, Robert Samuel Schreiber, Prithviraj Banerjee, Hans Boehm, Dhruva R. Chakrabarti
  • Patent number: 8799852
    Abstract: System and method for performing program-related operations over a network via a web browser. A network connection is established between a server computer and a client computer over a network. A universal resource identifier (URI) is sent from the client computer to the server computer over the network, where the URI indicates a program, e.g., a graphical program (GP), or at least a portion of a graphical program interactive development environment (GPIDE), e.g., a graphical program editor, an execution engine, a static or dynamic analyzer, and/or compiler. The at least a portion of the GPIDE is received from the server computer over the network in response to the URI, and executed in a web browser of the client computer to perform some specified functionality with respect to the GP.
    Type: Grant
    Filed: October 2, 2009
    Date of Patent: August 5, 2014
    Assignee: National Instruments Corporation
    Inventor: Mohammed Kamran Shah
  • Patent number: 8793673
    Abstract: An illustrative embodiment provides a computer-implemented process for algorithm complexity identification through inter-procedural data flow analysis receives a call graph to form a set of received nodes in a static analysis framework, identifies a parent node in the set of received nodes to form an identified parent, traverses the call graph from the identified parent node to a node to identify a function within the node to form an identified function. Each identified function is analyzed to form a complexity value in a set of complexity values. Responsive to a determination that node analysis is complete, and responsive to a determination that path analysis is complete, determines whether path analysis for the identified parent is complete. Responsive to a determination that path analysis for the identified parent is complete, sum the complexity values in the set of complexity values for the identified parent and return the complexity value for the identified parent to a requester.
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: July 29, 2014
    Assignee: International Business Machines Corporation
    Inventors: Steven J. Gutz, Mohammed Mostafa, Joshua P. Tessier
  • Patent number: 8789022
    Abstract: Methods and apparatus for automatically generating translation programs for translating computing services templates to service blueprints are disclosed. An example method includes generating a population of translation logic elements from a plurality of verified computing services template translation programs, where each of the verified programs is configured to correctly translate at least one computing services template of a plurality of known templates to a respective service blueprint. The example method further includes identifying a new computing services template and programmatically augmenting the population of translation logic elements. The example method also includes generating one or more additional translation programs based on the augmented population of translation logic elements and validating each of the one or more additional computing services template translation programs.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: July 22, 2014
    Assignee: BMC Software, Inc.
    Inventor: Atanu Neogi
  • Patent number: 8775769
    Abstract: A partition-based method for diagnosing memory leaks in Java systems, comprising dividing heap memory of a Java virtual machine into a plurality of partitions based on a partition plan, wherein each partition has at least one partition owner; monitoring the status of the respective partitions to determine whether there is a partition in which the memory space is exhausted; and if there is a partition in which the memory space is exhausted, determining that the memory leak may occur in the partition and analyzing the partition to obtain leaked objects and objects related to the leaked objects. The present invention also provides a partition-based apparatus for diagnosing memory leak in Java systems.
    Type: Grant
    Filed: July 1, 2008
    Date of Patent: July 8, 2014
    Assignee: International Business Machines Corporation
    Inventors: Ying Li, Quan Long, Tiancheng Lui, Jie Qiu
  • Patent number: 8769507
    Abstract: A method, system, and article of manufacture are disclosed for transforming a definition of a process for delivering a service on a specified computing device. This service process definition is comprised of computer readable code. The method comprises the steps of expressing a given set of assumptions in a computer readable code; and transforming the definition by using a processing unit to apply the assumptions to the definition of the process to change the way in which the process operates. The definition of the process may be transformed by using factors relating to the specific context in or for which the definition is executed. Also, the definition may be transformed by identifying, in a flow diagram for the process, flows to which the assumptions apply, and applying program rewriting techniques to those identified flows.
    Type: Grant
    Filed: May 14, 2009
    Date of Patent: July 1, 2014
    Assignee: International Business Machines Corporation
    Inventors: David F. Bantz, Steven J. Mastrianni, James R. Moulic, Dennis G. Shea
  • Patent number: 8762970
    Abstract: A method for grouping algorithms included in a program into groups and thus for assisting in analyzing the program. The method includes the steps of: converting each of the algorithms into a directed graph; judging, as to each representative directed graph stored in a storage unit of a computer system, whether or not the directed graph obtained by the conversion is similar to the representative directed graph; and determining a group to which the directed graph obtained by the conversion belongs from among groups stored in the storage unit in accordance with the similarity judgment. A computer system for performing the above method and a computer program for causing a computer system to perform the above method are also described.
    Type: Grant
    Filed: December 14, 2009
    Date of Patent: June 24, 2014
    Assignee: International Business Machines Corporation
    Inventor: Motohiro Kawahito
  • Patent number: 8713548
    Abstract: Mechanisms are provided for rewriting branch instructions in a portion of code. The mechanisms receive a portion of source code having an original branch instruction. The mechanisms generate a branch stub for the original branch instruction. The branch stub stores information about the original branch instruction including an original target address of the original branch instruction. Moreover, the mechanisms rewrite the original branch instruction so that a target of the rewritten branch instruction references the branch stub. In addition, the mechanisms output compiled code including the rewritten branch instruction and the branch stub for execution by a computing device. The branch stub is utilized by the computing device at runtime to determine if execution of the rewritten branch instruction can be redirected directly to a target instruction corresponding to the original target address in an instruction cache of the computing device without intervention by an instruction cache runtime system.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: April 29, 2014
    Assignee: International Business Machines Corporation
    Inventors: Tong Chen, Brian Flachs, Brad W. Michael, Mark R. Nutter, John K. P. O'Brien, Kathryn M. O'Brien, Tao Zhang
  • Publication number: 20140109070
    Abstract: A system, method, and computer-readable storage medium is disclosed for identifying and verifying entry points in a software application. The method may include processing, using a processor, input data for a software application. The processing may include generating one or more call graphs for said software application, identifying one or more root parameters for each of said one or more call graphs, and setting the one or more root parameters as a first set of entry points, and filtering the first set of entry points using a first call length value provided by a user to generate a second set of entry points. The method may further include displaying, using the processor, the second set of entry points along with their respective call graphs.
    Type: Application
    Filed: October 7, 2013
    Publication date: April 17, 2014
    Inventors: Ravi MAHAMUNI, Supriya MANTRY
  • Patent number: 8694980
    Abstract: An embodiment of the invention pertains to a weighted directed graph comprising multiple nodes and edges that each extends between two nodes. The embodiment includes processing edges to generate a forward and reverse edge corresponding to each edge. Forward and reverse edges are processed to generate indirect edges, each comprising two edge components, and extending between two nodes. One node associated with each forward edge, each reverse edge, and each indirect edge is selected to be the key node of its associated edge. All forward, reverse and indirect edges having a particular node as their respective key nodes are placed into a group. All edges of the group are then selectively processed to provide information pertaining to an egonet of the graph that has the particular node as its egonode.
    Type: Grant
    Filed: July 12, 2012
    Date of Patent: April 8, 2014
    Assignee: International Business Machines Corporation
    Inventors: Marcel C. Rosu, Hanghang Tong
  • Patent number: 8671401
    Abstract: Described is a technology by which a series of loop nests corresponding to source code are detected by a compiler, with the series of loop nests tiled together, (thereby increasing the ratio of cache hits to misses in a multi-processor environment). The compiler transforms the series of loop nests into a plurality of tile loops within a controller loop, including using dependency analysis to determine which results from a tile loop need to be pre-computed before another tile loop. For dependency analysis, the compiler may use a directed acyclic graph as a high-level intermediate representation, and split the graph into sub-graphs each representing an array. The compiler uses descriptors processed from the graph to determine the controller loop and the tile loops within that controller loop.
    Type: Grant
    Filed: April 9, 2007
    Date of Patent: March 11, 2014
    Assignee: Microsoft Corporation
    Inventors: Siddhartha Puri, Jaydeep P. Marathe
  • Publication number: 20140068581
    Abstract: A compiler implemented by a computer performs optimized division of work across heterogeneous processors. The compiler divides source code into code sections and characterizes each of the code sections based on pre-defined criteria. Each of the code sections is characterized as at least one of: allocate to a main processor, allocate to a processing element, allocate to one of a parameterized main processor and a parameterized processing element, and indeterminate. The compiler analyzes side-effects and costs of executing the code sections on allocated processors, and transforms the code sections based on results of the analyzing. The transforming includes re-characterizing the code sections for alternate execution in a runtime environment.
    Type: Application
    Filed: August 30, 2012
    Publication date: March 6, 2014
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Tong Chen, John K.P. O'Brien, Zehra N. Sura
  • Patent number: 8635606
    Abstract: Technologies are generally described for runtime optimization adjusted dynamically according to changing costs of one or more system resources. Multicore systems may encounter dynamic variations in performance associated with the relative cost of related system resources. Furthermore, multicore systems can experience dramatic variations in resource availability and costs. A dynamic registry of system resource costs can be utilized to guide dynamic optimization. The relative scarcity of each resource can be updated dynamically within the registry of system resource costs. A runtime code generating loader and optimizer may be adapted to adjust optimization according to the resource cost registry. Information regarding system resource costs can support optimization tradeoffs based on resource cost functions.
    Type: Grant
    Filed: October 13, 2009
    Date of Patent: January 21, 2014
    Assignee: Empire Technology Development LLC
    Inventor: Ezekiel John Joseph Kruglick
  • Patent number: 8631395
    Abstract: Whole program analysis during a link time code generation part of compilation can be used to detect and eliminate dead catch handlers. If all catch handlers of a try clause in a computer program are found to be dead then the try clause can also be eliminated. Detection of dead catches can be automatic, using iterative propagation of the types of thrown exceptions from callee function to caller function from bottom to top in the call-graph and iterative propagation of the types of in-flight exceptions from caller function to callee function from top to bottom in the call-graph.
    Type: Grant
    Filed: September 2, 2011
    Date of Patent: January 14, 2014
    Assignee: Microsoft Corporation
    Inventors: Patrick Sathyanathan, Ten Tzen
  • Patent number: 8627300
    Abstract: Technologies are generally described for parallel dynamic optimization using multicore processors. A runtime compiler may be adapted to generate multiple instances of executable code from a portable intermediate software module. The various instances of executable code may be generated with variations of optimization parameters such that the code instances each express different optimization attempts. A multicore processor may be leveraged to simultaneously execute some, or all, of the various code instances. Preferred optimization parameters may be determined from the executable code instances that may correctly complete in the least time, or may use the least amount of memory, or that may prove superior according to some other fitness metric. Preferred optimization parameters may be used to seed future optimization attempts. Output generated from the preferred instances may be used as soon as the first instance correctly completes block.
    Type: Grant
    Filed: October 13, 2009
    Date of Patent: January 7, 2014
    Assignee: Empire Technology Development LLC
    Inventor: Ezekiel John Joseph Kruglick
  • Patent number: 8621448
    Abstract: Systems and methods for the vectorization of software applications are described. In some embodiments, source code dependencies can be expressed in ways that can extend a compiler's ability to vectorize otherwise scalar functions. For example, when compiling a called function, a compiler may identify dependencies of the called function on variables other than parameters passed to the called function. The compiler may record these dependencies, e.g., in a dependency file. Later, when compiling a calling function that calls the called function, the same (or another) compiler may reference the previously-identified dependencies and use them to determine whether and how to vectorize the calling function. In particular, these techniques may facilitate the vectorization of non-leaf loops. Because non-leaf loops are relatively common, the techniques described herein can increase the amount of vectorization that can be applied to many applications.
    Type: Grant
    Filed: September 23, 2010
    Date of Patent: December 31, 2013
    Assignee: Apple Inc.
    Inventor: Jeffry E. Gonion
  • Patent number: 8606718
    Abstract: According to one embodiment, a method for determining license compliance includes receiving data regarding a plurality of licenses, including at least first and second licenses. The first license has a corresponding first license count that applies to a first software product. The second license has a corresponding second license count that applies to the first software product. An instance count of the first software product is determined. A determination is made regarding whether the instance count can be apportioned to the first and second licenses, such that neither the first or second license counts are exceeded.
    Type: Grant
    Filed: March 27, 2008
    Date of Patent: December 10, 2013
    Assignee: CA, Inc.
    Inventors: David Disciascio, Lee B. Bash, Nan Wu
  • Patent number: 8607204
    Abstract: A method of analyzing single thread access by a variable of a multi-threaded program is provided. The method includes computing a thread identifier of a thread to be executed in a node of the multi-thread program; computing multiple threads configured to concurrently execute the node; and computing thread accessibility by deducing one or more variables that are executed in a single thread of the program from one or more pairs of the computed threads that concurrently execute the node.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: December 10, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sun-Ae Seo, Sung-Do Moon
  • Patent number: 8601457
    Abstract: In an embodiment, a technique that may be used to identify a pattern with respect to accessing a data store in a model. The pattern may be a desirable, undesirable, anomalous or some other type of pattern with respect to accessing the data store. The technique may include generating an execution control graph that represents an execution of the model. The execution control graph may be analyzed to identify the pattern. Analysis may include generating an expression based on the execution control graph and a condition to test for and determining, based on the expression, if the condition is met. If the condition is met, the pattern may be said to exist in the model. A result may generated based on the analysis and the result may be output.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: December 3, 2013
    Assignee: The MathWorks, Inc.
    Inventor: Zhi Han
  • Publication number: 20130318511
    Abstract: Methods and apparatuses associated with vectorization of scalar callee functions are disclosed herein. In various embodiments, compiling a first program may include generating one or more vectorized versions of a scalar callee function of the first program, based at least in part on vectorization annotations of the first program. Additionally, compiling may include generating one or more vectorized function signatures respectively associated with the one or more vectorized versions of the scalar callee function. The one or more vectorized function signatures may enable an appropriate vectorized version of the scalar callee function to be matched and invoked for a generic call from a caller function of a second program to a vectorized version of the scalar callee function.
    Type: Application
    Filed: April 1, 2011
    Publication date: November 28, 2013
    Inventors: Xinmin Tian, Sergey Stanislavoich Kozhukhov, Sergey Victorovich Preis, Robert Yehuda Geva, Konstantin Anatolyevich Pyjov, Hideki Sato, Milind Baburao Girkar, Aleksei Gurievich Chersaba, Nikolay Vladimirovich Panchenko
  • Patent number: 8595702
    Abstract: Visual representations of multiple call stacks in a parallel programming system include a stack segments graph constructed by coalescing data from multiple stacks. The graph has nodes that represent stack segments and has arcs between adjacent segments. Similar stack frames are represented by the same node. In a stack prefix view of the graph, arcs are directed from a node representing stack frames to a node representing subsequently executed stack frames. In a method-centered view, an arc is shown between a node representing stack frames of a selected method and a node representing adjacent stack frames. The graph can be based on call stacks of all tasks or all threads, or based on call stacks of tasks or threads flagged by a user. Stack frame, thread, and/or task details are also displayed.
    Type: Grant
    Filed: March 13, 2009
    Date of Patent: November 26, 2013
    Assignee: Microsoft Corporation
    Inventors: Paul Maybee, Daniel Moth, Johan Marien
  • Patent number: 8589867
    Abstract: Described herein are techniques for generating invocation stubs for a data parallel programming model so that a data parallel program written in a statically-compiled high-level programming language may be more declarative, reusable, and portable than traditional approaches. With some of the described techniques, invocation stubs are generated by a compiler and those stubs bridge a logical arrangement of data parallel computations to the actual physical arrangement of a target data parallel hardware for that data parallel computation.
    Type: Grant
    Filed: June 18, 2010
    Date of Patent: November 19, 2013
    Assignee: Microsoft Corporation
    Inventors: Lingli Zhang, Weirong Zhu, Yosseff Levanoni, Paul F. Ringseth, Charles David Callahan, II
  • Patent number: 8561176
    Abstract: A system, method and computer program product are provided. In use, execution of a portion of internal code of an interface is identified. Further, in response to the execution of the portion of internal code, at least one aspect of an invocation of the interface is monitored and/or analyzed.
    Type: Grant
    Filed: January 24, 2007
    Date of Patent: October 15, 2013
    Assignee: McAfee, Inc.
    Inventor: Gregory William Dalcher
  • Patent number: 8555270
    Abstract: A method and system are provided for splitting a live-range of a variable in frequently executed regions of program instructions. The live-range of a variable is split into multiple sub-ranges, each of which can be assigned to a different register or spilled into memory. The amount of spill code is reduced in frequently used regions of code by coalescing the live ranges based on profile information obtained after splitting the live ranges at every join and fork point in a control flow graph.
    Type: Grant
    Filed: April 28, 2006
    Date of Patent: October 8, 2013
    Assignee: International Business Machines Corporation
    Inventors: Takuya Nakaike, Tatsushi Inagaki, Hideaki Komatsu
  • Patent number: 8555267
    Abstract: A mechanism for performing register allocation based on priority spills and assignments is disclosed. A method of embodiments of the invention includes repetitively detecting fat points during a compilation process of a software program running on a virtual machine of a computer system, each fat point representing a program point having a high register pressure, the high register pressure occurs when a number of live program variables of the software program living at a given program point of the software program is greater than a number of available processor registers of the computer system. The method further includes choosing a fat point with a highest register pressure, selecting a live program variable having a lowest priority at the chosen fat point, and spilling the lowest priority live program variable to memory of the computer system.
    Type: Grant
    Filed: March 3, 2010
    Date of Patent: October 8, 2013
    Assignee: Red Hat, Inc.
    Inventor: Vladimir Makarov
  • Publication number: 20130263101
    Abstract: Detecting localizable native methods may include statically analyzing a native binary file of a native method. For each function call invoked in the native binary, it is checked whether resources accessed through the function call is locally available or not. If all resources accessed though the native method is locally available, the method is annotated as localizable.
    Type: Application
    Filed: September 13, 2012
    Publication date: October 3, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Michael H. Dawson, Yuqing Gao, Megumi Ito, Graeme Johnson, Seetharami R. Seelam
  • Patent number: 8549464
    Abstract: A reusable expression graph system and method that generates reusable expression graphs that can be used with potentially different input parameters in order to achieve computational efficiency and ease of programming. Reusable expression graph mitigate the need to rebuild an expression for each new value. This is achieved in part by creating a node called a “parameter node.” The parameter node acts as a generic placeholder for a leaf node in the expression graph. In addition, the parameter node acts as a proxy for a bindable term of the leaf node, and the bindable term can be either a value or one or more additional expressions. The parameter node then is bound to the bindable term and the expression is evaluated with that bindable term instead of the placeholder. The parameter node created by embodiments of the reusable expression graph system and method works across many different programming languages.
    Type: Grant
    Filed: November 22, 2010
    Date of Patent: October 1, 2013
    Assignee: Microsoft Corporation
    Inventors: Barry Clayton Bond, Vivian Sewelson, Daniel Johannes Pieter Leijin, Lubomir Boyanov Litchev
  • Patent number: 8543991
    Abstract: Idle processor cores can be used to compile methods that are likely to be executed by a program based on profile data that is captured during one or more previous executions. Methods that are determined by the profile data to be likely to be used can be compiled eagerly on one or more background threads. Transparency can be achieved by ensuring that module load order is not altered because of the background threads by recording the state of loaded modules after each profiled compilation, persisting that data, and waiting to eagerly compile a method until the method to be compiled and all its dependencies has been loaded by the executing program.
    Type: Grant
    Filed: March 10, 2011
    Date of Patent: September 24, 2013
    Assignee: Microsoft Corporation
    Inventors: Subramanian Ramaswamy, David Hiniker-Roosa, Feng Yuan, Sedar Gokbulut, Ashok C. Kamath, Jan Kotas, Vance P. Morrison
  • Publication number: 20130247018
    Abstract: A method for obtaining accurate call path information in a mixed-mode environment where interpreted methods and non-interpreted methods can call one another is disclosed. In one embodiment, such a method includes generating an event and recording it in a buffer when an interpreted method calls an interpreted method. The method also generates an event and records it in the buffer when an interpreted method calls a non-interpreted method. The method further generates an event and records it in the buffer when a non-interpreted method calls an interpreted method. The method refrains from generating an event when a non- interpreted method calls a non-interpreted method. A corresponding apparatus and computer program product are also disclosed.
    Type: Application
    Filed: March 15, 2013
    Publication date: September 19, 2013
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: INTERNATIONAL BUSINESS MACHINES CORPORATION
  • Patent number: 8522225
    Abstract: Mechanisms are provided for rewriting branch instructions in a portion of code. The mechanisms receive a portion of source code having an original branch instruction. The mechanisms generate a branch stub for the original branch instruction. The branch stub stores information about the original branch instruction including an original target address of the original branch instruction. Moreover, the mechanisms rewrite the original branch instruction so that a target of the rewritten branch instruction references the branch stub. In addition, the mechanisms output compiled code including the rewritten branch instruction and the branch stub for execution by a computing device. The branch stub is utilized by the computing device at runtime to determine if execution of the rewritten branch instruction can be redirected directly to a target instruction corresponding to the original target address in an instruction cache of the computing device without intervention by an instruction cache runtime system.
    Type: Grant
    Filed: June 25, 2010
    Date of Patent: August 27, 2013
    Assignee: International Business Machines Corporation
    Inventors: Tong Chen, Brian Flachs, Brad W. Michael, Mark R. Nutter, John K. P. O'Brien, Kathryn M. O'Brien, Tao Zhang
  • Patent number: 8522218
    Abstract: Routines which are likely to be good candidates for cross-module inlining are automatically identified according to criteria based on service history, compiler inlining criteria, and/or execution performance criteria. Candidates can also be automatically identified by pattern matching codes of routines which satisfy service history, execution performance, and/or compiler criteria. Automatically identified candidate routines are presented in an inlining advisory tool, allowing developers to approve/veto automatically identified candidates, to add other routines, and to either suggest or require that the development tools perform cross-module inlining with particular routines. Changes to a candidate routine can trigger regeneration of native image(s) into which the routine has been compiled.
    Type: Grant
    Filed: March 12, 2010
    Date of Patent: August 27, 2013
    Assignee: Microsoft Corporation
    Inventors: Surupa Biswas, David Jerome Hiniker, Jan Kotas, Frank V. Peschel-Gallee
  • Patent number: 8495606
    Abstract: A system performs operations comprising creating a call graph for a program translated from source code, identifying redundant exception handling code in the program utilizing the call graph, and removing the redundant exception handling code. The operation of identifying redundant exception handling code may comprise identifying at least one function or callsite by determining that a first function in the at least one function's or callsite's callee chain throws an exception and that the exception is handled by a second function in the function's or callsite's callee chain or by determining that an exception is not thrown in the at least one function's or callsite's callee chain. The operation of removing the redundant exception handling code may comprise removing redundant exception handling code included in at least one function or callsite and/or removing at least one entry for the at least one function or callsite from an exception lookup table.
    Type: Grant
    Filed: November 14, 2008
    Date of Patent: July 23, 2013
    Assignee: Oracle America, Inc.
    Inventors: Sheldon M. Lobo, Fu-Hwa Wang
  • Patent number: 8473935
    Abstract: Pre-compiling postdominating functions. Some embodiments may be practiced in a computing environment including a runtime compilation. For example one method includes acts for compiling functions. The method includes determining that a function of an application has been called. A control flow graph is used to determine one or more postdominance relationships between the function and one or more other functions. The one or more other functions are assigned to be pre-compiled based on the postdominance relationship.
    Type: Grant
    Filed: April 21, 2008
    Date of Patent: June 25, 2013
    Assignee: Microsoft Corporation
    Inventor: Matthew B. Grice
  • Patent number: 8473928
    Abstract: In one embodiment, a method for call graph analysis is provided. The method includes determining a plurality of nodes in a call graph. The plurality of nodes represent resource consumption of functions of a software program executed in a software system. A simplification factor is determined. A first set of nodes in the plurality of nodes is then eliminated based on exclusive values for the plurality of nodes, inclusive values for the plurality of nodes, and the simplification factor. An inclusive value for a node is a first amount of resources consumed by the node and any descendent nodes of that node. An exclusive value for the node is a second amount of resources consumed by the node. A simplified call graph is output including a second set of nodes in the plurality of nodes. The second set of nodes does not include the eliminated first set of nodes.
    Type: Grant
    Filed: April 19, 2010
    Date of Patent: June 25, 2013
    Assignee: SAP AG
    Inventors: Cheolman Park, Chan Young
  • Patent number: 8473924
    Abstract: Application profiles for applications stored on the endpoint are defined. An application profile identifies components on the endpoint associated with an application with which the application profile is associated. Applications on the endpoint accessed by a user to perform a task are monitored. A task profile associated with the task is created and stored, the task profile associated with the application profiles for the applications accessed by the user to perform the task.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: June 25, 2013
    Assignee: Symantec Corporation
    Inventors: Sourabh Satish, William E. Sobel
  • Patent number: 8468511
    Abstract: Optimizing a program having a plurality of functions using an optimization technique that requires breaking a calling convention. A first function of the plurality of functions is modified as a result of optimizing. A name of the first function is mangled to form a unique first mangled name changing the name of the first function to include, as a result of mangling, first information conveying at least in part how the first function was modified. A second function of the plurality of functions, being a caller of the first function, is also modified to correctly invoke the first function using the unique first mangled name to apply the optimization technique. A compilation tool can, after optimizing, use the first information to take a first action with respect to the first procedure, wherein the compilation tool otherwise would require the calling convention to remain unbroken to take the first action.
    Type: Grant
    Filed: December 31, 2008
    Date of Patent: June 18, 2013
    Assignee: International Business Machines Corporation
    Inventors: Christopher A. Lapkowski, Kevin A. Stoodley
  • Publication number: 20130139136
    Abstract: A computer-implemented method for removing redundant function calls in a computer program includes identifying a first set of equivalent function calls appearing in the computer program. For each of the equivalent function calls, the method identifies whether the function call is partially available or partially anticipable. When a function call is identified as being partially anticipable, a result of the function call is stored in a temporary variable. When a function call is identified as being partially available, the function call is removed and replaced with use of the temporary variable.
    Type: Application
    Filed: November 29, 2011
    Publication date: May 30, 2013
    Applicant: Microsoft Corporation
    Inventors: Patrick W. Sathyanathan, Ten Tzen
  • Patent number: 8429633
    Abstract: Embodiments of the invention describe systems and methods for application level management of virtual address space. A static analysis application can model and analyze a large and complex source code listing to determine whether it has vulnerabilities without exhausting the virtual memory resources provided to it by the operating system. In one embodiment of the invention, the method includes analyzing the source code listing to create a call graph model to represent the expected sequences of routine calls as a result of the inherent control flow of the source code listing. The method also includes monitoring the amount of virtual memory resources consumed by the dynamic state, and swapping out to a storage medium a portion of the dynamic state. The method includes reusing the virtual memory resources corresponding to the swapped out portion of the dynamic state to continue analyzing the source code listing.
    Type: Grant
    Filed: November 21, 2008
    Date of Patent: April 23, 2013
    Assignee: International Business Machines Corporation
    Inventors: Richard Title, Benjamin Greenwald, John Peyton
  • Patent number: 8423980
    Abstract: While optimizing executable code, compilers traditionally make static determinations about whether or not to inline functions. Embodiments of the invention convert dynamic hardware-event sampling information into context-specific edge frequencies, which can be used to make inlining decisions for functions.
    Type: Grant
    Filed: December 30, 2008
    Date of Patent: April 16, 2013
    Assignee: Google Inc.
    Inventors: Vinodha Ramasamy, Dehao Chen, Peng Yuan
  • Patent number: 8418159
    Abstract: An apparatus for optimizing a transaction comprising an initial sequence of computer operations, the apparatus includes a processing unit which identifies one or more idempotent operations comprised within the initial sequence, and which reorders the initial sequence to form a reordered sequence comprising a first sub-sequence of the computer operations followed by a second sub-sequence of the computer operations, the second sub-sequence comprising only the one or more idempotent operations.
    Type: Grant
    Filed: November 29, 2009
    Date of Patent: April 9, 2013
    Assignee: SAP AG
    Inventors: Eitan Farchi, Shachar Fienblit, Amiram Hayardeny, Rivka Matosevich, Ifat Nuriel, Sheli Rahav, Dalit Tzafrir
  • Patent number: 8407676
    Abstract: A device (100) for managing a plurality of software items, the device (100) comprising an analysis unit (103) adapted for analyzing a functional correlation between the plurality of software items, and a grouping unit (105) adapted for grouping functionally correlated ones of the plurality of software items together in a common memory space.
    Type: Grant
    Filed: June 18, 2008
    Date of Patent: March 26, 2013
    Assignee: NXP B.V.
    Inventor: Bart Jansseune