Shaping Or Removal Of Materials (e.g., Etching, Etc.) Patents (Class 977/888)
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Publication number: 20130106012Abstract: The variable hydraulic preform slurry electrolyte carbon extrusion high wear-heat resistant parts press is utilized to manufacture process specified scientific formula preform slurry electrolyte extrusion carbon nanofoam CNFs, with or without ionic suspension element to manufacture 1. preform slurry electrolyte carbon nanofoam CNFs extrusion high wear-heat resistant parts electronic component composite coils, composite windings, brushes, inductors, antinode couplers, electric rheostats, starters, motors, alternators, generators, ionic suspension element enhanced composite coils, composite windings, brushes, capacitors, battery cells, rheostats, electronic resistors, transformers, transducers, rectifiers, power supplies, or heat sinks, 2. Preform slurry electrolyte carbon nanofoam CNFs extrusion high wear-heat resistant parts aerospace, automotive, and transportation brake calipers, rotors, bushings, and pads, and 3.Type: ApplicationFiled: April 28, 2012Publication date: May 2, 2013Inventor: Robert Richard Matthews
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Patent number: 8425982Abstract: Methods for fabricating arrays of nanoscaled alternating lamellar or cylinders in a polymer matrix having improved long range order utilizing self-assembling block copolymers, and films and devices formed from these methods are provided.Type: GrantFiled: March 21, 2008Date of Patent: April 23, 2013Assignee: Micron Technology, Inc.Inventor: Jennifer Kahl Regner
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Publication number: 20130087526Abstract: A method for making three-dimensional nano-structure array is provided. The method includes following steps. A base is provided. A mask layer is located on the base. The mask layer is patterned, and a number of bar-shaped protruding structures is formed on a surface of the mask layer, a lot is defined between each of two adjacent protruding structures of the number of protruding structures to expose a portion of the base. The exposed portion of the base is etched through the slot so that the each of two adjacent protruding structures begin to slant face to face until they are contacting each other to form a protruding pair. The mask layer is removed.Type: ApplicationFiled: December 29, 2011Publication date: April 11, 2013Applicants: HON HAI PRECISION INDUSTRY CO., LTD., TSINGHUA UNIVERSITYInventors: ZHEN-DONG ZHU, QUN-QING LI, LI-HUI ZHANG, MO CHEN, YUAN-HAO JIN, SHOU-SHAN FAN
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Patent number: 8414784Abstract: A conductive wire includes a plurality of thermoplastic filaments each having a surface, and a coating material having a plurality of carbon nanotubes dispersed therein. The coating material is bonded to the surface of each thermoplastic filament. The thermoplastic filaments having the coating bonded thereto are bundled and bonded to each other to form a substantially cylindrical conductor.Type: GrantFiled: December 21, 2010Date of Patent: April 9, 2013Assignee: The Boeing CompanyInventor: Thomas K. Tsotsis
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Publication number: 20130082424Abstract: Disclosed is an antibacterial nanofiber which comprises a polymer having an electron-withdrawing group and/or an electron-withdrawing atomic group and has an average fiber diameter of not less than 1 nm and less than 1000 nm, wherein the ratio of the binding energy of the minimum unit of the polymer at 25° C. to the binding energy of the electron-withdrawing group and/or the electron-withdrawing atomic group contained in the minimum unit of the polymer at 25° C. is 0.13 or greater. The nanofiber has an antibacterial activity by itself, and therefore can exhibit an antibacterial activity without the need of adding any antibacterial agent.Type: ApplicationFiled: November 26, 2012Publication date: April 4, 2013Applicant: NISSHINBO INDUSTRIES, INC.Inventor: NISSHINBO INDUSTRIES, INC.
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Publication number: 20130085061Abstract: Compositions and methods of preparing a bimetallic alloy having enhanced electrocatalytic properties are provided. The composition comprises a PtNi substrate having a surface layer, a near-surface layer, and an inner layer, where the surface layer comprises a nickel-depleted composition, such that the surface layer comprises a platinum skin having at least one atomic layer of platinum.Type: ApplicationFiled: April 20, 2012Publication date: April 4, 2013Inventors: Vojislav R. Stamenkovic, Chao Wang, Nenad M. Markovic
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Publication number: 20130085212Abstract: The present invention relates to a procedure for the obtainment of a nanocomposite material through the technique of melt mixing comprising a polymeric matrix and a nanoreinforcement which has been previously dispersed in the same plastic or other matrix by means of electrospinning methods.Type: ApplicationFiled: November 2, 2012Publication date: April 4, 2013Applicant: CONSEJO SUPERIOR DE INVESTIGACIONES CIENTIFICAS (CSIC)Inventor: Consejo Superior De Investigaciones Cientificas (CSIC)
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Patent number: 8409449Abstract: Methods for fabricating sub-lithographic, nanoscale linear microchannel arrays over surfaces without defined features utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. Embodiments of the methods use a multi-layer induced ordering approach to align lamellar films to an underlying base film within trenches, and localized heating to anneal the lamellar-phase block copolymer film overlying the trenches and outwardly over the remaining surface.Type: GrantFiled: December 27, 2011Date of Patent: April 2, 2013Assignee: Micron Technology, Inc.Inventors: Dan B. Millward, Eugene P. Marsh
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Patent number: 8404124Abstract: Methods for fabricating sublithographic, nanoscale microstructures arrays including openings and linear microchannels utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. In some embodiments, the films can be used as a template or mask to etch openings in an underlying material layer.Type: GrantFiled: June 12, 2007Date of Patent: March 26, 2013Assignee: Micron Technology, Inc.Inventors: Dan B. Millward, Donald Westmoreland, Gurtej Sandhu
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Publication number: 20130069160Abstract: A trench isolation structure and method of forming the trench isolation structure are disclosed. The method includes forming a shallow trench isolation (STI) structure having an overhang and forming a gate stack. The method further includes forming source and drain recesses adjacent to the STI structure and the gate stack. The source and drain recesses are separated from the STI structure by substrate material. The method further includes forming epitaxial source and drain regions associated with the gate stack by filling the source and drain recesses with stressor material.Type: ApplicationFiled: September 15, 2011Publication date: March 21, 2013Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Michael V. AQUILINO, Reinaldo A. VEGA
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Publication number: 20130062669Abstract: Improved silicide formation and associated devices are disclosed. An exemplary method includes providing a semiconductor material having spaced source and drain regions therein, forming a gate structure interposed between the source and drain regions, performing a gate replacement process on the gate structure to form a metal gate electrode therein, forming a hard mask layer over the metal gate electrode, forming silicide layers on the respective source and drain regions in the semiconductor material, removing the hard mask layer to expose the metal gate electrode, and forming source and drain contacts, each source and drain contact being conductively coupled to a respective one of the silicide layers.Type: ApplicationFiled: September 8, 2011Publication date: March 14, 2013Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Hung-Ming Chen, Chih-Hao Chang, Chih-Hao Yu
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Publication number: 20130056437Abstract: A method for manufacturing a symbol on an exterior of an electronic device is provided. The method includes preparing a support layer, preparing a nanograting layer on the support layer, the nanograting layer including a first nanograting area corresponding to a preset symbol and a second nanograting area corresponding to an area other than the preset symbol, wherein each of the first nanograting area and the second nanograting area includes three-dimensional (3D) nanostructures and a pitch between the 3D nanostructures arranged in the first nanograting area is different from a pitch between the 3D nanostructures arranged in the second nanograting area.Type: ApplicationFiled: September 6, 2012Publication date: March 7, 2013Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Seong-eun CHUNG, Il-yong JUNG
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Publication number: 20130059000Abstract: A process for making hemoglobin based oxygen carrier (HBOC) containing pharmaceutical composition suitable for oral delivery and the composition formed thereby are described. There are three exemplary composition configurations which include (1) hemoglobin-loaded nanoparticles solution, (2) enteric-coated hemoglobin capsules and (3) enteric-coated hemoglobin tablets. To facilitate the bioavailability and bio-compatibility of hemoglobin, intestinal absorption enhancers are added in each of the HBOC formulations. Protective layers ensure delivery of an intact hemoglobin structure in intestinal tract without degradation in the stomach. The HBOC formulations may be used for preventive or immediate treatment of high altitude syndrome (HAS) or for treatment of hypoxic conditions including blood loss, anemia, hypoxic cancerous tissue, and other oxygen-deprivation disorders.Type: ApplicationFiled: August 23, 2012Publication date: March 7, 2013Inventors: Bing Lou WONG, Sui Yi KWOK
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Publication number: 20130043210Abstract: High quantum yield InP nanocrystals are used in the bio-technology, bio-medical, and photovoltaic, specifically IV, III-V and III-VI nanocrystal technological applications. InP nanocrystals typically require post-generation HF treatment. Combining microwave methodologies with the presence of a fluorinated ionic liquid allows Fluorine ion etching without the hazards accompanying HF. Growing the InP nanocrystals in the presence of the ionic liquid allows in-situ etching to be achieved. The optimization of the PL QY is achieved by balancing growth and etching rates in the reaction.Type: ApplicationFiled: October 5, 2012Publication date: February 21, 2013Applicant: The Florida State University Research Foundation, Inc.Inventor: The Florida State University Research Foundation, Inc.
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Publication number: 20130045580Abstract: Methods are provided for fabricating FinFETs that avoid thickness uniformity problems across a die or a substrate. One method includes providing a semiconductor substrate divided into a plurality of chips, each chip bounded by scribe lines. The substrate is etched to form a plurality of fins, each of the fins extending uniformly across the width of the chips. An oxide is deposited to fill between the fins and is etched to recess the top of the oxide below the top of the fins. An isolation hard mask is deposited and patterned overlying the plurality of fins and is used as an etch mask to etch trenches in the substrate defining a plurality of active areas, each of the plurality of active areas including at least a portion of at least one of the fins. The trenches are filled with an insulating material to isolate between adjacent active areas.Type: ApplicationFiled: August 15, 2011Publication date: February 21, 2013Applicant: GLOBALFOUNDRIES Inc.Inventor: Jin Cho
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Publication number: 20130040127Abstract: A membrane according to the present invention includes a support member and a polymer layer disposed on the support member and including a plurality of nano pores each having an inner wall formed of a block-structured polymer material of which the end thereof is substituted by a functional group.Type: ApplicationFiled: February 14, 2012Publication date: February 14, 2013Applicant: POSTECH ACADEMY-INDUSTRY FOUNDATIONInventors: Jin Kon KIM, Sangshin Jang, Seung Yun Yang, Gumhye Jeon, Won Jong Kim, Sejin Son, Hyunwoo Kim
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Publication number: 20130037919Abstract: A method of creating a trench having a portion of a bulb-shaped cross-section in silicon is disclosed. The method comprises forming at least one trench in silicon and forming a liner in the at least one trench. The liner is removed from a bottom surface of the at least one trench to expose the underlying silicon. A portion of the underlying exposed silicon is removed to form a cavity in the silicon. At least one removal cycle is conducted to remove exposed silicon in the cavity to form a bulb-shaped cross-sectional profile, with each removal cycle comprising subjecting the silicon in the cavity to ozonated water to oxidize the silicon and subjecting the oxidized silicon to a hydrogen fluoride solution to remove the oxidized silicon. A semiconductor device structure comprising the at least one trench comprising a cavity with a bulb-shaped cross-sectional profile is also disclosed.Type: ApplicationFiled: August 10, 2011Publication date: February 14, 2013Applicant: MICRON TECHNOLOGY, INC.Inventors: Sanjeev Sapra, Cheng-Shun Chen, Hung-Ming Tsai, Sheng-Wei Yang
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Publication number: 20130038949Abstract: A method of making a nanostructure is provided that includes applying a thin, random discontinuous masking layer (105) to a major surface (103) of a substrate (101) by plasma chemical vapor deposition. The substrate (101) can be a polymer, an inorganic material, an alloy, or a solid solution. The masking layer (105) can include the reaction product of plasma chemical vapor deposition using a reactant gas comprising a compound selected from the group consisting of organosilicon compounds, metal alkyls, metal isopropoxides, metal acetylacetonates, and metal halides. Portions (107) of the substrate (101) not protected by the masking layer (105) are then etched away by reactive ion etching to make the nanostructures.Type: ApplicationFiled: April 22, 2011Publication date: February 14, 2013Applicant: 3M INNOVATIVE PROPERTIES COMPANYInventors: Moses M. David, Ta-Hua Yu, Andrew K. Hartzell
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Patent number: 8372295Abstract: Methods for fabricating sublithographic, nanoscale arrays of openings and linear microchannels utilizing self-assembling block copolymers, and films and devices formed from these methods are provided. Embodiments of the invention use a self-templating or multilayer approach to induce ordering of a self-assembling block copolymer film to an underlying base film to produce a multilayered film having an ordered array of nanostructures that can be removed to provide openings in the film which, in some embodiments, can be used as a template or mask to etch openings in an underlying material layer.Type: GrantFiled: April 20, 2007Date of Patent: February 12, 2013Assignee: Micron Technology, Inc.Inventor: Dan B. Millward
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Patent number: 8367035Abstract: The present invention provides arrays of longitudinally aligned carbon nanotubes having specified positions, nanotube densities and orientations, and corresponding methods of making nanotube arrays using guided growth and guided deposition methods. Also provided are electronic devices and device arrays comprising one or more arrays of longitudinally aligned carbon nanotubes including multilayer nanotube array structures and devices.Type: GrantFiled: August 28, 2012Date of Patent: February 5, 2013Assignee: The Board of Trustees of the University of IllinoisInventors: John A. Rogers, Coskun Kocabas, Moonsub Shim, Seong Jun Kang, Jang-Ung Park
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Patent number: 8366974Abstract: An article of manufacture and methods of making same. In one embodiment, the article of manufacture has a plurality of zinc oxide layers substantially in parallel, wherein each zinc oxide layer has a thickness d1, and a plurality of organic molecule layers substantially in parallel, wherein each organic molecule layer has a thickness d2 and a plurality of molecules with a functional group that is bindable to zinc ions, wherein for every pair of neighboring zinc oxide layers, one of the plurality of organic molecule layers is positioned in between the pair of neighboring zinc oxide layers to allow the functional groups of the plurality of organic molecules to bind to zinc ions in the neighboring zinc oxide layers to form a lamellar hybrid structure with a geometric periodicity d1+d2, and wherein d1 and d2 satisfy the relationship of d1?d2?3d1.Type: GrantFiled: December 4, 2009Date of Patent: February 5, 2013Assignee: Northwestern UniversityInventors: Samuel I. Stupp, Josh Goldberger, Marina Sofos
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Patent number: 8361853Abstract: The present disclosure provides a semiconductor structure including a nanoribbon-containing layer of alternating graphene nanoribbons separated by alternating insulating ribbons. The alternating graphene nanoribbons are parallel to a surface of an underlying substrate and, in some embodiments, might be oriented along crystallographic directions of the substrate. The alternating insulating ribbons may comprise hydrogenated graphene, i.e., graphane, fluorinated graphene, or fluorographene. The semiconductor structure mentioned above can be formed by selectively converting portions of an initial graphene layer into alternating insulating ribbons, while the non-converted portions of the initial graphene form the alternating graphene nanoribbons. Semiconductor devices such as, for example, field effect transistors, can be formed atop the semiconductor structure provided in the present disclosure.Type: GrantFiled: October 12, 2010Date of Patent: January 29, 2013Assignee: International Business Machines CorporationInventors: Guy Cohen, Christos D. Dimitrakopoulos, Alfred Grill, Robert L. Wisnieff
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Publication number: 20130020278Abstract: A block copolymer for manufacturing a nanowire and a method of manufacturing the same are disclosed. The block copolymer and the method of manufacturing a nanowire using the same are used to fabricate a nanowire having a diameter of less than or equal to 30 nm and a porous nanowire having a diameter within the same range and pores with a diameter of less than or equal to 10 nm.Type: ApplicationFiled: September 21, 2012Publication date: January 24, 2013Applicant: UNIST Academy-Industry Research CorporationInventor: UNIST Academy-Industry Research Corporation
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Patent number: 8358010Abstract: A method for realizing a nanometric circuit architecture includes: realizing plural active areas on a semiconductor substrate; realizing on the substrate a seed layer of a first material; realizing a mask-spacer of a second material on the seed layer in a region comprised between the active areas; realizing a mask overlapping the mask-spacer and extending in a substantially perpendicular direction thereto; selectively removing the seed layer exposed on the substrate; selectively removing the mask and the mask-spacer obtaining a seed-spacer comprising a linear portion extending in that region and a portion substantially orthogonal thereto; realizing by MSPT from the seed-spacer an insulating spacer reproducing at least part of the profile of the seed-spacer; realizing by MSPT a nano-wire of conductive material from the seed-spacer or insulating spacer, the nano-wire comprising a first portion at least partially extending in the region and a second portion contacting a respective active area.Type: GrantFiled: February 28, 2005Date of Patent: January 22, 2013Assignee: STMicroelectronics S.r.l.Inventors: Danilo Mascolo, Gianfranco Cerofolini
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Publication number: 20130015531Abstract: A method for manufacturing a semiconductor device, comprising forming a first gate stack portion on a surface of a substrate, the first gate stack portion including a first gate oxide layer and a first polysilicon layer on the first gate oxide layer, forming a second gate stack portion on the surface of the substrate, the second gate stack portion including a second gate oxide layer and a second polysilicon layer on the second gate oxide layer, forming a resistor portion in a recessed portion of the substrate below the surface of the substrate, the resistor portion including a third polysilicon layer, and removing the first and second polysilicon layers from the first and second gate stack portions to expose the first and second gate oxide layers, wherein at least one of a dielectric layer and a stress liner cover a top surface of the resistor portion during removal of the first and second polysilicon layers.Type: ApplicationFiled: July 14, 2011Publication date: January 17, 2013Inventors: Ju Youn Kim, Jedon Kim
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Publication number: 20130001654Abstract: A semiconductor device with reduced defect density is fabricated by forming localized metal silicides instead of full area silicidation. Embodiments include forming a transistor having a gate electrode and source/drain regions on a substrate, forming a masking layer with openings exposing portions of both the gate electrode and source/drain regions over the substrate, depositing metal in the openings on the exposed portions, forming silicides in the openings, and removing unreacted metal and the masking layer.Type: ApplicationFiled: July 1, 2011Publication date: January 3, 2013Applicant: GLOBALFOUNDRIES Inc.Inventor: Dmytro Chumakov
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Publication number: 20130005097Abstract: A method for integrating a replacement gate in a semiconductor device is disclosed.Type: ApplicationFiled: August 2, 2011Publication date: January 3, 2013Inventors: Gaobo Xu, Qiuxia Xu
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Patent number: 8343297Abstract: A method for making a carbon nanotube film includes the following steps. A carbon nanotube array fixed on a substrate holder is provided. A carbon nanotube film is drawn from the carbon nanotube array. A first part of the carbon nanotube film is adhered to a first bar placed on a bar supply device. The carbon nanotube film is stretched by the first bar. A second part of the carbon nanotube film is adhered to a second bar positioned on the bar supply device. A third part of the carbon nanotube film is adhered to a supporting element placed on a carrier device. The third part of the carbon nanotube film is separated from the first part and the second part of carbon nanotube film. The third part of the carbon nanotube film adhered to the supporting element is obtained.Type: GrantFiled: December 16, 2010Date of Patent: January 1, 2013Assignees: Tsinghua University, Hon Hai Precision Industry Co., Ltd.Inventors: Liang Liu, Kai-Li Jiang, Shou-Shan Fan
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Publication number: 20120325656Abstract: A technique for a nanodevice is provided that includes a reservoir filled with a conductive fluid and a membrane separating the reservoir. The membrane includes an electrode layer having a tunneling junction formed therein. A nanopore is formed through the membrane, and the nanopore is formed through other layers of the membrane such that the nanopore is aligned with the tunneling junction of the electrode layer. When a voltage is applied to the electrode layer, a tunneling current is generated by a base in the tunneling junction to be measured as a signature for distinguishing the base. When an organic coating is formed on an inside surface of the tunneling junction, transient bonds are formed between the electrode layer and the base.Type: ApplicationFiled: September 7, 2012Publication date: December 27, 2012Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Hongbo Peng, Stephen M. Rossnagel, Ajay K. Royyuru, Gustavo A. Stolovitzky, Deqiang Wang
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Publication number: 20120319168Abstract: A semiconductor device and manufacturing method therefor includes a ?-shaped embedded source or drain regions. A U-shaped recess is formed in a Si substrate using dry etching and a SiGe layer is grown epitaxially on the bottom of the U-shaped recess. Using an orientation selective etchant having a higher etching rate with respect to Si than SiGe, wet etching is performed on the Si substrate sidewalls of the U-shaped recess, to form a ?-shaped recess.Type: ApplicationFiled: January 19, 2012Publication date: December 20, 2012Applicant: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING) CORPORATIONInventors: Huanxin Liu, Huojin Tu
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Publication number: 20120316330Abstract: The present invention relates to systems, compositions and methods for the conversion of lignocellulosic material to recalcitrant cellulose and hydrolyzed sugars and products produced therefrom (e.g., biofuel, nano-fibrillated cellulose). In particular, the invention provides novel fractionation processes configured to integrate production of hydrolyzed sugars (e.g., for biofuel production) and recalcitrant cellulose (e.g., for nano-fibrillated cellulose production) from lignocellulosic material and methods of using the same (e.g., in the production of biofuel and nano-fibrillated cellulose). The invention is also directed to nanocellulose with morphologies of having a less entangled and slightly branched fibril network, and having the same thermal stability as of that of the initial lignocellulose feedstock.Type: ApplicationFiled: June 8, 2012Publication date: December 13, 2012Applicant: The United States of America as Represented by the Secretary of AgricultureInventors: JunYong Zhu, Ronald Sabo, Craig Clemons
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Publication number: 20120309182Abstract: Disclosed herein is a method of forming sidewall spacers for a semiconductor device. In one example, the method comprises forming a gate electrode structure above a semiconducting substrate. performing a non-conformal deposition process to deposit a layer of spacer material above the gate electrode structure and performing an anisotropic etching process on the layer of spacer material to define a first sidewall spacer proximate a first side of the gate electrode structure and a second sidewall spacer proximate a second side of the gate electrode structure, wherein the first and second sidewall spacers have different widths.Type: ApplicationFiled: May 31, 2011Publication date: December 6, 2012Applicant: GLOBALFOUNDRIES INC.Inventors: Stefan Flachowsky, Jan Hoentschel, Peter Javorka
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Publication number: 20120302027Abstract: Disclosed herein is a method for fabricating a silicon nanowire field effect transistor based on a wet etching.Type: ApplicationFiled: November 18, 2011Publication date: November 29, 2012Inventors: Ru Huang, Jiewen Fan, Yujie Ai, Shuai Sun, Runsheng Wang, Jibin Zou, Xin Huang
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Publication number: 20120301785Abstract: A process is provided for etching a silicon-containing substrate to form nanowire arrays. In this process, one deposits nanoparticles and a metal film onto the substrate in such a way that the metal is present and touches silicon where etching is desired and is blocked from touching silicon or not present elsewhere. One submerges the metallized substrate into an etchant aqueous solution comprising HF and an oxidizing agent. In this way arrays of nanowires with controlled diameter and length are produced.Type: ApplicationFiled: November 28, 2011Publication date: November 29, 2012Applicant: BANDGAP ENGINEERING INC.Inventors: Brent A. Buchine, Faris Modawar, Marcie R. Black
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Publication number: 20120298289Abstract: The present disclosure relates to a method for making a graphene/carbon nanotube composite structure. In the method, at least one graphene film is located on a substrate. At least one carbon nanotube layer is combined with the at least one graphene film located on the substrate to form a substrate/graphene/carbon nanotube composite structure. The at least one graphene film is in contact with the at least one carbon nanotube layer in the substrate/graphene/carbon nanotube composite structure. The substrate is removed from the substrate/graphene/carbon nanotube composite structure, thereby forming a graphene/carbon nanotube composite structure.Type: ApplicationFiled: November 23, 2011Publication date: November 29, 2012Applicants: HON HAI PRECISION INDUSTRY CO., LTD., TSINGHUA UNIVERSITYInventors: KAI-LI JIANG, XIAO-YANG LIN, LIN XIAO, SHOU-SHAN FAN
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Publication number: 20120298617Abstract: One or more techniques for nano structure fabrication are provided. In an embodiment, an apparatus for manufacturing a nano structure is disclosed. The apparatus includes a stamp having a line pattern on a surface thereof that comprises a plurality of protrusions, a die configured to hold a substrate thereon, and a mechanical processing unit configured to press the plurality of protrusions of the stamp against the substrate with a predetermined pressure so as to form at least one channel pore therebetween.Type: ApplicationFiled: July 27, 2012Publication date: November 29, 2012Applicant: KOREA UNIVERSITY RESEARCH AND BUSINESS FOUNDATIONInventor: Kwangyeol LEE
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Publication number: 20120298396Abstract: The present disclosure relates to a manufacturing method of a graphene fiber, a graphene fiber manufactured by the same method, and use thereof. The graphene fiber formed by using graphenes of linear pattern can be applied to various fields such as an electric wire and coaxial cable.Type: ApplicationFiled: August 8, 2012Publication date: November 29, 2012Applicant: VRYUS CO., LTD.Inventors: Byung Hee HONG, Keun Soo KIM, Hyeong Keun KIM, Su Kang BAE
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Publication number: 20120296124Abstract: Efficient and recyclable heterogeneous nanocatalysts and methods of synthesizing and using the same are provided.Type: ApplicationFiled: February 14, 2012Publication date: November 22, 2012Inventors: Tewodros Asefa, Ankush V. Biradar, Yanfei Wang
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Publication number: 20120294914Abstract: A particulate titanium dioxide has a median volume particle diameter of greater than 70 nm. The titanium dioxide can be produced by calcining precursor particles. The titanium dioxide has enhanced UVA efficacy. The particulate titanium dioxide can be used to form dispersions. The particulate titanium dioxide or dispersions can be used to produce sunscreen products having a UV protection which is at least one third of the label SPF value.Type: ApplicationFiled: December 22, 2010Publication date: November 22, 2012Applicant: Croda International PLCInventors: Ian Robert Tooley, Robert Michael Sayer, Paul Martin Staniland
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Patent number: 8313660Abstract: A conductive wire includes a thermoplastic filament having a circumference and a plurality of coating layers dispersed about the circumference of the thermoplastic filament. The coating layers include a plurality of conductive layers comprising aligned carbon nanotubes dispersed therein and at least one thermoplastic layer between each pair of conductive layers.Type: GrantFiled: December 22, 2010Date of Patent: November 20, 2012Assignee: The Boeing CompanyInventor: Thomas K. Tsotsis
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Publication number: 20120287507Abstract: Wire grid polarizers, methods of fabricating a wire grid polarizer and display panels including a wire grid polarizer are provided, the methods include preparing a mold having a lower surface in which a plurality of parallel fine grooves are formed, and arranging the mold on a transparent substrate. The plurality of parallel fine grooves are filled with a conductive liquid ink. A plurality of parallel conductive nano wires are formed on the transparent substrate by curing the conductive liquid ink. The mold is removed.Type: ApplicationFiled: January 16, 2012Publication date: November 15, 2012Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Chang-seung Lee, Jun-seong Kim, Ki-deok Bae
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Publication number: 20120280284Abstract: A micro-fluidic electronic device includes a micro-fluidic component and an electronic component formed on a sheet of paper. An electrically-active layer of the electronic component, such as a nano-material layer, interacts with a fluid sample deposited within a fluid reservoir of the component, and changes the electronic properties of the electronic component. This can be detected by passing an electrical signal through the electronic component. The micro-fluidic electronic device can be formed straightforwardly and inexpensively by printing or mold-casting.Type: ApplicationFiled: April 5, 2012Publication date: November 8, 2012Applicant: AGENCY FOR SCIENCE, TECHNOLOGY AND RESEARCHInventors: I Putu Mahendra Wijaya, Isabel Rodriguez, Subodh G. Mhaisalkar, Wee Yang Ng
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Publication number: 20120279942Abstract: A method for preparing nanotubes by providing nanorods of a piezoelectric material having an asymmetric crystal structure and by further providing hydroxide ions to the nanorods to etch inner parts of the nanorods to form the nanotubes.Type: ApplicationFiled: July 19, 2012Publication date: November 8, 2012Applicants: KUMOH NATIONAL INSTITUTE OF TECHNOLOGY, SAMSUNG ELECTRONICS CO., LTD.Inventors: Jaeyoung CHOI, Sangwoo KIM
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Patent number: 8303883Abstract: The invention provides foams of desired cell sizes formed from metal or ceramic materials that coat the surfaces of carbon foams which are subsequently removed. For example, metal is located over a sol-gel foam monolith. The metal is melted to produce a metal/sol-gel composition. The sol-gel foam monolith is removed, leaving a metal foam.Type: GrantFiled: June 30, 2006Date of Patent: November 6, 2012Assignee: Lawrence Livermore National Security, LLC.Inventors: Richard L. Landingham, Joe H. Satcher, Jr., Paul R. Coronado, Theodore F. Baumann
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Publication number: 20120273987Abstract: Provided in one embodiment is a method of forming an inorganic nanowire, comprising: providing an elongated organic scaffold; providing a plurality of inorganic nanoparticles attached to the organic scaffold along a length of the organic scaffold; and fusing the nanoparticles attached to the organic scaffold to form an inorganic nanowire.Type: ApplicationFiled: June 18, 2012Publication date: November 1, 2012Inventors: Angela M. Belcher, Chuanbin Mao, Daniel J. Solis
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Publication number: 20120276289Abstract: An example of a nanoballoon thermal protection system includes a refractory ceramic foam having carbide balloons. The foam has a closed cell structure not allowing liquid to penetrate through the foam. Each of the carbide balloons is hollow and has a diameter greater than 0 nm and less than 900 nm. Each of the carbide balloons includes a refractory carbide. In addition, a vehicle with thermal shield includes a surface and a first and second nanoballoon closed cell foam coatings. Each of the foam coatings has a melting point temperature greater than 1000° C. and a density less than 85%. Each of the foam coatings has hollow balloons having a diameter less than 900 nm. Each of the foam coatings includes a closed cell structure not allowing liquid to penetrate through the respective coating. Methods for manufacturing a nanoballoon system and a nanoballoon thermal protection system are also disclosed.Type: ApplicationFiled: May 8, 2012Publication date: November 1, 2012Applicant: LOCKHEED MARTIN CORPORATIONInventors: Alfred A. Zinn, Justin S. Golightly, Loosineh Avakians
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Publication number: 20120268823Abstract: The invention relates to conical structures on substrate surfaces, in particular optical elements, to methods for the production thereof and to the use thereof, in particular in optical devices, solar cells and sensors. The conical nanostructures according to the invention are suitable in particular for providing substrate surfaces having very low light reflection.Type: ApplicationFiled: December 17, 2010Publication date: October 25, 2012Inventors: Christoph Morhard, Claudia Pacholski, Joachim P. Spatz
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Publication number: 20120267656Abstract: A method of fabricating a light emitting device comprising: providing a substrate; forming an epitaxial stack on the substrate wherein the epitaxial stack comprising a first conductivity semiconductor layer, an active layer and a second conductivity semiconductor layer; forming a mesa on the epitaxial stack to expose partial of the first conductivity semiconductor layer; layer and etching the surface of the first conductivity semiconductor layer and forming a least one rough structure on the surface of the first conductivity semiconductor layer wherein the first conductivity semiconductor layer is sandwiched by the substrate and the active layer.Type: ApplicationFiled: April 19, 2011Publication date: October 25, 2012Inventors: DE-SHAN KUO, TING-CHIA KO, CHUN-HSIANG TU
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Publication number: 20120263024Abstract: A TAMR (Thermal Assisted Magnetic Recording) writer has a narrow pole tip with a trailing edge magnetic shield. The narrow pole tipped write head uses the energy of laser generated edge plasmons, formed in a plasmon generating layer, to locally heat a PMR magnetic recording medium below its Curie temperature, Tc. When combined with the effects of the narrow tip, this local heating to a temperature below Tc is sufficient to create good transitions and narrow track widths in the magnetic medium. The write head is capable of writing effectively on state-of-the-art PMR recording media having Hk of 20 kOe or more.Type: ApplicationFiled: April 14, 2011Publication date: October 18, 2012Inventors: Xuhui Jin, Yuchen Zhou, Kenichi Takano, Joe Smyth
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Patent number: 8287749Abstract: The present invention provides a method of manufacturing a high-molecular thin film having a fine structure from a block-copolymer compound containing a block copolymer A as a main constituent composed of at least a block chain A1 and a block chain A2, and a block copolymer B as an accessory constituent composed of a block chain B1 miscible with a polymeric phase P1 mainly composed of the block chain A1 and a block chain B2 miscible with a polymeric phase P2 mainly composed of the block chain A2, and a substrate having a surface on which the block-copolymer compound is applied and on which a pattern member formed of a second material is discretely arranged to a surface part formed of a first material.Type: GrantFiled: December 22, 2009Date of Patent: October 16, 2012Assignee: Hitachi, Ltd.Inventors: Hirokazu Hasegawa, Mikihito Takenaka, Hiroshi Yoshida, Yasuhiko Tada