Search Patents
  • Publication number: 20230135231
    Abstract: An optical subassembly includes a planar dielectric waveguide structure that is deposited at temperatures below 400° C. The waveguide provides low film stress and low optical signal loss. Optical and electrical devices mounted onto the subassembly are aligned to planar optical waveguides using alignment marks and stops. Optical signals are delivered to the submount assembly via optical fibers. The dielectric stack structure used to fabricate the waveguide provides cavity walls that produce a cavity, within which optical, optoelectronic, and electronic devices can be mounted. The dielectric stack is deposited on an interconnect layer on a substrate, and the intermetal dielectric can contain thermally conductive dielectric layers to provide pathways for heat dissipation from heat generating optoelectronic devices such as lasers.
    Type: Application
    Filed: December 26, 2022
    Publication date: May 4, 2023
    Inventors: William Ring, Miroslaw Florjanczyk
  • Publication number: 20200225414
    Abstract: An optical subassembly includes a planar dielectric waveguide structure that is deposited at temperatures below 400 C. The waveguide provides low film stress and low optical signal loss. Optical and electrical devices mounted onto the subassembly are aligned to planar optical waveguides using alignment marks and stops. Optical signals are delivered to the submount assembly via optical fibers. The dielectric stack structure used to fabricate the waveguide provides cavity walls that produce a cavity, within which optical, optoelectronic, and electronic devices can be mounted. The dielectric stack is deposited on an interconnect layer on a substrate, and the intermetal dielectric can contain thermally conductive dielectric layers to provide pathways for heat dissipation from heat generating optoelectronic devices such as lasers.
    Type: Application
    Filed: January 18, 2020
    Publication date: July 16, 2020
    Inventors: William Ring, Miroslaw Florjanczyk
  • Patent number: 11536904
    Abstract: An optical subassembly includes a planar dielectric waveguide structure that is deposited at temperatures below 400 C. The waveguide provides low film stress and low optical signal loss. Optical and electrical devices mounted onto the subassembly are aligned to planar optical waveguides using alignment marks and stops. Optical signals are delivered to the submount assembly via optical fibers. The dielectric stack structure used to fabricate the waveguide provides cavity walls that produce a cavity, within which optical, optoelectronic, and electronic devices can be mounted. The dielectric stack is deposited on an interconnect layer on a substrate, and the intermetal dielectric can contain thermally conductive dielectric layers to provide pathways for heat dissipation from heat generating optoelectronic devices such as lasers.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: December 27, 2022
    Inventors: William Ring, Miroslaw Florjanczyk
  • Patent number: 9880352
    Abstract: A photonic integrated circuit (PIC) is grown by epitaxy on a substrate. The PIC includes at least one active element, at least one passive element, and a dielectric waveguide. The at least one active and passive elements are formed over the substrate and are in optical contact with each other. The dielectric waveguide is formed over the substrate, and is in optical contact with the at least one active and passive elements. The at least one active and passive elements each are formed using a III-V compound semiconductor material.
    Type: Grant
    Filed: July 22, 2016
    Date of Patent: January 30, 2018
    Assignee: BB Photonics Inc.
    Inventors: Miroslaw Florjanczyk, William Ring
  • Publication number: 20170023733
    Abstract: A photonic integrated circuit (PIC) is grown by epitaxy on a substrate. The PIC includes at least one active element, at least one passive element, and a dielectric waveguide. The at least one active and passive elements are formed over the substrate and are in optical contact with each other. The dielectric waveguide is formed over the substrate, and is in optical contact with the at least one active and passive elements. The at least one active and passive elements each are formed using a III-V compound semiconductor material.
    Type: Application
    Filed: July 22, 2016
    Publication date: January 26, 2017
    Applicant: BB Photonics Inc.
    Inventors: Miroslaw FLORJANCZYK, William RING
  • Publication number: 20190227231
    Abstract: An optical subassembly includes a planar dielectric waveguide structure that is deposited at temperatures below 400 C. The waveguide provides low film stress and low optical signal loss. Optical and electrical devices mounted onto the subassembly are aligned to planar optical waveguides using alignment marks and stops. Optical signals are delivered to the submount assembly via optical fibers. The dielectric stack structure used to fabricate the waveguide provides cavity walls that produce a cavity, within which optical, optoelectronic, and electronic devices can be mounted. The dielectric stack is deposited on an interconnect layer on a substrate, and the intermetal dielectric can contain thermally conductive dielectric layers to provide pathways for heat dissipation from heat generating optoelectronic devices such as lasers.
    Type: Application
    Filed: July 16, 2018
    Publication date: July 25, 2019
    Inventors: Bill Ring, Miroslaw Florjanczyk
  • Publication number: 20210255386
    Abstract: An optical subassembly includes a planar dielectric waveguide structure that is deposited at temperatures below 400 C. The waveguide provides low film stress and low optical signal loss. Optical and electrical devices mounted onto the subassembly are aligned to planar optical waveguides using alignment marks and stops. Optical signals are delivered to the submount assembly via optical fibers. The dielectric stack structure used to fabricate the waveguide provides cavity walls that produce a cavity, within which optical, optoelectronic, and electronic devices can be mounted. The dielectric stack is deposited on an interconnect layer on a substrate, and the intermetal dielectric can contain thermally conductive dielectric layers to provide pathways for heat dissipation from heat generating optoelectronic devices such as lasers.
    Type: Application
    Filed: April 19, 2021
    Publication date: August 19, 2021
    Inventors: William Ring, Miroslaw Florjanczyk
  • Patent number: 10551561
    Abstract: An optical subassembly includes a planar dielectric waveguide structure that is deposited at temperatures below 400 C. The waveguide provides low film stress and low optical signal loss. Optical and electrical devices mounted onto the subassembly are aligned to planar optical waveguides using alignment marks and stops. Optical signals are delivered to the submount assembly via optical fibers. The dielectric stack structure used to fabricate the waveguide provides cavity walls that produce a cavity, within which optical, optoelectronic, and electronic devices can be mounted. The dielectric stack is deposited on an interconnect layer on a substrate, and the intermetal dielectric can contain thermally conductive dielectric layers to provide pathways for heat dissipation from heat generating optoelectronic devices such as lasers.
    Type: Grant
    Filed: July 16, 2018
    Date of Patent: February 4, 2020
    Assignee: POET Technologies, Inc.
    Inventors: William Ring, Miroslaw Florjanczyk
  • Patent number: 10983277
    Abstract: An optical subassembly includes a planar dielectric waveguide structure that is deposited at temperatures below 400 C. The waveguide provides low film stress and low optical signal loss. Optical and electrical devices mounted onto the subassembly are aligned to planar optical waveguides using alignment marks and stops. Optical signals are delivered to the submount assembly via optical fibers. The dielectric stack structure used to fabricate the waveguide provides cavity walls that produce a cavity, within which optical, optoelectronic, and electronic devices can be mounted. The dielectric stack is deposited on an interconnect layer on a substrate, and the intermetal dielectric can contain thermally conductive dielectric layers to provide pathways for heat dissipation from heat generating optoelectronic devices such as lasers.
    Type: Grant
    Filed: January 18, 2020
    Date of Patent: April 20, 2021
    Assignee: POET Technologies, Inc.
    Inventors: William Ring, Miroslaw Florjanczyk
  • Patent number: 11867946
    Abstract: An optical subassembly includes a planar dielectric waveguide structure that is deposited at temperatures below 400° C. The waveguide provides low film stress and low optical signal loss. Optical and electrical devices mounted onto the subassembly are aligned to planar optical waveguides using alignment marks and stops. Optical signals are delivered to the submount assembly via optical fibers. The dielectric stack structure used to fabricate the waveguide provides cavity walls that produce a cavity, within which optical, optoelectronic, and electronic devices can be mounted. The dielectric stack is deposited on an interconnect layer on a substrate, and the intermetal dielectric can contain thermally conductive dielectric layers to provide pathways for heat dissipation from heat generating optoelectronic devices such as lasers.
    Type: Grant
    Filed: December 26, 2022
    Date of Patent: January 9, 2024
    Assignee: POET Technologies, Inc.
    Inventors: William Ring, Miroslaw Florjanczyk
  • Publication number: 20240329310
    Abstract: A method for depositing silicon oxynitride film structures is provided that is used to form planar waveguides. These film structures are deposited on substrates and the combination of the substrate and the planar waveguide is used in the formation of optical interposers and subassemblies. The silicon oxynitride film structures are deposited using low thermal budget processes and hydrogen-free oxygen and hydrogen-free nitrogen precursors to produce planar waveguides that exhibit low losses for optical signals transmitted through the waveguide of 1 dB/cm or less. The silicon oxynitride film structures and substrate exhibit low stress levels of less than 20 MPa.
    Type: Application
    Filed: June 10, 2024
    Publication date: October 3, 2024
    Inventors: William Ring, Miroslaw Florjanczyk, Suresh Venkatesan
  • Patent number: 11156779
    Abstract: A method for depositing silicon oxynitride film structures is provided that is used to form planar waveguides. These film structures are deposited on substrates and the combination of the substrate and the planar waveguide is used in the formation of optical interposers and subassemblies. The silicon oxynitride film structures are deposited using low thermal budget processes and hydrogen-free oxygen and hydrogen-free nitrogen precursors to produce planar waveguides that exhibit low losses for optical signals transmitted through the waveguide of 1 dB/cm or less. The silicon oxynitride film structures and substrate exhibit low stress levels of less than 20 MPa.
    Type: Grant
    Filed: July 20, 2020
    Date of Patent: October 26, 2021
    Assignee: POET Technologies, Inc.
    Inventors: William Ring, Miroslaw Florjanczyk, Suresh Venkatesan
  • Publication number: 20200348468
    Abstract: A method for depositing silicon oxynitride film structures is provided that is used to form planar waveguides. These film structures are deposited on substrates and the combination of the substrate and the planar waveguide is used in the formation of optical interposers and subassemblies. The silicon oxynitride film structures are deposited using low thermal budget processes and hydrogen-free oxygen and hydrogen-free nitrogen precursors to produce planar waveguides that exhibit low losses for optical signals transmitted through the waveguide of 1 dB/cm or less. The silicon oxynitride film structures and substrate exhibit low stress levels of less than 20 MPa.
    Type: Application
    Filed: July 20, 2020
    Publication date: November 5, 2020
    Inventors: William Ring, Miroslaw Florjanczyk, Suresh Venkatesan
  • Patent number: 10718905
    Abstract: A method for depositing silicon oxynitride film structures is provided that is used to form planar waveguides. These film structures are deposited on substrates and the combination of the substrate and the planar waveguide is used in the formation of optical interposers and subassemblies. The silicon oxynitride film structures are deposited using low thermal budget processes and hydrogen-free oxygen and hydrogen-free nitrogen precursors to produce planar waveguides that exhibit low losses for optical signals transmitted through the waveguide of 1 dB/cm or less. The silicon oxynitride film structures and substrate exhibit low stress levels of less than 20 MPa.
    Type: Grant
    Filed: January 25, 2019
    Date of Patent: July 21, 2020
    Assignee: POET Technologies, Inc.
    Inventors: William Ring, Miroslaw Florjanczyk, Suresh Venkatesan
  • Patent number: 12007604
    Abstract: A method for depositing silicon oxynitride film structures is provided that is used to form planar waveguides. These film structures are deposited on substrates and the combination of the substrate and the planar waveguide is used in the formation of optical interposers and subassemblies. The silicon oxynitride film structures are deposited using low thermal budget processes and hydrogen-free oxygen and hydrogen-free nitrogen precursors to produce planar waveguides that exhibit low losses for optical signals transmitted through the waveguide of 1 dB/cm or less. The silicon oxynitride film structures and substrate exhibit low stress levels of less than 20 MPa.
    Type: Grant
    Filed: January 3, 2023
    Date of Patent: June 11, 2024
    Assignee: POET Technologies, Inc.
    Inventors: William Ring, Miroslaw Florjanczyk, Suresh Venkatesan
  • Publication number: 20220043210
    Abstract: A method for depositing silicon oxynitride film structures is provided that is used to form planar waveguides. These film structures are deposited on substrates and the combination of the substrate and the planar waveguide is used in the formation of optical interposers and subassemblies. The silicon oxynitride film structures are deposited using low thermal budget processes and hydrogen-free oxygen and hydrogen-free nitrogen precursors to produce planar waveguides that exhibit low losses for optical signals transmitted through the waveguide of 1 dB/cm or less. The silicon oxynitride film structures and substrate exhibit low stress levels of less than 20 MPa.
    Type: Application
    Filed: October 25, 2021
    Publication date: February 10, 2022
    Inventors: William Ring, Miroslaw Florjanczyk, Suresh Venkatesan
  • Publication number: 20190271810
    Abstract: A method for depositing silicon oxynitride film structures is provided that is used to form planar waveguides. These film structures are deposited on substrates and the combination of the substrate and the planar waveguide is used in the formation of optical interposers and subassemblies. The silicon oxynitride film structures are deposited using low thermal budget processes and hydrogen-free oxygen and hydrogen-free nitrogen precursors to produce planar waveguides that exhibit low losses for optical signals transmitted through the waveguide of 1 dB/cm or less. The silicon oxynitride film structures and substrate exhibit low stress levels of less than 20 MPa.
    Type: Application
    Filed: January 25, 2019
    Publication date: September 5, 2019
    Inventors: William Ring, Miroslaw Florjanczyk, Suresh Venkatesan
  • Publication number: 20230152519
    Abstract: A method for depositing silicon oxynitride film structures is provided that is used to form planar waveguides. These film structures are deposited on substrates and the combination of the substrate and the planar waveguide is used in the formation of optical interposers and subassemblies. The silicon oxynitride film structures are deposited using low thermal budget processes and hydrogen-free oxygen and hydrogen-free nitrogen precursors to produce planar waveguides that exhibit low losses for optical signals transmitted through the waveguide of 1 dB/cm or less. The silicon oxynitride film structures and substrate exhibit low stress levels of less than 20 MPa.
    Type: Application
    Filed: January 3, 2023
    Publication date: May 18, 2023
    Inventors: William Ring, Miroslaw Florjanczyk, Suresh Venkatesan
  • Patent number: 11543588
    Abstract: A method for depositing silicon oxynitride film structures is provided that is used to form planar waveguides. These film structures are deposited on substrates and the combination of the substrate and the planar waveguide is used in the formation of optical interposers and subassemblies. The silicon oxynitride film structures are deposited using low thermal budget processes and hydrogen-free oxygen and hydrogen-free nitrogen precursors to produce planar waveguides that exhibit low losses for optical signals transmitted through the waveguide of 1 dB/cm or less. The silicon oxynitride film structures and substrate exhibit low stress levels of less than 20 MPa.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: January 3, 2023
    Inventors: William Ring, Miroslaw Florjanczyk, Suresh Venkatesan
  • Patent number: 8351043
    Abstract: A spectrometer has a multi-input aperture for admitting an input wavefront and an array of multiple waveguide structures terminating at the multi-input aperture. The input wavefront is incident on each of the waveguide structures, which provide a dispersive function for the input wavefront. Interferometers are formed by elements of the waveguide structures. The interferometers have different optical path length differences (OPDs). The interferometers provide a wavelength responsive output for spatially extended light sources. The output of the interferometers is detected with a detector array. The spectrometer has an improved etendue, and in some embodiments very high resolution.
    Type: Grant
    Filed: March 20, 2008
    Date of Patent: January 8, 2013
    Assignee: National Research Council of Canada
    Inventors: Pavel Cheben, Siegfried Janz, Miroslaw Florjanczyk, Dan-Xia Xu
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