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  • FINFETS AND METHODS OF FORMING FINFETS
    Publication number: 20160099150
    Abstract: An embodiment is a method including forming a fin on a substrate, forming a first doped region in a top portion of the fin, the first doped region having a first dopant concentration, and forming a second doped region in a middle and bottom portion of the fin, the second doped region having a second dopant concentration, the second dopant concentration being less than the first dopant concentration.
    Type: Application
    Filed: October 3, 2014
    Publication date: April 7, 2016
    Inventors: Chun Hsiung Tsai, Tsan-Chun Wang
  • METHOD AND APPARATUS FOR FORMING SEMICONDUCTOR STRUCTURE
    Publication number: 20190252192
    Abstract: A method for forming a semiconductor structure comprises heating a solid material to form a gaseous substance; ionizing the gaseous substance to produce a first type of ions; and implanting the first type of ions into a semiconductor substrate. The method can achieve better abruptness, better shallow junction depth, and better sheet resistance.
    Type: Application
    Filed: February 14, 2018
    Publication date: August 15, 2019
    Inventors: TSAN-CHUN WANG, CHIAO-TING TAI, CHE-FU CHIU, CHUN-FENG NIEH
  • Semiconductor Device and Method of Manufacture
    Publication number: 20190088498
    Abstract: A semiconductor device and method of manufacture are provided. In some embodiments a divergent ion beam is utilized to implant ions into a capping layer, wherein the capping layer is located over a first metal layer, a dielectric layer, and an interfacial layer over a semiconductor fin. The ions are then driven from the capping layer into one or more of the first metal layer, the dielectric layer, and the interfacial layer.
    Type: Application
    Filed: November 16, 2018
    Publication date: March 21, 2019
    Inventors: Tsan-Chun Wang, Chun-Feng Nieh
  • MECHANISMS FOR FORMING STRESSOR REGIONS IN A SEMICONDUCTOR DEVICE
    Publication number: 20130146949
    Abstract: The embodiments of processes and structures described above provide mechanisms for improving mobility of carriers. The dislocations in the source and drain regions and the strain created by the doped epitaxial materials next to the channel region of a transistor both contribute to the strain in the channel region. As a result, the device performance is improved.
    Type: Application
    Filed: December 13, 2011
    Publication date: June 13, 2013
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chun Hsiung TSAI, Tsan-Chun WANG, Su-Hao LIU, Tsz-Mei KWOK, Chii-Meng WU
  • LCD PANEL CAPABLE OF COMPENSATING THE FEED-THROUGH VOLTAGE
    Publication number: 20120169956
    Abstract: An LCD panel transmits the display data to sub-pixels in a zigzag pattern through a data line. The variation of the feed-through voltages of the sub-pixels may be modified by adjusting the ratios of the channel widths and the channel lengths of the TFTs in the sub-pixels to some predetermined ratios, or by adjusting the compensation capacitance to the coupling capacitance of the TFTs of the sub-pixels.
    Type: Application
    Filed: May 29, 2011
    Publication date: July 5, 2012
    Inventors: Chun-Chi Lai, Ching-Wei Chen, Tsan-Chun Wang, Kuo-Hsing Cheng, Yu-Cheng Chen
  • GATE STRUCTURE OF SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
    Publication number: 20200365414
    Abstract: A semiconductor device and method of manufacture are provided. In some embodiments a divergent ion beam is utilized to implant ions into a capping layer, wherein the capping layer is located over a first metal layer, a dielectric layer, and an interfacial layer over a semiconductor fin. The ions are then driven from the capping layer into one or more of the first metal layer, the dielectric layer, and the interfacial layer.
    Type: Application
    Filed: August 3, 2020
    Publication date: November 19, 2020
    Inventors: Tsan-Chun Wang, Chun-Feng Nieh
  • FORMATION OF SEMICONDUCTOR DEVICE STRUCTURE BY IMPLANTATION
    Publication number: 20200020772
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a semiconductor structure over a semiconductor substrate. The method also includes implanting carbon into the semiconductor structure. The method further includes implanting gallium into the semiconductor structure. In addition, the method includes heating the semiconductor structure after the implanting of carbon and gallium.
    Type: Application
    Filed: September 5, 2018
    Publication date: January 16, 2020
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsan-Chun WANG, Chiao-Ting TAI, Che-Fu CHIU, Chun-Feng NIEH
  • LCD PANEL CAPABLE OF COMPENSATING THE FEED-THROUGH VOLTAGE
    Publication number: 20130286310
    Abstract: An LCD panel transmits the display data to sub-pixels in a zigzag pattern through a data line. The variation of the feed-through voltages of the sub-pixels may be modified by adjusting the ratios of the channel widths and the channel lengths of the TFTs in the sub-pixels to some predetermined ratios, or by adjusting the compensation capacitance to the coupling capacitance of the TFTs of the sub-pixels.
    Type: Application
    Filed: June 26, 2013
    Publication date: October 31, 2013
    Inventors: Chun-Chi Lai, Ching-Wei Chen, Tsan-Chun Wang, Kuo-Hsing Cheng, Yu-Cheng Chen
  • GATE STRUCTURE OF SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE
    Publication number: 20220310405
    Abstract: A semiconductor device and method of manufacture are provided. In some embodiments a divergent ion beam is utilized to implant ions into a capping layer, wherein the capping layer is located over a first metal layer, a dielectric layer, and an interfacial layer over a semiconductor fin. The ions are then driven from the capping layer into one or more of the first metal layer, the dielectric layer, and the interfacial layer.
    Type: Application
    Filed: June 13, 2022
    Publication date: September 29, 2022
    Inventors: Tsan-Chun Wang, Chun-Feng Nieh
  • Method and apparatus for forming semiconductor structure
    Patent number: 10832913
    Abstract: A method for forming a semiconductor structure comprises heating a solid material to form a gaseous substance; ionizing the gaseous substance to produce a first type of ions; and implanting the first type of ions into a semiconductor substrate. The method can achieve better abruptness, better shallow junction depth, and better sheet resistance.
    Type: Grant
    Filed: February 14, 2018
    Date of Patent: November 10, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tsan-Chun Wang, Chiao-Ting Tai, Che-Fu Chiu, Chun-Feng Nieh
  • Method of fabricating gate electrode using a treated hard mask
    Patent number: 9881840
    Abstract: A hard mask layer with a limited thickness is formed over a gate electrode layer. A treatment is provided on the hard mask layer to transform the hard mask layer to be more resistant to wet etching solution. A patterning is provided on the treated hard mask layer and the gate electrode to from a gate structure.
    Type: Grant
    Filed: June 9, 2011
    Date of Patent: January 30, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Lien Huang, Ziwei Fang, Tsan-Chun Wang, Chii-Ming Wu, Chun Hsiung Tsai
  • Mechanisms for forming stressor regions in a semiconductor device
    Patent number: 8674453
    Abstract: The embodiments of processes and structures described above provide mechanisms for improving mobility of carriers. The dislocations in the source and drain regions and the strain created by the doped epitaxial materials next to the channel region of a transistor both contribute to the strain in the channel region. As a result, the device performance is improved.
    Type: Grant
    Filed: December 13, 2011
    Date of Patent: March 18, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun Hsiung Tsai, Tsan-Chun Wang, Su-Hao Liu, Tsz-Mei Kwok, Chii-Meng Wu
  • Formation of semiconductor device structure by implantation
    Patent number: 11127817
    Abstract: A method for forming a semiconductor device structure is provided. The method includes forming a semiconductor structure over a semiconductor substrate. The method also includes implanting carbon into the semiconductor structure. The method further includes implanting gallium into the semiconductor structure. In addition, the method includes heating the semiconductor structure after the implanting of carbon and gallium.
    Type: Grant
    Filed: September 5, 2018
    Date of Patent: September 21, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Tsan-Chun Wang, Chiao-Ting Tai, Che-Fu Chiu, Chun-Feng Nieh
  • Gate structure of semiconductor device and method of manufacture
    Patent number: 11361977
    Abstract: A semiconductor device and method of manufacture are provided. In some embodiments a divergent ion beam is utilized to implant ions into a capping layer, wherein the capping layer is located over a first metal layer, a dielectric layer, and an interfacial layer over a semiconductor fin. The ions are then driven from the capping layer into one or more of the first metal layer, the dielectric layer, and the interfacial layer.
    Type: Grant
    Filed: August 3, 2020
    Date of Patent: June 14, 2022
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsan-Chun Wang, Chun-Feng Nieh
  • METHOD OF FABRICATING GATE ELCTRODE USING A TREATED HARD MASK
    Publication number: 20120315733
    Abstract: A hard mask layer with a limited thickness is formed over a gate electrode layer. A treatment is provided on the hard mask layer to transform the hard mask layer to be more resistant to wet etching solution. A patterning is provided on the treated hard mask layer and the gate electrode to from a gate structure.
    Type: Application
    Filed: June 9, 2011
    Publication date: December 13, 2012
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Yu-Lien HUANG, Ziwei FANG, Tsan-Chun WANG, Chii-Ming WU, Chun Hsiung TSAI
  • Semiconductor device and method of manufacture
    Patent number: 10163657
    Abstract: A semiconductor device and method of manufacture are provided. In some embodiments a divergent ion beam is utilized to implant ions into a capping layer, wherein the capping layer is located over a first metal layer, a dielectric layer, and an interfacial layer over a semiconductor fin. The ions are then driven from the capping layer into one or more of the first metal layer, the dielectric layer, and the interfacial layer.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: December 25, 2018
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsan-Chun Wang, Chun-Feng Nieh
  • Gate structure of semiconductor device
    Patent number: 10741412
    Abstract: A semiconductor device and method of manufacture are provided. In some embodiments a divergent ion beam is utilized to implant ions into a capping layer, wherein the capping layer is located over a first metal layer, a dielectric layer, and an interfacial layer over a semiconductor fin. The ions are then driven from the capping layer into one or more of the first metal layer, the dielectric layer, and the interfacial layer.
    Type: Grant
    Filed: November 16, 2018
    Date of Patent: August 11, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tsan-Chun Wang, Chun-Feng Nieh
  • LCD panel capable of compensating the feed-through voltage
    Patent number: 9057919
    Abstract: An LCD panel transmits the display data to sub-pixels in a zigzag pattern through a data line. The variation of the feed-through voltages of the sub-pixels may be modified by adjusting the ratios of the channel widths and the channel lengths of the TFTs in the sub-pixels to some predetermined ratios, or by adjusting the compensation capacitance to the coupling capacitance of the TFTs of the sub-pixels.
    Type: Grant
    Filed: June 26, 2013
    Date of Patent: June 16, 2015
    Assignee: AU Optronics Corp.
    Inventors: Chun-Chi Lai, Ching-Wei Chen, Tsan-Chun Wang, Kuo-Hsing Cheng, Yu-Cheng Chen
  • FinFETs and methods of forming FinFETs
    Patent number: 9558946
    Abstract: An embodiment is a method including forming a fin on a substrate, forming a first doped region in a top portion of the fin, the first doped region having a first dopant concentration, and forming a second doped region in a middle and bottom portion of the fin, the second doped region having a second dopant concentration, the second dopant concentration being less than the first dopant concentration.
    Type: Grant
    Filed: October 3, 2014
    Date of Patent: January 31, 2017
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun Hsiung Tsai, Tsan-Chun Wang
  • Gate structure of semiconductor device and method of manufacture
    Patent number: 12211701
    Abstract: A semiconductor device and method of manufacture are provided. In some embodiments a divergent ion beam is utilized to implant ions into a capping layer, wherein the capping layer is located over a first metal layer, a dielectric layer, and an interfacial layer over a semiconductor fin. The ions are then driven from the capping layer into one or more of the first metal layer, the dielectric layer, and the interfacial layer.
    Type: Grant
    Filed: June 13, 2022
    Date of Patent: January 28, 2025
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Tsan-Chun Wang, Chun-Feng Nieh
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