Parallel Connected Patents (Class 331/56)
  • Patent number: 11334321
    Abstract: A true random number generator (TRNG) for generating a sequence of random numbers of bits is disclosed. The TRNG includes a TRNG cell configured to generate a sequence of bits logically alternating with a mean frequency and with substantially random period jitter; a period monitor configured to generate a first sequence of random bits based on a set of periods of the sequence of logically alternating bits; and a sampling circuit configured to sample the first sequence of random bits in response to a sampling clock to generate a second sequence of random bits.
    Type: Grant
    Filed: June 26, 2020
    Date of Patent: May 17, 2022
    Assignee: QUALCOMM INCORPORATED
    Inventors: Rui Li, De Lu, Venkat Narayanan, Srivatsan Chellappa
  • Patent number: 10727819
    Abstract: According to one embodiment, an information processing device, includes: a digital-to-pulse converter configured to output a pulse signal including a pulse with a pulse length corresponding to a digital input signal; and a bidirectional selective oscillator including a first ring oscillator and a second ring oscillator, the first ring oscillator including a plurality of delay elements connected in a ring shape in a first direction, the second ring oscillator including a plurality of delay elements connected in a ring shape in a second direction reverse to the first direction. The bidirectional selective oscillator is configured to select one of the first ring oscillator and the second ring oscillator depending on a sign of the digital input signal, oscillate the selected ring oscillator during a period when the pulse is outputted, and keep a state of oscillation operation when the pulse stops being outputted.
    Type: Grant
    Filed: September 10, 2018
    Date of Patent: July 28, 2020
    Assignee: KABUSHIKI KAISHA TOSHIBA
    Inventors: Yosuke Toyama, Kentaro Yoshioka, Kohei Onizuka
  • Patent number: 9837714
    Abstract: A method includes separating phase of Local Oscillator (LO) signals generated by individual Voltage Controlled Oscillators (VCOs) of a coupled VCO array through varying voltage levels of voltage control inputs thereto. The method also includes coupling the individual VCOs of the coupled VCO array to one another in a closed, circular configuration to increase phase difference between the phase separated LO signals generated by the individual VCOs compared to a linear configuration of the coupled VCO array. Further, the method includes mixing outputs of the individual VCOs of the circular coupled VCO array with signals from antenna elements of an antenna array to introduce differential phase shifts in signal paths coupled to the antenna elements during performing beamforming with the antenna array.
    Type: Grant
    Filed: March 17, 2014
    Date of Patent: December 5, 2017
    Assignee: Integrated Device Technology, Inc.
    Inventors: Christopher T. Schiller, Jonathan Kennedy
  • Patent number: 9312811
    Abstract: In accordance with the present invention there is provided a bi-stable oscillator circuit for detecting a load imparted to a surface. The bi-stable oscillator comprises an electrical amplifier, at least one resonator comprising an electrical transducer having a resonant frequency, a surface of the resonator forming the surface on which the load is to be detected and an impedance network having a resonant frequency.
    Type: Grant
    Filed: January 19, 2011
    Date of Patent: April 12, 2016
    Assignee: Alere Switzerland GmbH
    Inventors: Matthew Cooper, Alexander Sleptsov, Richard John Hammond
  • Patent number: 8994461
    Abstract: A cascaded oscillator array includes a first oscillator array and a second oscillator array. The first oscillator array includes at least three oscillator elements coupled unidirectionally in a first ring such that the first oscillator array outputs a first oscillating signal. Each of the at least three oscillator elements is coupled to receive a signal from a sensing element. The second oscillator array includes at least three oscillator elements coupled unidirectionally in a second ring such that the second oscillator array outputs a second oscillating signal. A first number of the at least three oscillator elements of the first oscillator array is the same as a second number of the at least three oscillator elements of the second oscillator. Each oscillator element of the at least three oscillator elements of the second oscillator array is coupled to receive an output signal from a single oscillator element of the at least three oscillator elements of the first oscillator.
    Type: Grant
    Filed: September 26, 2013
    Date of Patent: March 31, 2015
    Assignee: The United States of America as represented by the Secretary of the Navy
    Inventors: Visarath In, Patrick Longhini, Yong (Andy) Kho, Antonio Palacios
  • Patent number: 8988158
    Abstract: A method, an apparatus, and a computer program product are provided. The apparatus provides a VCO signal. The apparatus is a VCO. The apparatus includes a first transconductance circuit. The apparatus further includes a second transconductance circuit coupled with the first transconductance circuit. The second transconductance circuit has a first configuration/mode (e.g., CMOS configuration/mode) and a second configuration/mode (e.g., NMOS configuration/mode or PMOS configuration/mode). The second transconductance circuit is configured to couple an input of the second transconductance circuit to the first transconductance circuit in the first configuration/mode. The second transconductance circuit is configured to isolate the input of the second transconductance circuit from the first transconductance circuit in the second configuration/mode.
    Type: Grant
    Filed: March 15, 2013
    Date of Patent: March 24, 2015
    Assignee: QUALCOMM Incorporated
    Inventors: Sujiang Rong, Li Liu, Yiwu Tang
  • Patent number: 8981854
    Abstract: A clock distributor includes a first oscillator and a second oscillator, to each of which a signal controlling an oscillation frequency is input and to one of which a clock is input; a wiring portion that connects the first oscillator and the second oscillator; a first conversion element that converts an output from the first oscillator into electric current, and outputs a result to a first connection portion connecting to the wiring portion; a second conversion element that converts voltage of the first connection portion into electric current, and outputs a result to the first oscillator; a third conversion element that converts an output from the second oscillator into electric current, and outputs a result to a second connection portion connecting to the wiring portion; and a fourth conversion element that converts voltage of the second connection portion into electric current, and outputs a result to the second oscillator.
    Type: Grant
    Filed: May 2, 2013
    Date of Patent: March 17, 2015
    Assignee: Fujitsu Limited
    Inventors: Yasumoto Tomita, Hirotaka Tamura
  • Patent number: 8970310
    Abstract: As provided herein, in some embodiments, monolithic oscillators with low phase noise, large swing voltages, wide tuning, and high frequency characteristics are obtained by a monolithic integrated circuit having an oscillator core configured to generate a first output signal, and one or more tuning units operatively coupled to the oscillator core. In some embodiments, the oscillator core is a push-push oscillator core having a bipolar junction transistor, and each of the tuning units uses a FET transistor to present a selectable capacitance. In some embodiments, the tuning units have high-voltage and high-frequency capabilities. In some embodiments, the tuning units use MEMS switches to selectively connect capacitances to the oscillator core. In some embodiments, the oscillator core generates a second signal that has twice the frequency of the first frequency.
    Type: Grant
    Filed: October 10, 2012
    Date of Patent: March 3, 2015
    Assignee: Analog Devices, Inc.
    Inventors: James Breslin, Michael F. Keaveney
  • Patent number: 8957736
    Abstract: The oscillation method uses an oscillation circuit in which a plurality of MOSFETs are annularly connected. The method comprises the steps of: forming GND of the circuit, which is separated from GND of a driving electric source of the MOSFETs, in a part of a first connection line which connects the MOSFET with the adjacent MOSFET; connecting a probe with a second connection line which connects another MOSFET with the adjacent MOSFET, an odd number of the MOSFETs being connected between the GND and the second connection line; and generating an oscillation waveform between the probe and the GND.
    Type: Grant
    Filed: September 23, 2013
    Date of Patent: February 17, 2015
    Inventor: Akira Takizawa
  • Patent number: 8912852
    Abstract: A quartz transducer having four or more crystal-controlled oscillators intended for measurement of applied pressure and temperature. All four oscillators are controlled by crystal quartz resonators operating in the thickness-shear mode. Two crystals measure the pressure and temperature respectively. A third crystal is a reference, and the fourth crystal may be another reference crystal or a second temperature crystal. The output of the latter is either phase leading or phase lagging the thermal response of the main temperature sensor.
    Type: Grant
    Filed: November 30, 2010
    Date of Patent: December 16, 2014
    Assignee: Sensor Developments AS
    Inventor: Oivind Godager
  • Patent number: 8902007
    Abstract: A clock distributor includes unit circuit parts each including an oscillator, a first element configured to convert output voltage of the oscillator into a current, a second element having a voltage current conversion characteristic of an opposite phase to that of the first element, the second element being feedback connected to the first element and the oscillator, a third element configured to convert output voltage of the oscillator into a current, a fourth element having a voltage current conversion characteristic of an opposite phase to that of the third element, the fourth element being feedback connected to the third element and the oscillator; a wiring part to connect a connection part of the first and second elements of a unit circuit part to a connection part of the third and fourth elements of another unit circuit part; and a synchronization circuit connected to the oscillator of a unit circuit part.
    Type: Grant
    Filed: December 6, 2012
    Date of Patent: December 2, 2014
    Assignee: Fujitsu Limited
    Inventors: Yasumoto Tomita, Hirotaka Tamura
  • Patent number: 8779862
    Abstract: An oscillator having a plurality of operatively coupled ring oscillators arranged in hyper-matrix architecture. The operatively coupled ring oscillators are either identical or non-identical and are coupled through a common inverter or tail current transistors. Due to the arrangement of the ring oscillators in a hyper-matrix structure, the ring oscillators are synchronized and resist any variation in frequency or phase thereby maintaining a consistent phase noise performance.
    Type: Grant
    Filed: July 16, 2012
    Date of Patent: July 15, 2014
    Assignee: STMicroelectronics International N.V.
    Inventor: Prashant Dubey
  • Patent number: 8686805
    Abstract: The disclosure relates to an oscillator for use in generating frequencies in a frequency synthesizer, comprising: a first inductor element forming a metal trace loop with at least one turn, and a first capacitive circuit arranged to form a first resonance circuit with the first inductor element and being connected to the first inductor element through at least one first connection terminal, wherein the first capacitive circuit comprises at least one capacitive element and an electrical components arrangement arranged to establish and maintain an oscillation.
    Type: Grant
    Filed: September 29, 2009
    Date of Patent: April 1, 2014
    Assignee: Telefonaktiebolaget L M Ericsson (Publ)
    Inventor: Tomas Nylén
  • Patent number: 8669824
    Abstract: An oscillation circuit includes a plurality of MEMS vibrators each having a first terminal and a second terminal, and having respective resonant frequencies different from each other, an amplifier circuit (an inverting amplifier circuit) having an input terminal and an output terminal, and a connection circuit adapted to connect the first terminal of one of the MEMS vibrators and the input terminal to each other, and the second terminal of the MEMS vibrator and the output terminal to each other to thereby connect the one of the MEMS vibrators and the amplifier circuit (the inverting amplifier circuit) to each other.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: March 11, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Aritsugu Yajima
  • Patent number: 8648663
    Abstract: An oscillator includes: a plurality of MEMS vibrators each having a first terminal and a second terminal, and having respective resonant frequencies different from each other; an amplifier circuit having an input terminal and an output terminal; a connection circuit adapted to connect the first terminal of one of the MEMS vibrators and the input terminal to each other, and the second terminal of the one of the MEMS vibrators and the output terminal to each other; a signal reception terminal adapted to receive a switching signal used to switch a state of the connection circuit; and a switching circuit adapted to make the connection circuit switch the MEMS vibrator to be connected to the amplifier circuit based on the switching signal, wherein the MEMS vibrators are housed in an inside of a cavity, and the signal reception terminal is disposed outside the cavity.
    Type: Grant
    Filed: April 11, 2012
    Date of Patent: February 11, 2014
    Assignee: Seiko Epson Corporation
    Inventor: Aritsugu Yajima
  • Patent number: 8615202
    Abstract: A frequency synthesizer includes: a first oscillator (1) controlled by a first control device, the first oscillator having a high quality factor that is greater than 300 and produces a first clock signal (2) RF having a fixed frequency, the first control device (30) controlling the frequency of the first controlled oscillator (1) on the basis of a first reference frequency; a second oscillator (3) controlled by a second control device and producing a second clock signal (4); the second control device (31) controlling the frequency of the second controlled oscillator (3) on the basis of a second reference frequency; and an integer frequency divider (5) dividing the frequency of the second clock signal (4) by a variable integer factor N1 and producing a third clock signal (6), the frequency of which is continuously variable by modifying the factor N1 and the control of the second oscillator.
    Type: Grant
    Filed: March 24, 2010
    Date of Patent: December 24, 2013
    Assignee: CSEM Centre Suisse d'Electronique et de Microtechnique SA—Recherche et Development
    Inventor: David Ruffieux
  • Patent number: 8610511
    Abstract: The high-frequency digitally controlled oscillator includes fully digital cells capable of being ported to any CMOS fabrication process. The oscillator has a basic modular architecture comprising a digitally controlled digital ring oscillator (DRO) having a plurality of delay stages, a counter divider and a selection multiplexer. The DRO generates the basic (intrinsic) high frequency range and the counter provides the remaining ranges through division by multiples of two. The multiplexer provides a selection mechanism for the required range of frequencies. Load capacitances to the delay stages are added/removed to control delay via utilization of a unique capacitive cell driven synchronously by two ring oscillators such that the capacitance could be added or removed utilizing the Miller effect. Moreover, multiple capacitive load cells can be added to the same stage.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: December 17, 2013
    Assignees: King Fahd University of Petroleum and Minerals, King Abdulaziz City for Science and Technology
    Inventor: Muhammad E. S. Elrabaa
  • Patent number: 8552804
    Abstract: An apparatus includes an adjustable oscillator circuit configured to generate an output signal having a frequency that varies responsive to a frequency control signal and a frequency reference generator circuit configured to produce a frequency reference signal. The apparatus further includes a calibration circuit configured to determine a relationship of the output signal to the frequency reference signal and to enable and disable the frequency reference generator circuit based on the determined relationship.
    Type: Grant
    Filed: September 30, 2011
    Date of Patent: October 8, 2013
    Assignee: Integrated Device Technology Inc.
    Inventors: Chenxiao Ren, Tao Jing
  • Patent number: 8502610
    Abstract: A representative integrated circuit comprises a clock signal generator that generates a clock signal, a code pattern generator that generates digital pattern data based on the clock signal, and multiple traversal local oscillator synthesizers that are coupled in a cascaded configuration. Each traversal local oscillator synthesizer includes a transversal digital-to-analog conversion (T-DAC) unit that includes a plurality of registers and a unary modulator (Umod) array. The T-DAC provides frequency selection ranges covering wide operational bands based on the digital pattern data and the clock signal.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: August 6, 2013
    Assignee: Lockheed Martin Corporation
    Inventors: Leopold E. Pellon, William G. Trueheart, Jr.
  • Publication number: 20130127549
    Abstract: An electronic circuit including two ring oscillators, wherein the output of each ring oscillator is looped back on the input of this same oscillator as well on the input of the other oscillator. The application of such a circuit to the detection of a dynamic disturbance.
    Type: Application
    Filed: November 6, 2012
    Publication date: May 23, 2013
    Applicant: STMicroelectronics (Rousset) SAS
    Inventor: STMicroelectronics (Rousset) SAS
  • Publication number: 20130099870
    Abstract: This disclosure involves systems for providing an oscillatory circuit having low phase noise featuring arrays of complementary VCO pairs connected in parallel.
    Type: Application
    Filed: October 20, 2011
    Publication date: April 25, 2013
    Applicant: Qualcomm Atheros, Inc.
    Inventor: Emmanouil Terrovitis
  • Patent number: 8395454
    Abstract: A circuit for producing a synchronized output of multiple ring oscillators is disclosed. In one embodiment, the circuit includes a first ring oscillator configured to generate a first periodic signal and a second ring oscillator configured to generate a second periodic signal. The circuit may further include a selection unit coupled to receive the first periodic signal and the second periodic signal. The selection unit is configured to convey a first clock edge into each of the first and second ring oscillators responsive to a most recently received rising edge from one of the first and second periodic signals. The selection unit is further configured to convey a second clock edge into each of the first and second ring oscillators responsive to a most recently received falling edge from one of the first and second periodic signals, wherein the first and second clock edges are opposite in direction.
    Type: Grant
    Filed: May 13, 2011
    Date of Patent: March 12, 2013
    Assignee: Oracle International Corporation
    Inventor: Timothy Horel
  • Patent number: 8390387
    Abstract: A crystalline semiconductor resonator device comprises two matched resonators which are aligned differently with respect to the crystal structure of the crystalline semiconductor. The resonators each comprise a portion of a material having a different temperature dependency of the Young's modulus to the temperature dependency of the Young's modulus of the crystalline semiconductor material. In this way, the suspension springs for the resonators have different properties, which influence the resonant frequency. The resonant frequency ratios between the first and second resonators at a calibration temperature and an operation temperature are measured. A frequency of one (or both) of the resonators at the operation temperature can then be derived which takes into account the temperature dependency of the one of the resonators.
    Type: Grant
    Filed: June 9, 2011
    Date of Patent: March 5, 2013
    Assignee: NXP B.V.
    Inventor: Robert James Pascoe Lander
  • Patent number: 8368474
    Abstract: In a SAW oscillator, each of a first SAW element and a second SAW element includes interdigital electrodes and a reflector formed on a piezoelectric material. A first oscillating circuit part forms an oscillating loop including the first SAW element. A second oscillating circuit part forms an oscillating loop including the second SAW element. The first and second oscillating circuit parts have an identical admittance property. The first and second SAW elements are configured that an electrode pitch is identical and an admittance property indicating a relation between a frequency and an admittance value is different therebetween. Further, a first intersection point between the admittance property of the first SAW element and the admittance property of the first oscillating circuit part and a second intersection point between the admittance property of the second SAW element and the admittance property of the second oscillating circuit part are at different frequencies.
    Type: Grant
    Filed: May 19, 2011
    Date of Patent: February 5, 2013
    Assignee: Denso Corporation
    Inventors: Kazuki Arakawa, Kazuhiko Kano
  • Patent number: 8344811
    Abstract: In a dual-hand capable voltage-controlled oscillator (VCO) device at least two voltage-controlled oscillator units (VCO1, VCO2) are coupled via a reactive component (A) and each said at least one voltage-controlled oscillator unit (VCO1, VCO2) further being connected to at least a respective external switching device (B1, B2) adapted to control an operating frequency of the (VCO) device.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: January 1, 2013
    Assignee: Telefonaktiebolaget L M Ericsson (publ)
    Inventor: Mingquan Bao
  • Publication number: 20120306581
    Abstract: A quartz transducer having four or more crystal-controlled oscillators intended for measurement of applied pressure and temperature. All four oscillators are controlled by crystal quartz resonators operating in the thickness-shear mode. Two crystals measure the pressure and temperature respectively. A third crystal is a reference, and the fourth crystal may be another reference crystal or a second temperature crystal. The output of the latter is either phase leading or phase lagging the thermal response of the main temperature sensor.
    Type: Application
    Filed: November 30, 2010
    Publication date: December 6, 2012
    Inventor: Oivind Godager
  • Patent number: 8319564
    Abstract: Integrated circuits with phase-locked loops are provided. Phase-locked loops may include an oscillator, a phase-frequency detector, a charge pump, a loop filter, a voltage-controlled oscillator, and a programmable divider. The voltage-controlled oscillator may include multiple inductors, an oscillator circuit, and a buffer circuit. A selected one of the multiple inductors may be actively connected to the oscillator circuit. The voltage-controlled oscillators may have multiple oscillator circuits. Each oscillator circuit may be connected to a respective inductor, may include a varactor, and may be powered by a respective voltage regulator. Each oscillator circuit may be coupled to a respective input transistor pair in the buffer circuit through associated coupling capacitors. A selected one of the oscillator circuits may be turned on during normal operation by supplying a high voltage to the selected one of the oscillator circuit and by supply a ground voltage to the remaining oscillator circuits.
    Type: Grant
    Filed: March 26, 2010
    Date of Patent: November 27, 2012
    Assignee: Altera Corporation
    Inventors: Weiqi Ding, Sergey Shumarayev, Wilson Wong, Ali Atesoglu, Sharat Babu Ippili
  • Patent number: 8294524
    Abstract: A representative integrated circuit comprises a clock signal generator that generates a clock signal, a code pattern generator that generates digital pattern data based on the clock signal, and a transversal digital-to-analog conversion (T-DAC) unit that includes a plurality of registers and a unary modulator (Umod) array. The T-DAC unit provides frequency selection ranges covering wide operational bands based on the digital pattern data and the clock signal.
    Type: Grant
    Filed: December 22, 2009
    Date of Patent: October 23, 2012
    Assignee: Lockheed Martin Corporation
    Inventor: Leopold E. Pellon
  • Publication number: 20120223779
    Abstract: This invention provides a voltage-controlled oscillator, comprising a first voltage-controlled oscillator circuit and a second voltage-controlled oscillator circuit. The first voltage-controlled oscillator circuit comprises a plurality of inductors, a plurality of variable capacitors, and a plurality of MOS transistors. The circuit configuration of the second voltage-controlled oscillator circuit is symmetrical to that of the first voltage-controlled oscillator circuit. The inductors of the first voltage-controlled oscillator circuit are cross-coupled to the inductors of the second voltage-controlled oscillator circuit.
    Type: Application
    Filed: July 6, 2011
    Publication date: September 6, 2012
    Applicant: National Taiwan University
    Inventors: Shey-Shi Lu, Hsien-Ku Chen
  • Publication number: 20120154060
    Abstract: A quadrature voltage-controlled oscillator (QVCO) apparatus including a first VCO, a second VCO, a first energy-storage element, a second energy-storage element, a third energy-storage element and a fourth energy-storage element is provided. The first VCO has a first and a second phase output ends. The second VCO has a third and a fourth phase output ends. A first and a second ends of the first energy-storage element respectively connect to the first and the third phase output ends. A first and a second ends of the second energy-storage element respectively connect to the second and the third phase output ends. A first and a second ends of the third energy-storage element respectively connect to the second and the fourth phase output ends. A first and a second ends of the fourth energy-storage element respectively connect to the first and the fourth phase output ends.
    Type: Application
    Filed: January 31, 2011
    Publication date: June 21, 2012
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chih-Hsiang Chang, Jung-Mao Lin, Ching-Yuan Yang
  • Patent number: 8195397
    Abstract: A time measurement device for a geologic downhole measurement tool is provided. The device includes a plurality of oscillators for measuring a time value. At least one of the plurality of oscillators has a first temperature range that is different from a second temperature range of at least another of the plurality of oscillators. A time measurement system and a method for providing a time measurement are also provided.
    Type: Grant
    Filed: January 14, 2009
    Date of Patent: June 5, 2012
    Assignee: Baker Hughes Incorporated
    Inventor: Martin Blanz
  • Publication number: 20120133446
    Abstract: A circuit includes an oscillator circuit including a first oscillator and a second oscillator. The first and the second oscillators are configured to generate signal having a same frequency and different phases. A transmission line is coupled between the first and the second oscillators.
    Type: Application
    Filed: November 30, 2010
    Publication date: May 31, 2012
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu-Ling Lin, Ying-Ta Lu, Hsiao-Tsung Yen, Ho-Hsiang Chen, Chewn-Pu Jou, Fu-Lung Hsueh
  • Patent number: 8130044
    Abstract: Configurable phase-locked loop circuitry is provided. The phase-locked loop circuitry may include a buffer having a buffer output and a multiplexer having inputs and an output. The phase-locked loop circuitry may include multiple voltage-controlled oscillators. The phase-locked loop circuitry may be configured to switch a desired one of the voltage-controlled oscillators into use. Each voltage-controlled oscillator may be controlled by control signals applied to a control input for that voltage-controlled oscillator. The control input of each voltage-controlled oscillator may be connected to the buffer output. The output of each voltage-controlled oscillator may be connected to a respective one of the multiplexer inputs. Power-down transistors may be used to disable unused voltage-controlled oscillators to conserve power. The power-down transistors and the multiplexer may be controlled by signals from programmable elements.
    Type: Grant
    Filed: June 19, 2008
    Date of Patent: March 6, 2012
    Assignee: Altera Corporation
    Inventors: William W. Bereza, Rakesh H. Patel
  • Patent number: 8115556
    Abstract: The device resonant comprises a plurality of synchronized oscillators. Each oscillator comprises a resonator which comprises detection means providing detection signals representative of oscillation of the resonator to a feedback loop connected to an excitation input of the resonator. The detection signals control the conductivity of the feedback loop of the oscillator. The excitation inputs of all the resonators are connected to a common point which constitutes the output of the resonant device. A capacitive load is connected between said common point and a reference voltage.
    Type: Grant
    Filed: February 23, 2010
    Date of Patent: February 14, 2012
    Assignee: Commissariat a l'Energie Atomique
    Inventors: Laurent Duraffourg, Philippe Andreucci, Eric Colinet, Sebastien Hentz, Eric Ollier
  • Patent number: 8013681
    Abstract: A communications device (100) includes a frequency divider circuit (106) having a plurality of frequency division ratios. The device also includes at least one phase-lock loop (PLL) circuit (101, 102, 103, 104, 110, 112) coupled to at least a signal input of the frequency divider circuit. The PLL circuit includes a local oscillator (LO) circuit (104) including a plurality of voltage controlled oscillators (VCOs) having different frequency tuning ranges. The device further includes at least one control input (105) coupled to at least the frequency divider circuit and the PLL circuit for specifying one of the plurality of VCOs and one of the plurality of frequency division ratios of the frequency divider circuit.
    Type: Grant
    Filed: August 5, 2009
    Date of Patent: September 6, 2011
    Assignee: Harris Corporation
    Inventor: Kenneth Beghini
  • Patent number: 7995318
    Abstract: Power at a selected frequency in the high frequency region of the spectrum is supplied by a power converter having a wide range of input voltages. The power converter uses a source oscillator and a NOR gate. The source oscillator generates a rectangular wave at the selected frequency and supplies that signal to one of the NOR gate inputs. The rectangular wave is differentiated and the differentiated signal is supplied to the second NOR input along with a feedback signal from an amplifier controlled by the NOR gate's output.
    Type: Grant
    Filed: January 26, 2011
    Date of Patent: August 9, 2011
    Inventor: Murray F Feller
  • Publication number: 20110169545
    Abstract: Very low phase noise radio frequency (RF) source having multiple discrete frequency outputs used, for example, to calibrate phase noise measurement systems. The calibrator output frequencies can be tailored for a particular application using a scalable architecture.
    Type: Application
    Filed: January 14, 2010
    Publication date: July 14, 2011
    Inventors: Shahen Minassian, Eli Levi
  • Publication number: 20110169580
    Abstract: A random number generator comprises a first high frequency (HF) oscillator, a second low frequency (LF) oscillator, and a sampling circuit. The HF oscillator generates a high frequency oscillating signal. The LF oscillator generates a low frequency oscillating signal. The LF oscillating signal is used to sample the HF oscillating signal to generate a sequence of random bits. In one preferred embodiment, the LF oscillator comprises a plurality of stages of inverters, and each inverter comprises a number of series-stacked minimum length transistors. The LF oscillating signal has a jitter distribution due to thermal noise present in each transistor of the LF oscillator. By series stacking a number of minimum length transistors in each inverter, the overall thermal noise in the LF oscillator is maximized to increase the jitter distribution of the LF oscillating signal and thereby increase the random behavior of the sequence of random bits.
    Type: Application
    Filed: November 30, 2010
    Publication date: July 14, 2011
    Inventor: James Dodrill
  • Patent number: 7952439
    Abstract: Multiple microwave oscillators can be phase locked such that the power output of multiple oscillators can be coherently combined to achieve a single output which has the total sum power of the multiple oscillators. Multiple oscillators assembled in a power combining array are phase locked using a locking signal provided at each oscillator via strategic placement of a partial obstruction between combined multiple oscillators and a load. This locking signal includes a minimum threshold level and preselected phase. A method for phase locking multiple microwave oscillators includes steps of combining power output of multiple microwave oscillators to achieve a single output to a load and inserting a partial obstruction between said at least two multiple oscillators and said load. The partial obstruction configured to provide a combined microwave oscillator signal including a minimum threshold and preselected phase.
    Type: Grant
    Filed: November 23, 2009
    Date of Patent: May 31, 2011
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Jeffry P. Heggemeier, James P. O'Loughlin, Matthew T. Domonkos, Robert Achenbach
  • Patent number: 7940830
    Abstract: Apparatus and systems for synthesizing frequencies for use in a fast hopping wireless communications system. A frequency synthesizer comprises a plurality of oscillators with each oscillator having a first input coupled to a reference clock frequency signal, and a signal selector having a control signal input and a plurality of reference clock inputs with each reference clock input coupled to an output from an oscillator. Each oscillator produces a reference frequency that is a harmonic of a reference clock frequency of the reference clock frequency signal, and the signal selector couples a reference clock input to an output based on a control signal provided by the control signal input.
    Type: Grant
    Filed: September 27, 2007
    Date of Patent: May 10, 2011
    Assignee: Infineon Technologies AG
    Inventors: Stefano Marsili, Marc Tiebout, Andrea Bevilacqua, Stefano Dal Toso
  • Publication number: 20110090015
    Abstract: A semiconductor integrated circuit includes a first ring oscillator to which a stress voltage is applied; a second ring oscillator to which the stress voltage is not applied; and a phase comparator configured to receive an output of the first ring oscillator and an output of the second ring oscillator, and to compare phases of the outputs. The first ring oscillator includes a switch circuit configured to switch between a first connection state in which ring connection of the first ring oscillator is disconnected to connect a predetermined node of the second ring oscillator to a predetermined node of the first ring oscillator, and a second connection state in which connection between the first ring oscillator and the second ring oscillator is disconnected to connect the first ring oscillator in a ring.
    Type: Application
    Filed: December 28, 2010
    Publication date: April 21, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Masaya Sumita, Keiichi Fujimoto
  • Publication number: 20110057734
    Abstract: An apparatus including a resonator electrode and a second electrode separated from the resonator electrode by a gap having a size that facilitates electron transfer across the gap, wherein the resonator electrode is a resonator electrode mounted for oscillatory motion relative to the second electrode that results in a size of the gap between the resonator electrode and the second electrode being time variable; a feedback circuit configured to convey an electron transfer signal dependent upon electron transfer across the gap as a feedback signal; and a drive electrode adjacent the resonator electrode configured to receive a feedback signal from a feedback circuit configured to provide a time-varying feedback signal dependent upon electron transfer across a gap.
    Type: Application
    Filed: December 28, 2009
    Publication date: March 10, 2011
    Inventors: Richard WHITE, Jani KIVIOJA
  • Publication number: 20110057733
    Abstract: An apparatus including a resonator electrode and a second electrode separated from the resonator electrode by a gap having a size that facilitates electron transfer across the gap, wherein the resonator electrode is a resonator electrode mounted for oscillatory motion relative to the second electrode that results in a size of the gap between the resonator electrode and the second electrode being time variable; a feedback circuit configured to convey an electron transfer signal dependent upon electron transfer across the gap as a feedback signal; and a drive electrode adjacent the resonator electrode configured to receive a feedback signal from a feedback circuit configured to provide a time-varying feedback signal dependent upon electron transfer across a gap.
    Type: Application
    Filed: September 10, 2009
    Publication date: March 10, 2011
    Inventors: Richard White, Jani Kivoja
  • Patent number: 7898342
    Abstract: In a circuit and a method of clock interpolation, an input signal at a first frequency is processed and at least one output signal having a second frequency being a multiple of the first frequency of the input signal is output. The circuit is defined by the fact that the input signal is measured with respect to frequency and phase in a PLL frequency measuring circuit, and by the fact that the measured input signal is multiplied by at least one frequency multiplier and an oscillator that follows the frequency multiplier.
    Type: Grant
    Filed: November 3, 2004
    Date of Patent: March 1, 2011
    Assignee: Heidelberger Druckmaschinen AG
    Inventors: Boris Jasniewicz, Hartmut Keyl
  • Patent number: 7893783
    Abstract: Disclosed is a resonator including a plurality of resonator elements each including at least oscillation parts and lower electrodes with an intervening space therebetween, in which the plurality of resonator elements are disposed in a closed system and the oscillation parts of the plurality of resonator elements are continuously formed in an integrated manner.
    Type: Grant
    Filed: May 20, 2008
    Date of Patent: February 22, 2011
    Assignee: Sony Corporation
    Inventors: Shinya Morita, Akira Akiba
  • Patent number: 7889017
    Abstract: A resonator containing a plurality of resonator elements, respectively having an electrode and an oscillating component opposed while having a space in between, arranged so as to form a closed system. The oscillating component of the plurality of resonator elements is continuously formed in an integrated manner.
    Type: Grant
    Filed: September 23, 2008
    Date of Patent: February 15, 2011
    Assignee: Sony Corporation
    Inventors: Shinya Morita, Akira Akiba
  • Patent number: 7876166
    Abstract: A coupled ring oscillator includes n ring oscillators (20) each including m inverter circuits (10), and a phase-coupling loop (40) in which m×n phase-coupling circuits (30), each of which couples signal phases at two points in a certain phase mode, are connected with each other to form a loop. Connection points at which the inverter circuits (10) are connected with each other and the connection points at which the phase-coupling circuits (30) are connected with each other are connected bijectively; and each of the inverter circuits (10) is connected between two points that divide the phase-coupling circuits (30) into two parts at a certain ratio.
    Type: Grant
    Filed: July 7, 2010
    Date of Patent: January 25, 2011
    Assignee: Panasonic Corporation
    Inventors: Shiro Dosho, Shiro Sakiyama, Noriaki Takeda
  • Patent number: 7863987
    Abstract: LC resonant voltage control oscillators are adopted as voltage control oscillators for the purpose of providing a clock generating and distributing apparatus that can generate and distribute a clock signal of high precision even in a high-frequency region of several giga hertz or higher, and of providing a distributive VCO-type clock generating and distributing apparatus in which voltage control oscillators oscillate in the same phase, and which can generate a clock signal of a desired frequency and distributes a high-frequency clock signal to each part within a chip more stably even in a high-frequency region reaching 20 GHz. Furthermore, an inductor component of a wire connecting the oscillation nodes of the oscillators is made relatively small, or the LC resonant oscillators are oscillated in synchronization by using injection locking, whereby the LC resonant voltage control oscillators stably oscillate in the same phase.
    Type: Grant
    Filed: March 23, 2006
    Date of Patent: January 4, 2011
    Assignee: Fujitsu Limited
    Inventors: Kouichi Kanda, Hirotaka Tamura, Hisakatsu Yamaguchi, Junji Ogawa
  • Patent number: 7812679
    Abstract: A frequency generation unit (FGU) 100 includes a plurality of selectable voltage controlled oscillators (110) whose output frequencies are chosen in relationship with a predetermined intermediate frequency (IF) and frequency divider value (M) to provide multi-band frequency generation capability in a single communication device. A programmable reference divider (104), phase detector (174) and programmable charge pump (106) take an incoming reference frequency (120) and generate a charge pump output (124) to optimize the in-band phase noise in the FGU 100. A fixed loop filter (108) filters the charge pump output (124) to generate a control voltage (126) for the selectable VCOs (110). The desired frequency band is selected and enabled using control logic (128).
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: October 12, 2010
    Assignee: Motorola, Inc.
    Inventor: Armando J. Gonzalez
  • Patent number: 7808328
    Abstract: This disclosure relates to delay cells in a ring oscillator that include sub-cells having a gain that is a function of a variable control signal and sub-cells with a gain that is set by a fixed control signal.
    Type: Grant
    Filed: November 30, 2007
    Date of Patent: October 5, 2010
    Assignee: Infineon Technologies AG
    Inventors: Eva Tatschl-Unterberger, Nicola DaDalt