Limiting Of Amplitude Patents (Class 333/17.2)
  • Patent number: 11817827
    Abstract: Circuits and methods for achieving good AM-AM and AM-PM metrics while achieving good power, PAE, linearity, and EVM performance in an amplifier. Embodiments provide an equalization approach which compensates for AM-AM and AM-PM variations in an amplifier by controlling bias voltage versus output power to alter the AM-AM and AM-PM profiles imposed by the amplifier. Differential amplifier embodiments include cross-coupled common-gate transistors that generate an equalization voltage that alters the gate bias voltage of respective main FETs in proportion to a power level present at the respective drains of the main FETs. Single-ended amplifier embodiments include an equalization circuit that alters the bias voltage to the gate of a main FET in proportion to a power level present at the main FET drain. Embodiments may also include a linearization circuit which alters the AM-PM profile of an input signal to compensate for the AM-PM profile imposed by a coupled amplifier.
    Type: Grant
    Filed: February 2, 2021
    Date of Patent: November 14, 2023
    Inventor: Daoud Salameh
  • Patent number: 11606068
    Abstract: Circuits and methods for achieving good amplifier AM-AM and AM-PM metrics while achieving good power, PAE, linearity, and EVM performance. Embodiments compensate for a non-linear distortion profile (e.g., an AM-PM and/or AM-AM profile) in an amplifier by pre-processing an input signal, such as a radio-frequency signal, to alter the non-linear distortion profile of the input signal so as to compensate for the non-linear distortion profile imposed by a coupled device, such as an amplifier.
    Type: Grant
    Filed: February 2, 2021
    Date of Patent: March 14, 2023
    Assignee: pSemi Corporation
    Inventor: Daoud Salameh
  • Patent number: 11588218
    Abstract: Methods and apparatus for a frequency selective limiter (FSL) having a magnetic material substrate that tapers in thickness and supports a transmission line that has segments and bends. The segments, which differ in width and are substantially parallel to each other, such that each segment traverses the substrate on a constant thickness of the substrate.
    Type: Grant
    Filed: August 11, 2021
    Date of Patent: February 21, 2023
    Assignee: Raytheon Company
    Inventors: Matthew A. Morton, Gerhard Sollner, Jason D. Adams, Poornima Varadarajan, Evelina Aleksandro Polyzoeva, Thomas M. Hartnett
  • Patent number: 11349185
    Abstract: Methods and apparatus for providing a frequency selective limiters (FSL) having a free-standing Yttrium Iron Garnet (YIG) film with first and second opposing surfaces. A metal plane is disposed on one surface of the YIG film to provide the YIG film with a metalized surface. At least one transducer is disposed on the other surface of the YIG film with a respective ends coupled to the metalized surface of the YIG film.
    Type: Grant
    Filed: May 11, 2020
    Date of Patent: May 31, 2022
    Assignee: Metamagnetics, Inc.
    Inventor: Michael Geiler
  • Patent number: 11349515
    Abstract: A first inductor is connected to an input terminal through a capacitive element. To the first inductor, an anti-parallel diode pair including a first diode and a second diode, and a second inductor are connected. The first inductor and the anti-parallel diode pair are coupled to each other by an electromagnetic field, thereby forming a coupling capacitance.
    Type: Grant
    Filed: August 25, 2020
    Date of Patent: May 31, 2022
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Takuma Torii, Masatake Hangai, Koji Yamanaka, Kazuhiro Nishida
  • Patent number: 11316551
    Abstract: Provided are a co-time co-frequency full duplexing system and a mobile terminal. The co-time co-frequency full duplexing system includes a baseband processing circuit, a transmitting terminal signal processing circuit, a receiving terminal signal transmission circuit, a signal transceiver circuit. A first end of the baseband processing circuit is electrically connected to a first end of the transmitting terminal signal processing circuit, a second end of the transmitting terminal signal processing circuit is electrically connected to a first end of the signal transceiver circuit, a second end of the baseband processing circuit is electrically connected to a first end of the receiving terminal signal processing circuit, a second end of the receiving terminal signal processing circuit is electrically connected to a second end of the signal transceiver circuit.
    Type: Grant
    Filed: May 21, 2018
    Date of Patent: April 26, 2022
    Assignee: VIVO MOBILE COMMUNICATION CO., LTD.
    Inventor: Baigang Wang
  • Patent number: 11139781
    Abstract: Disclosed is a method of reducing the Instantaneous to Average Power Ratio, IAR, of a transmitter system, comprising the steps of: receiving an input digital signal comprising a plurality of samples; extracting magnitude information for each of the plurality of samples; selecting a plurality of samples whose magnitude exceeds a predefined threshold; sorting, by magnitude, the selected plurality of samples; selecting from the sorted plurality of samples, only those samples having a spacing more than a first pre-defined spacing and filtering those samples, using an FIR filter; subtracting the output of the FIR filter from a delayed version of the input digital signal to produce an output signal.
    Type: Grant
    Filed: December 14, 2016
    Date of Patent: October 5, 2021
    Assignee: National University of Ireland, Maynooth
    Inventors: Pooria Varahram, John Dooley, Keith Finnerty, Ronan Farrell
  • Patent number: 10707547
    Abstract: A frequency selective limiter (FSL) is provided having a transmission line structure with a tapered width. The FSL includes a magnetic material having first and second opposing surfaces. A first conductor is disposed on the first surface of the magnetic material, where a width of the first conductor decreases from a first end of the FSL to a second end of the FSL along a length of the FSL. Two second conductors are disposed on the second surface of the magnetic material, where a width of a gap between the two second conductors decreases from the first end of the FSL to the second end of the FSL along a length of the FSL. The first conductor and two second conductors form a biplanar waveguide transmission line.
    Type: Grant
    Filed: June 26, 2018
    Date of Patent: July 7, 2020
    Assignee: Raytheon Company
    Inventors: Matthew A. Morton, Gerhard Sollner, Jason C. Soric
  • Patent number: 10608310
    Abstract: A frequency selective limiter (FSL) having an input port and an output port can comprise a plurality of vertically stacked transmission line structures. Each of the transmission line structures can be electrically coupled to a transmission line structure disposed directly above it and with a first one of the plurality of vertically stacked transmission line structures having one end corresponding to the FSL input port and a second one of the plurality of vertically stacked transmission line structures having one end corresponding to the FSL output port. Each of the plurality of vertically stacked transmission line structures can comprise a magnetic material having first and second opposing surfaces and one or more conductors disposed on at least one of the surfaces of the magnetic material.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: March 31, 2020
    Assignee: Raytheon Company
    Inventors: Matthew A. Morton, Jason C. Soric, Gerhard Sollner
  • Patent number: 10536125
    Abstract: A radio frequency (RF) limiter, and systems and methods thereof, to limit power of received high-power RF signals over a very broad bandwidth (e.g., approximately 17 octaves) using a single-channel solution. The limiter can be comprised of a coarse section and a fine section. The coarse section can include a first capacitor configured to receive a first RF signal; the rectifier, which is coupled to an output of the first capacitor; a transmission medium coupled to the output of the first capacitor and the rectifier; a plurality of PIN diodes each having a relatively thick I-region coupled between a second capacitor and the transmission medium; and a coupling mechanism configured to provide electrical coupling between the transmission medium and the rectifier. The rectifier can include a first inductor and a second inductor connected in series, and a Schottky diode coupled to the second inductor and the coupling mechanism.
    Type: Grant
    Filed: April 2, 2019
    Date of Patent: January 14, 2020
    Assignee: Lockheed Marin Corporation
    Inventors: Joseph Paul Jendrisak, David Lardiere
  • Patent number: 10036361
    Abstract: An ignition device is provided, the ignition device comprises a coaxial structural body comprising an inner conductor 2, an outer conductor 3, and an insulator 4 that insulates both the conductors 2 and 3, which are coaxially provided with one another along an axial direction. A connection terminal 5 is arranged at one axial end side of the coaxial structural body and connecting the inner conductor 2 and the outer conductor 3 to the electromagnetic wave oscillator MW.
    Type: Grant
    Filed: August 10, 2015
    Date of Patent: July 31, 2018
    Assignee: IMAGINEERING, INC.
    Inventors: Yuji Ikeda, Hidekazu Ohtsubo
  • Patent number: 9793257
    Abstract: An electrostatic discharge protection device includes first and second diodes series-connected between first and second connection terminals. A third connection terminal is coupled to a junction of the first and second diodes. A capacitor is connected in parallel with the first and second diodes between the first and second terminals.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: October 17, 2017
    Assignee: STMicroelectronics (Tours) SAS
    Inventors: Mathieu Rouviere, Arnaud Florence
  • Patent number: 9755877
    Abstract: A peak suppression device includes a suppression-signal generating unit and a band pass filter (BPF). The suppression-signal generating unit generates a suppression signal that is obtained by adding, to a transmission signal, a frequency component in which components of frequencies from a boundary of a band of the transmission signal to a frequency that is away therefrom toward an out-band of the transmission signal by predetermined frequencies are attenuated, out of frequency components of a signal to suppress a peak of the transmission signal. The BPF attenuates, after the suppression signal is amplified by the amplifier, a frequency component outside the band of the transmission signal in the amplified suppression signal.
    Type: Grant
    Filed: February 26, 2016
    Date of Patent: September 5, 2017
    Assignee: FUJITSU LIMITED
    Inventors: Hiroyoshi Ishikawa, Hikaru Ishikawa, Kazuo Nagatani, Takuro Nishikawa, Ryo Koizumi, Takeshi Sugiyama, Yasuharu Amezawa
  • Patent number: 9596114
    Abstract: A peak suppressing device (10) includes: a subtracting unit (11) that subtracts a predetermined threshold from an amplitude value of an input signal and generates a first peak signal; a multiplying unit (12) that multiplies the first peak signal by a weight coefficient and generates a second peak signal; a band limiting filter (13) that limits a band of the second peak signal, and generates a third peak signal; a subtracting unit (14) that subtracts the third peak signal from the input signal; and a weight coefficient generating unit (15) that generates the weight coefficient based on a value, the value being an amplitude value of the first peak signal divided by an amplitude value of a fourth peak signal generated when a convolution arithmetic operation is performed on by using at least a tap coefficient used in a center tap of the band limiting filter (13).
    Type: Grant
    Filed: December 4, 2013
    Date of Patent: March 14, 2017
    Assignee: NEC Corporation
    Inventor: Yoshiaki Doi
  • Patent number: 9571134
    Abstract: A transmit drive circuit with high signal to noise and frequency agility. In one embodiment, a transmit circuit includes a digital to analog converter, an amplifier, and a signal to noise enhancer, the signal to noise enhancer being a nonlinear passive device that attenuates low-power signals while transmitting high power signals with little loss. The signal to noise enhancer may be fabricated as a thin film of yttrium iron garnet (YIG) epitaxially grown on a gadolinium gallium garnet (GGG) substrate, the GGG substrate secured to a microwave transmission line from the input to the output of the signal to noise enhancer, such that the thin film of yttrium iron garnet is close to the transmission line.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: February 14, 2017
    Assignee: RAYTHEON COMPANY
    Inventors: Tina P. Srivastava, Matthew A. Morton, John Cangeme
  • Patent number: 9548293
    Abstract: An ESD (electrostatic discharge) protection device includes a first III-nitride p-i-n diode and a second III-nitride p-i-n diode connected to the first III-nitride p-i-n diode in an antiparallel arrangement configured to provide voltage clamping at 5V or less under forward bias of either the first or second III-nitride p-i-n diode for transient current in both forward and reverse directions. A corresponding method of manufacturing the ESD protection device is also provided.
    Type: Grant
    Filed: February 14, 2014
    Date of Patent: January 17, 2017
    Assignee: Infineon Technologies AG
    Inventor: Hubert Werthmann
  • Patent number: 9520909
    Abstract: A transmit drive circuit with high signal to noise and frequency agility. In one embodiment, a transmit circuit includes a digital to analog converter, an amplifier, and a signal to noise enhancer, the signal to noise enhancer being a nonlinear passive device that attenuates low-power signals while transmitting high power signals with little loss. The signal to noise enhancer may be fabricated as a thin film of yttrium iron garnet (YIG) epitaxially grown on a gadolinium gallium garnet (GGG) substrate, the GGG substrate secured to a microwave transmission line from the input to the output of the signal to noise enhancer, such that the thin film of yttrium iron garnet is close to the transmission line.
    Type: Grant
    Filed: December 4, 2014
    Date of Patent: December 13, 2016
    Assignee: RAYTHEON COMPANY
    Inventors: Tina P. Srivastava, Matthew A. Morton, John Cangeme
  • Patent number: 9490766
    Abstract: Electromagnetic interference (EMI) noise filter embodiments and methods for filtering are provided herein. EMI noise filters include multiple signal exclusion enclosures. The multiple signal exclusion enclosures contain filter circuit stages. The signal exclusion enclosures can attenuate noise generated external to the enclosures and/or isolate noise currents generated by the corresponding filter circuits within the enclosures. In certain embodiments, an output of one filter circuit stage is connected to an input of the next filter circuit stage. The multiple signal exclusion enclosures can be chambers formed using conductive partitions to divide an outer signal exclusion enclosure. EMI noise filters can also include mechanisms to maintain the components of the filter circuit stages at a consistent temperature. For example, a metal base plate can distribute heat among filter components, and an insulating material can be positioned inside signal exclusion enclosures.
    Type: Grant
    Filed: February 13, 2014
    Date of Patent: November 8, 2016
    Assignee: UT-Battelle, LLC
    Inventors: Roger Allen Kisner, David Lee Fugate
  • Patent number: 9455571
    Abstract: Embodiments provide a limiter circuit that includes a power splitter coupled with a plurality of antiparallel diode pairs. In some embodiments, the power splitter may be part of a first stage of the limiter circuit. Other embodiments may be described and claimed.
    Type: Grant
    Filed: December 22, 2015
    Date of Patent: September 27, 2016
    Assignee: Qorvo US, Inc.
    Inventors: Joseph J. Bouchez, Tuong Nguyen
  • Patent number: 8994471
    Abstract: A stacked diode limiter, which can suppress and eliminate a malicious high-power electromagnetic pulse signal and an Intentional Electromagnetic Interference (IEMI) signal that are input to the antenna line of a wireless system and that include a communication service frequency component having a power of several kW or more, includes a stacked diode unit including one or more diode stack parts formed on a center electrode of a coaxial line formed between an input connector and an output connector, each diode stack part being configured such that a plurality of diodes are arranged in series and stacked on top of one another, and an impedance matching unit for configuring dielectrics between the connectors and the coaxial line as heterogeneous dielectrics and matching impedances between the connectors and the coaxial line.
    Type: Grant
    Filed: February 27, 2014
    Date of Patent: March 31, 2015
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Seung-Kab Ryu, Kyung-Hoon Lee, Kwang-Uk Chu, Uijung Kim, Up Namkoong
  • Patent number: 8933762
    Abstract: An absorber unit is disclosed for increasing the noise immunity of a system bus. In order to improve the noise immunity of the system bus, the system bus is designed such that communication can take place in a defined communication frequency spectrum. In at least one embodiment, the absorber unit includes a high-pass filter and an absorber resistor. The high-pass filter can be connected to the system bus on the input side and to the absorber resistor on the output side and is dimensioned such that is has a low-impedance effect for noise signals above the communication frequency spectrum so that those signals are absorbed by the absorber resistor.
    Type: Grant
    Filed: March 26, 2009
    Date of Patent: January 13, 2015
    Assignee: Siemens Aktiengesellschaft
    Inventors: Bernhard Wiesgickl, Stefan Wiesgickl
  • Publication number: 20150002238
    Abstract: A stacked diode limiter, which can suppress and eliminate a malicious high-power electromagnetic pulse signal and an Intentional Electromagnetic Interference (IEMI) signal that are input to the antenna line of a wireless system and that include a communication service frequency component having a power of several kW or more, includes a stacked diode unit including one or more diode stack parts formed on a center electrode of a coaxial line formed between an input connector and an output connector, each diode stack part being configured such that a plurality of diodes are arranged in series and stacked on top of one another, and an impedance matching unit for configuring dielectrics between the connectors and the coaxial line as heterogeneous dielectrics and matching impedances between the connectors and the coaxial line.
    Type: Application
    Filed: February 27, 2014
    Publication date: January 1, 2015
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Seung-Kab RYU, Kyung-Hoon LEE, Kwang-Uk CHU, Uijung KIM, Up NAMKOONG
  • Publication number: 20130314154
    Abstract: The present disclosure provides a signal processing apparatus including: a short-circuiting controlling section configured to control whether or not the input side of a resistor connected between an input terminal and an output terminal and the output terminal are to be short-circuited in response to a signal level of a signal inputted from the input terminal; and a connection controlling section configured to control whether or not a resistor member is to be connected between the output terminal and a reference potential in response to the signal level of the signal, wherein at least one of the short-circuiting controlling section and the connection controlling section includes a plurality of switches disposed in parallel to each other for changing over a state thereof between open and closed states at signal levels different from each other.
    Type: Application
    Filed: May 21, 2013
    Publication date: November 28, 2013
    Applicant: SONY CORPORATION
    Inventor: Naoto Yoshikawa
  • Patent number: 8493160
    Abstract: The present invention relates to an electromagnetic signal power limiter and its design method. The power limiter for an electromagnetic signal includes at least one transmission line for the signal. The transmission line is made up of a number of passive micro-diodes with ballistic electron transport. The micro-diodes are distributed on the transmission line, and are implemented in a controlled atmosphere. The invention applies notably to radiofrequency or hyperfrequency waves received by detection and communication devices.
    Type: Grant
    Filed: November 27, 2008
    Date of Patent: July 23, 2013
    Assignee: Thales
    Inventors: Pierre Nicole, Alain Phommahaxay, Gaelle Lissorgues
  • Publication number: 20130141182
    Abstract: A device for improving the filter effect of a filter connected up between an electrical energy source and a source of interference is provided. The filter is configured to feed back interference transients from ground to an input of the source of interference generating the interference transients. The device includes a measuring device for determining a leakage current flowing through the filter and a final control element configured to modify a limit frequency of the filter such that the leakage current through the filter is damped to below a predefined level if the measuring device detects the leakage current.
    Type: Application
    Filed: May 31, 2012
    Publication date: June 6, 2013
    Inventors: Walter BEYERLEIN, Andre GEBHARDT, Tobias GBAßL, Thomas WEIDINGER
  • Publication number: 20130033316
    Abstract: An automatic step variable attenuator includes: a step variable attenuator attenuating a received signal of an electric wave signal in an attenuation amount corresponding to a control signal in a step-like style; a detector disposed in parallel with the step variable attenuator for input of the received signal of the electric wave signal, and converting an electric power of the received signal thus inputted into an intensity signal representing an intensity of the received signal; and a comparator portion generating the control signal corresponding to a result of comparison for differences between the intensity signal obtained from the detector and plural threshold values, and outputting the control signal thus generated to the step variable attenuator.
    Type: Application
    Filed: July 18, 2012
    Publication date: February 7, 2013
    Applicant: Sony Corporation
    Inventors: Noboru Sasho, Naoto Yoshikawa
  • Patent number: 8223080
    Abstract: A transmission and reception module according to one embodiment of the present invention includes an antenna, a transmission circuit, a wave detection circuit, a high-frequency switch, a small-signal high-frequency diode limiter circuit, and a first power amplifier. The antenna transmits a transmission wave, or receives a reception wave. The transmission circuit is connected to the antenna via a circulator and supplies the transmission wave to the antenna. The wave detection circuit is connected to the antenna via the circulator and branches the reception wave received by the antenna to generate a control signal based on one branched reception wave. The high-frequency switch is connected to the wave detection circuit and suppresses a power of the other branched reception wave when the control signal is input thereto.
    Type: Grant
    Filed: June 1, 2010
    Date of Patent: July 17, 2012
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Haruo Kojima
  • Patent number: 8213890
    Abstract: A system and method for sharing a switched capacitor array (SCA) by two tuning circuits are disclosed. In a multiple-band radio receiver, there is a need to use multiple tuning circuits for signals in different bands. The tuning circuit typically comprised an adjustable capacitance device and other tuning components, where the adjustable capacitance device is often implemented in SCA. The present invention discloses a system and method comprising n sections of capacitor elements where each capacitor element comprises a capacitor and switches to selectively connect the capacitor to one of the tuning circuit. Consequently, the SCA can be shared by the two tuning circuits. The control bits for the switched may be provided from a programmable control register.
    Type: Grant
    Filed: June 24, 2010
    Date of Patent: July 3, 2012
    Assignee: Quintic Holdings
    Inventors: Hao Meng, Peiqi Xuan
  • Patent number: 8198952
    Abstract: In order to provide a high-frequency limiter capable of absorbing variation in characteristic parameters of a PIN diode to acquire a desired limiting characteristic, an external re-entrant coaxial cavity is constituted by an external pedestal 15 and a cavity 34 inside a lower conductor part 13 and an upper conductor part 14, and an internal re-entrant coaxial cavity is constituted by an inner wall of the external pedestal 15 and by an internal pedestal 16 and a post 17. A PIN diode 18 is joined between the post 17 and the internal pedestal 16. Resonance windows 11 and 12 are provided between the resonator part and a waveguide connected thereto. A projected amount x of the external pedestal 15 with respect to the cavity 34 and an insertion amount y of the post 17 into the external pedestal 15 are adjustable independently.
    Type: Grant
    Filed: June 4, 2008
    Date of Patent: June 12, 2012
    Assignee: Furuno Electric Co., Ltd.
    Inventors: Misa Koreyasu, Tetsuya Takashima
  • Patent number: 8067996
    Abstract: A vanadium dioxide front-end advanced shutter device. The electronic shutter device is designed to protect receiver front-ends and other sensitive circuits from HPM pulse events such as HPM weapons, directed energy weapons, or EMPs. The shutter incorporates a transition material such as thin-film vanadium oxide (VOX) materials that exhibit a dramatic change in resistivity as their temperature is varied over a narrow range near a known critical temperature. A high-energy pulse causes ohmic heating in the shutter device, resulting in a state change in the VOX material when the critical temperature is exceeded. During the state change the VOX material transitions from an insulating state (high resistance) to a reflective state (low resistance). In the insulating state, the shutter device transmits the majority of the signal. In the reflective state, most of the signal is reflected and prevented from passing into electronics on the output side of the shutter device.
    Type: Grant
    Filed: November 14, 2008
    Date of Patent: November 29, 2011
    Assignee: Teledyne Scientific & Imaging, LLC
    Inventors: Christopher E. Hillman, Jeffrey F. De Natale, Jonathan B. Hacker, J. Aiden Higgins, Paul H. Kobrin
  • Patent number: 7999630
    Abstract: An electronic circuit comprising a power limiter circuit. The power limiter circuit comprises a plurality of cascaded transmission line sections, each transmission line section comprising a series arrangement of at least one diode and a dissipative element for absorbing excess input signal power connected in series. The series arrangement is connected between an output of the section and effective ground, a number of diodes connected in series in the series arrangements of the sections decreases with position of the section from an input of the power limiter to an output of the power limiter by steps of one or more diodes at least at part of the sections.
    Type: Grant
    Filed: February 19, 2007
    Date of Patent: August 16, 2011
    Assignee: Nederlandse Organisatie voor toegepast-natuurwetenschappelijk Onderzoek TNO
    Inventor: Arnoldus Petrus Maria Maas
  • Publication number: 20110156834
    Abstract: Embodiments of circuits, apparatuses, and systems for a protection circuit having a control element with an attenuation state to protect against overload conditions. Other embodiments may be described and claimed.
    Type: Application
    Filed: December 30, 2009
    Publication date: June 30, 2011
    Applicant: TRIQUINT SEMICONDUCTOR, INC.
    Inventor: John Bellantoni
  • Patent number: 7944321
    Abstract: There are included an LPF (3) and an HPF (4) that are connected in parallel to the output of a pre-emphasis circuit (2). There is also included a gain adjusting circuit (6) that performs a gain adjustment of low-pass filter with respect to the frequency band to be passed through the HPF (4). The low frequency components of the frequency band of baseband signals outputted from the pre-emphasis circuit (2) pass through the LPF (3), while the high frequency components pass through the HPF (4). As to the outputs from the HPF (4), the gain of especially the higher part of the frequency band components to be passed through the HPF (4) is suppressed by the gain adjusting circuit (6), whereby the amplitudes of the baseband signals can be limited only for the high frequency range without using a limiter and further the peak values of the baseband signals can be inhibited from exceeding the maximum frequency deviation.
    Type: Grant
    Filed: September 21, 2006
    Date of Patent: May 17, 2011
    Assignee: Ricoh Co., Ltd.
    Inventors: Takeshi Ikeda, Hiroshi Miyagi
  • Publication number: 20110057740
    Abstract: The present invention relates to an electromagnetic signal power limiter and its design method. The power limiter for an electromagnetic signal includes at least one transmission line for the signal. The transmission line is made up of a number of passive micro-diodes with ballistic electron transport. The micro-diodes are distributed on the transmission line, and are implemented in a controlled atmosphere. The invention applies notably to radiofrequency or hyperfrequency waves received by detection and communication devices.
    Type: Application
    Filed: November 27, 2008
    Publication date: March 10, 2011
    Applicant: THALES
    Inventors: Pierre Nicole, Alain Phommahaxay, Gaelle Lissorgues
  • Patent number: 7750753
    Abstract: A system includes a source of electromagnetic energy or power and an amplitude-sensitive circuit. An amplitude-limiting transmission line couples the source to the circuit. The transmission line includes a semiconductor in the field of the transmission line and a light source for illuminating the semiconductor with light responsive to the amplitude from the source. Application of energy or power to the light source illuminates the semiconductor, which produces a plasma. The plasma tends to attenuate the energy or power reaching the circuit.
    Type: Grant
    Filed: July 17, 2008
    Date of Patent: July 6, 2010
    Assignee: Lockheed Martin Corporation
    Inventors: Roland Cadotte, Jr., William G. Trueheart, Jr., Christopher W. Peters
  • Patent number: 7671748
    Abstract: A radiofrequency identification device (RFID) featuring an antenna (10) connected to a chip designed to be affixed to an object to be identified by a remote reader transmitting to the identification device electromagnetic signals received by the antenna and containing the data allowing the identification as well as the supply voltage (VDC) of the device, the antenna transmitting in return to said reader signals provided by the chip by retromodulation by means of a switch (22) in the chip whose open or closed position defines the digital identification data transmitted by the device. The chip features a variable impedance (30) connected in series with the switch to the terminals of the antenna and a means for detecting (32) the supply voltage to adjust the impedance value so that this supply voltage is always greater than a predetermined value (Vthreshold) below which the device can no longer transmit digital identification data.
    Type: Grant
    Filed: July 13, 2007
    Date of Patent: March 2, 2010
    Assignee: ASK S.A.
    Inventor: Yannick Grasset
  • Publication number: 20090322442
    Abstract: An electronic circuit comprising a power limiter circuit. The power limiter circuit comprises a plurality of cascaded transmission line sections, each transmission line section comprising a series arrangement of at least one diode and a dissipative element for absorbing excess input signal power connected in series. The series arrangement is connected between an output of the section and effective ground, a number of diodes connected in series in the series arrangements of the sections decreases with position of the section from an input of the power limiter to an output of the power limiter by steps of one or more diodes at least at part of the sections.
    Type: Application
    Filed: February 19, 2007
    Publication date: December 31, 2009
    Applicant: Nederlandse Organisatie voor toegepast- natuurwetenschappelijk Onderzoek TNO
    Inventor: Arnoldus Petrus Maria Maas
  • Patent number: 7557672
    Abstract: A frequency selective limiter includes a pair of back-to-back diodes, coupled to an input and an output of the frequency selective limiter, and a resonator. The resonator is coupled to the pair of back-to-back diodes.
    Type: Grant
    Filed: December 7, 2006
    Date of Patent: July 7, 2009
    Assignee: Northrop Grumman Systems Corporation
    Inventors: John Douglas Adam, James Edward Baumgardner
  • Publication number: 20080157896
    Abstract: The invention provides a novel broadband power limiter having improved frequency characteristics and power capacity, suitable for use with GaAs low-noise amplifier circuits. The power limiter includes a shunt diode circuit and two impedance transformers. The first transformer is a step-down impedance transformer connected between the shunt diode circuit and the input to the limiter, and the second transformer is a step-up impedance transformer connected between the shunt diode circuit and the output of the limiter. The invention further provides a method for limiting the power of an input signal, comprising the steps of: transforming the input signal from the input impedance to an intermediate impedance; shunting a portion of the input signal to ground; and transforming a remaining portion of the input signal from the intermediate impedance to an output impedance.
    Type: Application
    Filed: December 29, 2006
    Publication date: July 3, 2008
    Applicant: M/A-COM, INC.
    Inventor: Inder Jit Bahl
  • Patent number: 7385456
    Abstract: According to one embodiment of the invention, a power absorber for receiving a signal having a fundamental frequency includes an input node for receiving the signal and a first PIN diode circuit having a first end electrically connected at the input node and a second end. The first PIN diode circuit includes at least one PIN diode. The absorber also includes a load resistance having a first end electrically connected to the second end of the PIN diode circuit and a second end electrically connected to a reference voltage. The absorber also includes a quarter wave transmission line having a first end electrically connected to the input node at a second end. The quarter wave transmission line has an electrical link that is one quarter of the wavelength of the fundamental frequency. The power absorber also includes a second PIN diode circuit having an input electrically connected to the second end of the quarter wave transmission line and an output electrically connected to the reference voltage.
    Type: Grant
    Filed: May 12, 2005
    Date of Patent: June 10, 2008
    Assignee: Raytheon Company
    Inventors: David D. Heston, John G. Heston, Thomas L. Middlebrook, III
  • Patent number: 7352259
    Abstract: An integrated step attenuator (“ISA”) monolithically integrated on a single chip for adjusting an input signal. The ISA may include a step attenuation network (“SAN”) that may include at least one switchable attenuation section, and at least one electronically switchable trimming network (“ESTN”). The SAN may be configured to adjust the input signal responsive to the state of a switch that bridges the attenuation sections of the SAN, and the ESTN may be configured to adjust the input signal responsive to the state of a switch in signal communication with one or more shunt resistors in the ESTN.
    Type: Grant
    Filed: June 13, 2005
    Date of Patent: April 1, 2008
    Assignee: Agilent Technologies, Inc.
    Inventors: Eric R. Ehlers, David J. Dascher
  • Publication number: 20070229181
    Abstract: An impedance matching apparatus has: a storing portion 70 for previously storing, for plural positions which can be taken by a movable portion of a variable impedance element, allowable power values respectively corresponding to the plural positions of the movable portion; and an abnormality determining portion 80 for determining an allowable power value based on the present positions of the movable portion supplied from position detecting portions 41, 42 and the allowable power values stored in the storing portion 70, for comparing the allowable power value with an input power value, and for determining that it is abnormal when the input power value is larger than the allowable power value. Accordingly, the calculation load during the matching operation can be reduced.
    Type: Application
    Filed: March 19, 2007
    Publication date: October 4, 2007
    Applicant: Daihen Corporation
    Inventors: Shuji OMAE, Shinichi NEGI, Kosuke MAEDA
  • Patent number: 7171238
    Abstract: An antenna system is disclosed, to be used with a radio component particularly a wireless access point or bridge. The present system includes an antenna element for transmitting and receiving signals at radio frequencies. An antenna connector is provided for establishing a signal connection between the antenna element and a radio component. An electronic serialization component is provided for indicating one or more predetermined antenna characteristics. This component is adapted to read out the predetermined antenna characteristics through the antenna connector to the radio component.
    Type: Grant
    Filed: January 14, 2004
    Date of Patent: January 30, 2007
    Assignee: Cisco Technology, Inc.
    Inventor: James C. Nicholson
  • Patent number: 7154954
    Abstract: A communication system in which a reception signal can be accurately obtained from a signal transmitted over two-wire type transmission lines without any significant reduction in the communication speed. The communication system utilizing two-wire type transmission lines for transmitting transmission signals in opposite phases has a plurality of nodes connected to the two-wire type transmission lines, and each of the nodes incorporates terminating resistors acting upon the two-wire type transmission lines. A node which includes a reception circuit for receiving a transmission signal has an AC coupling circuit for extracting AC components in a transmission signal input through the transmission lines, a bias circuit for applying a bias voltage to a signal output from the AC coupling circuit and a clip circuit for clipping the level of a signal output from the bias circuit, which are provided at each of the two-wire type transmission lines.
    Type: Grant
    Filed: July 18, 2000
    Date of Patent: December 26, 2006
    Assignee: Honda Giken Kogyo Kabushiki Kaisha
    Inventors: Yuji Nagatani, Kazuya Iwamoto, Hiroshi Hashimoto
  • Patent number: 7009462
    Abstract: A limiter circuit comprises a quarter-wave transmission line, a first limiter element, a first DC return element, a second limiter element and a second DC return element. The quarter-wave transmission line, which has a predetermined characteristic impedance, comprises a signal line conductor and a common line conductor. The first limiter element is connected through a termination between the signal line conductor and the common line conductor at one side of the transmission line. The first DC return element is connected in parallel with the first limiter element. The second limiter element is connected between the signal line conductor and the common line conductor at another side of the transmission line. The second DC return element is connected to in parallel with the second limiter element.
    Type: Grant
    Filed: February 25, 2004
    Date of Patent: March 7, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Haruo Kojima
  • Patent number: 6998929
    Abstract: A frequency selective limiter operative in a magnetostatic surface mode with a pair of parallel microstrip transducers formed on a substrate and having a length at least equal to the width of an overlaying YIG film ranging in thickness from about 0.1 ?m and about 5.0 ?m and having a width equal to or less than about 20. mm and which is biased by a permanent magnetic field applied in the plane of the film parallel to the transducers so that magnetostatic surface waves propagate therebetween in the YIG film so as to provide a limiter threshold level in the range of ?75 dBm to ?35 dBm. The transducers have specific spacings and dimensions.
    Type: Grant
    Filed: April 29, 2003
    Date of Patent: February 14, 2006
    Assignee: Northrop Grumman Corporation
    Inventor: John Douglas Adam
  • Patent number: 6914538
    Abstract: A system and method for downhole power delivery. In one embodiment, the system delivers computer-regulated downhole power voltages, and may be configured to customize signal waveforms and power allocation on the various independent signal transmission modes to maximize the power capacity of the logging cable subject to its maximum voltage rating. In one embodiment, the system includes a standard multiconductor logging cable which supports orthogonal signal transmission modes on circumferentially spaced insulated conductors. A high-power power source on the surface is coupled to the insulated conductors in the cable to drive a power signal on the lowest impedance signal transmission mode. The system may further include multiple power sources operating on different independent signal transmission modes, and may also include multiple telemetry channels which share the power transmission modes via frequency multiplexing.
    Type: Grant
    Filed: August 30, 2002
    Date of Patent: July 5, 2005
    Assignee: Halliburton Energy Services, Inc.
    Inventors: Gary K. Baird, Carl Dodge, Thomas E. Henderson, Francisco Velasquez
  • Patent number: 6853264
    Abstract: A power limiter for limiting power of high frequency signals at an input to a receiver comprises a plurality of transmission line sections connected in succession. Each section has a series inductance coupling an input to an output of the section, and a shunt capacitance constituted by capacitance of at least one pair of oppositely-poled Schottky diodes coupled at the output of the section to limit voltage of the signal at the output. Individual diodes can be replaced by series-connected diodes, or by an array of parallel and series-connected diodes, in different sections for improved performance of the limiter. The limiter can be integrated with a GaAs low noise amplifier of the receiver.
    Type: Grant
    Filed: March 17, 2004
    Date of Patent: February 8, 2005
    Assignee: Nortel Networks Limited
    Inventors: Jeffrey H. Bennett, Yuanfei Cen
  • Publication number: 20040174226
    Abstract: A power limiter for limiting power of high frequency signals at an input to a receiver comprises a plurality of transmission line sections connected in succession Each section has a series inductance coupling an input to an output of the section, and a shunt capacitance constituted by capacitance of at least one pair of oppositely-poled Schottky diodes coupled at the output of the section to limit voltage of the signal at the output. Individual diodes can be replaced by series-connected diodes, or by an array of parallel and series-connected diodes, in different sections for improved performance of the limiter. The limiter can be integrated with a GaAs low noise amplifier of the receiver.
    Type: Application
    Filed: March 17, 2004
    Publication date: September 9, 2004
    Inventors: Jeffrey H. Bennett, Yuanfei Cen
  • Patent number: 6781474
    Abstract: An apparatus and method for tuning a filter (11) with oscillator alignment for applications where the filter tuning signal (19, 27) is generated independently of the local oscillator tuning signal and the tuning range is large, for example such as terrestrial and cable TV broadcasting (40 to 860 MHz). The filter being adapted to a filter tuning modulation signal (25) having a first frequency (F1) and a second frequency (F2). Values of the output signal (28) are measured, a first value (S1) at the first frequency, and a second value (S2) at the second frequency, and a comparison signal (26) is generated in comparing the first value and the second value to adjust filter with the tuning control signal in response to the comparison signal, modulation signal and an approximate filter tuning signal to provide a desired signal at the output signal.
    Type: Grant
    Filed: January 27, 2003
    Date of Patent: August 24, 2004
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Patrick Douziech, John Avis Shepherd