Abstract: A system including a receiver, a TMDS link (or other serial link), and a transmitter configured to transmit K-bit video words (typically, encoded 8-bit video words) over the link. In typical embodiments, the transmitter is configured to pack a sequence of N-bit video words, where N?K (e.g., N=10, 12, or 16, when K=8) into a sequence of K-bit fragments, encode the fragments, and transmit the encoded fragments. The transmitted data are indicative of a sequence of M-fragment groups, and the transmitter is typically configured also to transmit over the link packing phase data indicative of the phase of the most recently transmitted fragment. Other aspects are transmitters and receivers for use in such a system and methods implemented by any such transmitter, receiver, or system.

Abstract: An adapter apparatus to be installed on a pail to allow debris to be swept into the pail when the pail is resting on its side on a surface to be swept. A mounting section is included which is configured to be positioned over at least part of a lip of the pail and secured in place on the pail. A debris collector guide is attached to the mounting section, with the debris collector guide including a pair of sidewalls and a bottom section disposed intermediate the side walls, with the sidewalls and bottom section forming a debris collection region which permits debris to be swept into the debris section and into a pail on which the adapter apparatus is installed.

Abstract: An adjustable equalizer that includes a first branch including a low pass filter (LPF) and having a variable gain (?), and a second branch including a high pass filter (HPF) and having another variable gain (?). The equalizer can be implemented using CMOS technology so that the gain parameters ? and ? are independently adjustable and the equalizer is capable of equalizing an input indicative of data having a maximum data rate of at least 1 Gb/s. In some embodiments, the equalizer includes two differential pairs of MOS transistors and a controllable current source determines the tail current for each differential pair. When the equalizer includes purely resistive impedances Z0 and Z1, the equalizer's transfer function is Z1/Z0·(?+?·(1+s·C0·Z0)), where ? is a gain parameter determined by the tail current of one differential pair and ? is a gain parameter determined by the tail current of the other differential pair.

Abstract: In some embodiments, a wall-mountable, configurable controller having control keys (e.g., less than eight keys or another small number of keys), a subassembly including circuitry, and a control key insert removably mountable to the subassembly and including at least one of the control keys. The circuitry can include a limit switch that is biased in a default state but moveable into a learning state in response to user-exerted force. In some embodiments, the controller includes an IR emitter and an IR receiver and is operable to clone another device by sending configuring radiation from the emitter to the other device's IR receiver. Preferably, the emitter and receiver are positioned so that a controller's IR emitter aligns with the IR receiver of an identical controller when the controllers are positioned face to face. In some embodiments, the controller provides audible and visual feedback to users when operating in a learning mode.

Abstract: A PMOS device can be designed and manufactured in accordance with the invention to locate its drain junction breakdown point and maximum impact ionization point to reduce or eliminate drain breakdown voltage walk-in. In some embodiments, the drain junction breakdown point and maximum impact ionization point are located sufficiently far from the gate that the device exhibits no significant drain breakdown voltage walk-in. The device can be a high voltage power transistor having an extended drain region including a P-type lightly doped drain (P-LDD) implant, with drain junction breakdown and maximum impact ionization points appropriately located by controlling the implant dose employed to produce the P-LDD implant.

Abstract: An adjustable equalizer that includes a first branch including a low pass filter (LPF) and having a variable gain (?), and a second branch including a high pass filter (HPF) and having another variable gain (?). Outputs of the branches in response to an input signal are summed to produce an equalized output. The equalizer can be implemented using CMOS technology so that the gain parameters ? and ? are independently adjustable and the equalizer is capable of equalizing an input indicative of data having a maximum data rate of at least 1 Gb/s. Typically, the inventive equalizer is embodied in a receiver for use in equalizing a signal, indicative of video or other data, that has propagated over a serial link to the receiver.

Abstract: An apparatus and method for canceling variations in the beta for a bipolar junction transistor so that the diode equation can be employed to accurately measure the temperature of the transistor based at least in part on a ratio of two target collector currents and two measurements of the base-emitter voltage of the transistor. If the determined collector current of the transistor is relatively equivalent to one of the first and second target collector currents, the transistor's base-emitter voltage is measured and stored. An analog feedback circuit can be employed to change the determined collector current to be relatively equivalent to the first and second target collector currents. The analog feedback circuit can include an optional sample and hold component to further reduce power consumption and reduce noise. A digital circuit can be employed to change the determined collector current to be relatively equivalent to the first and second target collector currents.

Abstract: A computer implemented method of storing, manipulating, assessing, and displaying data and its relationships, and a computer system (with memory) programmed to implement such method. The data is stored into nodes, and visualized as a sea of linked nodes.

Abstract: A data sampling circuit that employs an oversampling clock to oversample a data signal, a phase tracking circuit for use in such a sampling circuit, and a receiver and system including such a sampling circuit. Preferably, phase tracking is implemented by systematically identifying and rejecting at least one worst sampling position, and sampling the data signal at a non-rejected sampling position. Preferably, phase tracking is accomplished by counting through-transitions of edges of the sampled data signal through each oversampling position, and rejecting an oversampling position having a highest count of through-transitions. In some embodiments, different phase tracking methods (at least one of which includes the step of generating through-transition counts) are used for different types of input data. Other aspects of the invention are methods for determining an oversampling position for oversampling a data signal, and methods for oversampling a data signal including by generating through-transition counts.

Abstract: A press specially adapted to compress a stack which includes one or more pressure sensitive based fastening layers which are actuated by application of substantial pressure. A lower press plate includes a receiving surface upon which the stack is positioned and first and second guide members, with the receiving surface being tilted with respect to a level plane such that the stack tends to move on the receiving surface towards the two guide members. An upper press plate is provided which includes a compressing surface which is substantially parallel with respect to the receiving surface when the press is in a first operating mode. A drive mechanism is provided for driving the lower and upper press plates towards one another so as to applying a compressing force to the stack.

Abstract: A communication system including a transmitter, a receiver, and a serial link (for example, a TMDS-like link) in which video data (or other data) are encrypted, the encrypted data are transmitted from the transmitter to the receiver, and the transmitted data are decrypted in the receiver, a transmitter and a receiver for use in such systems, a cipher engine for use in such a transmitter or receiver, a method for operating such a transmitter or receiver to encrypt or decrypt data, and a method for authenticating a receiver prior to transmission of encrypted data to the receiver over a serial link. Each transmitter, receiver, and cipher engine is configured to implement a content protection protocol in a manner that implements at least one and preferably more than one of a class of attack prevention features disclosed herein.

Abstract: In preferred embodiments, a cryptographic device in which two key sets are stored: a normal key set (typically unique to the device) and a test key set (typically used by each of a relatively large number of devices). The device uses the normal key set in a normal operating mode and uses the test key set in at least one test mode which can be a built-in self test mode. Alternatively, the device stores test data (e.g., an intermediate result of an authentication exchange) in addition to or instead of the test key set. In other embodiments, the invention is a cryptographic device including a cache memory which caches a portion of a key set for performing an authentication exchange and/or at least one authentication value generated during an authentication exchange. Other embodiments of the invention are systems including devices that embody the invention and methods that can be performed by systems or devices that embody the invention.

Abstract: An apparatus and method for canceling variations in the beta for a bipolar junction transistor so that the diode equation can be employed to accurately measure the temperature of the transistor based at least in part on a ratio of two target collector currents and two measurements of the base-emitter voltage of the transistor. If the determined collector current of the transistor is relatively equivalent to one of the first and second target collector currents, the transistor's base-emitter voltage is measured and stored. An analog feedback circuit can be employed to change the determined collector current to be relatively equivalent to the first and second target collector currents. The analog feedback circuit can include an optional sample and hold component to further reduce power consumption and reduce noise. A digital circuit can be employed to change the determined collector current to be relatively equivalent to the first and second target collector currents.

Abstract: A system for implementing a content protection protocol to encrypt data, including transmitters and receivers to which key selection vectors of a vector set have been distributed, wherein a subset of the key selection vectors in the vector set has not been distributed to any of the transmitters or any of the receivers, and a method for enabling transmitters and receivers to implement a content protection protocol including by distributing key selection vectors of a vector set, and private key sets, to the transmitters and receivers while reserving a subset of the key selection vectors of the vector set.

Abstract: Apparatus and method of increasing adhesion of thermal binder strips to coated papers by conditioning an edge of the sheet by splitting the edge which results in an expansion of the edge followed by compressing the edge so as to reduce or eliminate the expansion. In the case of a stack of sheets, the edge of the stack is conditioned by piercing the edge of the stack and in the case of an individual sheet, the conditioning is carried out by splitting at least a portion of the edge of the sheet.

Abstract: A method for manufacturing a chip with a metal heat flow path extending between a terminal of a transistor thereof and bulk semiconductor material of the chip (e.g., from the terminal to a substrate over which the transistor is formed or to the body of a semiconductor device adjacent to the transistor). The chip can be implemented by a semiconductor on insulator (SOI) process and can include at least one bipolar or MOS transistor, an insulator underlying the transistor, a semiconductor substrate underlying the insulator, and a metal heat flow path extending between a terminal of the transistor through the insulator to the substrate. Preferably, the metal heat flow path is a metal interconnect formed by a process step (or steps) of the same type performed to produce other metal interconnects of the chip.

Abstract: Apparatus and method for conditioning an edge of a sheet to be bound so that the edge is conducive to accepting heat activated adhesives used in conventional binding. The sheet is first bent in one direction to form a folding line, with the fold line being a short distance from the edge of the sheet to be conditioned and with that distance being determined primarily by the thickness of the sheet. The bend in the sheet is typically 90 degrees, with the radii of curvature of the opposite sheet surfaces at the fold line being unequal so that a shear force is applied near the sheet end thereby tending to tear or fracture in interior of the sheet near the end. Typically the sheet is then bent in an opposite direction along the folding line so as to produce an opposite shear force that reinforces the creation of tears and fractured in the sheet.

Abstract: A system including a receiver, a TMDS link (or other serial link), and a transmitter configured to transmit K-bit video words (typically, encoded 8-bit video words) over the link. In typical embodiments, the transmitter is configured to pack a sequence of N-bit video words, where N?K (e.g., N=10, 12, or 16, when K=8) into a sequence of K-bit fragments, encode the fragments, and transmit the encoded fragments. The transmitted data are indicative of a sequence of M-fragment groups, and the transmitter is typically configured also to transmit over the link packing phase data indicative of the phase of the most recently transmitted fragment. Other aspects are transmitters and receivers for use in such a system and methods implemented by any such transmitter, receiver, or system.

Abstract: In preferred embodiments, a method and system for pricing a derivative (e.g., a stock option) based on a non-Gaussian price model assuming statistical feedback. The dynamics of the underlying financial instrument (e.g., stock) are assumed to follow a stochastic process with anomalous nonlinear diffusion, phenomenologically modeled as a statistical feedback process within the framework of a generalized thermostatistics. Preferred embodiments implement solutions to a generalized form of the Black-Scholes differential equation, using risk-free asset valuation techniques in some cases.

Abstract: A binder strip cassette including a binder strip roll disposed within a cassette housing, with the roll including a multiplicity of elongated binder strips, each of said binder strips including a flexible substrate and an adhesive disposed on the substrate. The cassette is further provided with a drive apparatus for unwinding the binder strip roll to provide an unwound portion of the binder strip roll together with a separating apparatus disposed within the cassette housing for separating the binder strips from the elongated carrier of the unwound portion of the binder strip roll to produce a separated binder strip. The unwinding by the drive apparatus causes the separated binder strip to be at least partially ejected through a binder strip eject opening in the cassette housing.