Abstract: An assembly process properly positions and align a plurality of first die within a carrier substrate. The first die are positioned within cavities formed in the carrier substrate. The carrier substrate is then aligned with a second substrate having a plurality of second die fabricated therein. The first die and the second die are fabricated using different technologies. Aligning the carrier substrate and the second substrate aligns the first die with the second die. One or more first die can be aligned with each second die. Once aligned, a wafer bonding process is performed to bond the first die to the second die. In some cases, the carrier substrate is removed, leaving behind the first die bonded to the second die of the second substrate. In other cases, the carrier substrate is left in place as a cap. The second substrate is then cut to form die stacks.
Abstract: An integrated circuit package comprising an enclosure including a dielectric housing, a first electrical contact, and a second electrical contact. The dielectric housing, the first electrical contact, and the second electrical contact are configured to form a contact side of the enclosure. In addition, the first and second electrical contacts are sized to be substantially alignment insensitive for electro-mechanical connection to corresponding contacts of an end-use equipment. The enclosure encapsulates an integrated circuit die which is electrically coupled to the first and second electrical contacts. The alignment insensitive first and second electrical contacts may be electro-mechanically connected to corresponding contacts of an end-use equipment (e.g., a printer). Further, the integrated circuit package may be hosted by a peripheral device (e.g., a printer cartridge).
Type:
Grant
Filed:
April 5, 2007
Date of Patent:
December 25, 2012
Assignee:
Maxim Integrated Products, Inc.
Inventors:
Jeff Alan Gordon, Steven Hass, Hal Kurkowski, Scott Jones
Abstract: A dual span center pivot irrigation system comprising first and second center pivot span structures pivotally secured at their inner ends to a fixed center pivot structure. Each of the center pivot span structures are independently operable with the movements thereof being coordinated by suitable controls. The center pivot span structures may be operated in at least three different modes, namely: (1) independent wiper; (2) follow the leader; and (3) independent full circle.
Abstract: A packaging system for pharmaceuticals is provided. The system includes a box having an opening, a pouch strip positioned within the box. The pouch strip includes a continuous series of sealed pouches rolled into a spiral with a first end and a second end. The opening in the box is of a shape configured to accommodate the cross section of the sealed pouches such that the pouch strip may be pulled through the opening outwardly from the box.
Abstract: A circuit is provided that includes a parasitic power circuit that powers a parasitic circuit. The parasitic power circuit derives a supply voltage from an external AC or other signal suitable for use as a communications signal. A PMOS transistor or transistors is utilized to enable a supply voltage capacitor to charge substantially to the same voltage as the channel voltage of the communications signal.
Type:
Grant
Filed:
December 17, 2009
Date of Patent:
October 2, 2012
Assignee:
Maxim Integrated Products, Inc.
Inventors:
Marvin Lyle Peak, Jr., Bradley Mason Harrington, Matthew Ray Harrington
Abstract: A wafer-level packaged semiconductor device is described. In an implementation, the device includes one or more self-assembled resilient leads disposed on an integrated circuit chip. Each of the resilient leads are configured to move from a first position wherein the resilient lead is held adjacent to the chip and a second position wherein the resilient lead is extended away from the chip to interconnect the chip to a printed circuit board. A guard is provided to protect the resilient leads when the resilient leads are in the first position. One or more attachment bumps may also be furnished to facilitate attachment of the device to the printed circuit board.
Type:
Grant
Filed:
February 17, 2010
Date of Patent:
October 2, 2012
Assignee:
Maxim Integrated Products, Inc.
Inventors:
Chiung C. Lo, Arkadii V. Samoilov, Reynante Alvarado
Abstract: A sample tray assembly includes a first tray. The first tray defines a first slot and is disposed on a generally horizontally-oriented plane. The sample tray assembly also includes a second tray adjacent to the first tray. The second tray is configured for translational movement substantially parallel to the generally horizontally-oriented plane of the first tray between a retracted position and an extended position. The second tray defines a second slot. The second slot and the first slot are substantially aligned when the second tray is in the retracted position. The sample tray additionally includes a base member supporting the first tray. The second tray is slidably coupled with the base member.
Abstract: WLP semiconductor devices include bump assemblies that have a barrier layer for inhibiting electromigration within the bump assemblies. In an implementation, the bump assemblies include copper posts formed on the integrated circuit chips of the WLP devices. Barrier layers formed of a metal such as nickel (Ni) are provided on the outer surface of the copper posts to inhibit electromigration in the bump assembly. Oxidation prevention caps formed of a metal such as tin (Sn) are provided over the barrier layer. Solder bumps are formed over the oxidation prevention caps. The oxidation prevention caps inhibit oxidation of the barrier layer during fabrication of the bump assemblies.
Abstract: The present invention comprises nano obelisks and nanostructures and methods and processes for same. The nano obelisks of the present invention are advantageous structures for use as electron source emitters. For example, the ultra sharp obelisks can be used as an emitter source to generate highly coherent and high energy electrons with high current.
Type:
Grant
Filed:
October 30, 2007
Date of Patent:
August 21, 2012
Inventors:
Barry Chin Li Cheung, Joseph Reese Brewer, Nirmalendu Deo
Abstract: A digital video editing and playback system and methods of editing and playing back digital video are provided. The system includes a video processor adapted to receive video segments from multiple sources. The video segments include synchronization information. The video processor includes software instructions adapted to be executed by the video processor. The software instructions are adapted to evaluate the synchronization information from various video segments and to form associations between video segments from different sources that correspond to a common event.
Abstract: A device for securing an emission control element by a gastight seal within an exhaust system, and a device to secure loose hardware within an exhaust system. The device for securing the emission control element includes a structure that surrounds the emission control element and a structure that pushes against the emission control element. The structure that pushes against the emission control element uses a system of angled grooves and pushing means to create a force that holds the emission control element in place. The device to secure loose hardware includes a length of wire, the end of which is formed into a loop around the body of the hardware.