Abstract: Calibration parameters such as bias, azimuth misalignment and scale factor for a velocity measuring sonar transducer are determined by mounting the transducer in a tank of water on a stationary mount. A continuous belt on a pair of rollers at the bottom of the tank simulate the ocean floor. The sonar transducer is precisely aligned with the roller mechanism at 0.degree. and can be precisely rotated by 90.degree. from the 0.degree. position. The rollers are operated in a forward and reverse direction. Distance estimates provided by the transducer, together with precise measures of the distance traveled by the simulated ocean bottom, are utilized to compute the calibration parameters.

Abstract: A video controller board for supporting AX Japanese modes and enhanced VGA modes. The board includes two EGA video controllers to support the AX standard and a VGA video controller to support the enhanced VGA standard. Video memory sufficient to support the AX standard is shared by the VGA and EGA controllers. An interface renders the diverse protocols of the VGA and EGA controllers compatible with the shared memory so that each controller sees the memory in a configuration in accordance with its own protocol.

Abstract: An extendible linear sonar array for an Autonomous Underwater Vehicle (AUV) comprises a linear hydrophone array fixed in the nose of the AUV and two hydrophone array segments mounted at the leading edge of stabilization fins extendible from and retractable into the AUV. The stabilization fins are pivoted to move between extended and retracted positions where, in the extended position, the movable arrays together with the fixed nose array form a linear sonar array with extended width. In the retracted position, the stabilization fins with the hydrophone arrays pivot and fold back into stow channels in the AUV body. The stabilization fins may include movable control surfaces to control the attitude of the AUV, or the stabilization fins can be rotated when in the extended position to provide attitude control.

Abstract: A gravity gradiometer instrument alternately and sequentially rotatable in opposing angular increments provides a measure of the gravity gradient in-line and cross components without requiring real-time generation of trigonometric harmonic components, continuous demodulation to separate the component data signals, or filtering. Demodulation of the output data is accomplished by simple summing of the data from successive angular positions of radially opposing accelerometers. Precise control of the rotational speed is not required. Further, the accelerometer complement is minimal and because the direction of rotation is periodically reversed, a twist capsule is used rather than slip rings, thereby avoiding the noise and maintenance problems associated therewith.

Abstract: An interface between a real-time data link and a digital computer system utilizes data buffers between the computer central data storage and the data link. An interface control processor is responsive to a Data Transfer Command set comprising a SEND, a GET, a SET-TAG and a TERMINATE command. The commands include a TAG parameter that is set by the SET-TAG command to group sequences of SEND and GET commands so that logical streams of data are continuously transmitted and received across the interface. The SEND command includes a RECEIVE parameter to initiate the transfer of received data from the data link to the buffers after all data associated with the SEND command has been transmitted. Data transmission and reception operations are terminated by a TERMINATE command with a TAG parameter matching the TAG parameters of the sequence of commands controlling the operations. The SEND, GET and SET-TAG commands are stacked in a command queue and applied sequentially to the control processor.

Abstract: A voice Telephone Network Applications Platform (NAP) is enhanced to manage facsimile messages, as well as voice messages, by the addition of facsimile functionality to the platform actuatable by high-level facsimile commands from applications supported on the platform. The commands include sending and receiving facsimile messages. A PC facsimile processor (FP), interfacing between the platform and the telephone network, stores facsimile messages received from the network and facsimile messages for transmission to the network on hard disk. A facsimile command from an application is expanded into NAP commands for controlling the platform and FP commands for controlling the facsimile processor so as to perform the facsimile functionality associated with the facsimile command. A recovery process utilizing a Recovery Token prevents facsimile messages from becoming lost between receipt at the FP and storage in the platform.

Abstract: A User bus lockout prevention mechanism for use in a time-shared busy multiple bus User, computer architecture where bus Users include private cache systems which perform a cache cycle when a WRITE TO MEMORY instruction occurs on the bus to determine if data cached from main memory has been overwritten in main memory. A User can be locked out from use of the bus if a synchronism occurs between repetative cache cycles and periodicity of the Retry mechanism of the User. Bus lockout is prevented by the User with the cache issuing an INHIBIT WRITE to the bus when a cache cycle is being performed. Other Users inhibit issuing WRITE TO MEMORY requests to the bus until the INHIBIT WRITE signal terminates. Bus requests other than a write request may be issued to the bus during INHIBIT WRITE.

Abstract: A User bus lockout prevention mechanism for use in a time-shared bus, multiple bus User, computer architecture where bus Users have private cache systems which perform a cache cycle when a WRITE TO MEMORY instruction occurs on the bus to determine if data cached from main memory has been overwritten in main memory. A User can be locked out from use of the bus if a synchronism occurs between repetitive cache cycles and periodicity of the request Retry mechanism of the User. Bus lockout is prevented by controlling the Retry mechanism of the User to retry requests in accordance with a sequence of varying retry wait intervals. The sequence comprises bursts of short wait intervals interleaved with long wait intervals, the sequence beginning with a burst of short wait intervals. The wait interval durations of the first and second occurring bursts are interleaved with respect to each other. The second occurring long wait is longer than the first occurring long wait. The sequence is terminated upon bus grant.

Abstract: A voice message system for a pay phone telephone network interposes an Intercept Processing Subsystem (IPS) in the line connections between the pay telephones and the central office. A Voice Processing Subsystem (VPS) is connected to the central office switch by a trunk. A caller at a pay station enters a called telephone number which is stored in the IPS. The Intercept Processing Subsystem monitors the line connection to determine if the called telephone remains on-hook for a predetermined number of ring tones or is busy for a predetermined number of busy tones. If the ring no answer or busy condition maintains, the IPS reduces the volume of the ring or busy tones on the line connection and superimposes a voice announcement thereon offering the voice message service to the caller. If the caller enters an acceptance key sequence or coin deposit, the IPS splits the line connection, sends a Thank You message to the calling telephone and speed dials the VPS.

Abstract: A microburst precursor detector utilizes a multiplicity of radar beams and samples radar returns, in each beam, from meteorological radar signal reflectors and processes the signal returns in a statistical manner to determine average radar reflectivity and to extract doppler signal parameters. These parameters are utilized to determine a second set of parameters; average doppler frequency within each radar beam, doppler spectral spread within each radar beam, and the skewness of the doppler spectrum in each beam. The second set of parameters is processed to establish the existence of a microburst, predicted surface impact, time to impact, wind shear surface location and track, and the magnitude of the wind shear.

Abstract: A monitor is transformed into a predetermined type of digital computer system by attaching a personality module to the rear thereof. The module contains one or more circuit cards for imparting the desired personality to the system. The monitor includes an internal power supply for providing power to the module. Mating video and power connectors are included at the interface surfaces of the monitor and module for conveying video signals from the module to the monitor and power from the monitor to the module. Apertures at the top of the rear mounting surface of the monitor engage hooks at the top of the mounting surface of the module to form a disengagable hinged interface therebetween. Apertures are included at the bottom of the mating surface of the monitor for engaging rotary latches disposed at the bottom of the module. Each rotary latch comprises a triple-cut lead screw engaged in a nut captured in the module. A locking lever orthogonal to the lead screw imparts locking and unlocking rotation thereto.

Abstract: An interface between a real-time data link and a digital computer system utilizes data buffers between the computer central data storage and the data link. An interface control processor is responsive to a Data Transfer Command set comprising a SEND, a GET, a SET-TAG and a TERMINATE command. The commands include a TAG parameter that is set by the SET-TAG command to group sequences of SEND and GET commands so that logical streams of data are continuously transmitted and received across the interface. The SEND command includes a RECEIVE parameter to initiate the transfer of received data from the data link to the buffers after all data associated with the SEND command has been transmitted. Data transmission and reception operations are terminated by a TERMINATE command with a TAG parameter matching the TAG parameters of the sequence of commands controlling the operations. The SEND, GET and SET-TAG commands are stacked in a command queue and applied sequentially to the control processor.

Abstract: A primary processor provides control, address and data signals to a shadow comparison ASIC which also receives corresponding signals from a shadow processor running in delayed lock step with respect to the primary processor. The primary processor is coupled to a system CPU bus which communicates through a memory interface with a DRAM memory. An EDC circuit generates EDC syndrome bits with respect to data written by the primary processor into the memory through the interface. The EDC syndrome bits are stored in memory along with the data. The shadow comparison ASIC includes an identical EDC circuit for generating comparable syndrome bits from the data transmitted from the primary processor to the memory when in the write mode and from the data transmitted from the memory to the primary processor when in the read mode.

Abstract: The line of sight of an airborne radar antenna is stabilized from the pitch and roll motions of the aircraft by mounting the antenna on a three degree of freedom gimbal system. The gimbal system is comprised of a first gimbal mounted for rotation about the aircraft Z axis (azimuth) for pointing the antenna along the intended line of sight, a second gimbal mounted on the first gimbal for rotating up and down with respect to the azimuth gimbal and a third gimbal mounted on the second gimbal to which the antenna is connected for providing rotation to align antenna polarization relative to inertial ground. A two degree of freedom stabilization gyro provides stabilizing signals representative of aircraft pitch and roll motions with respect to inertial reference axes.

Abstract: A PC video adapter board for driving a VGA color monitor, the board including a VGA video color palette DAC for providing analog color video to the monitor. A VGA controller provides VGA digital color video signals to the DAC through a first multiplexer and timing signals to the monitor through a second multiplexer. The board also includes EGA video controllers and a Japanese EGA (JEGA). A read/write register is written from the computer to contain additional EGA digital color bits for supplementing the six JEGA bits so as to provide a full eight bits of digital video in the EGA modes. The register provides a control bit to switch the first and second multiplexers between the VGA and EGA digital color video and timing signals.

Abstract: A weather surveillance apparatus utilizes a set of beams in an elevation angular sector, one beam being offset from the other by a predetermined offset angle. Radar signal returns in each beam are processed to establish an average doppler frequency shift for the signals in the respective beams. An average of the averages and a difference of the averages are determined which are utilized to establish horizontal and vertical wind velocities. These velocities are further processed to determine whether a microburst precursor exists and the location, magnitude, time to impact, and track of any resulting windshear.

Abstract: An image to be smoothed is represented by a matrix of pixels arranged in a plurality of adjacent scan lines. Each pixel under examination is changed to the value of a predetermined number of pixels in a 3.times.3 pixel neighborhood surrounding the pixel under examination. The image pixels are represented by a sequence of 16 bit digital words, each bit representing a corresponding pixel. The bits of three adjacent words on three adjacent scan lines are accumulated in 16 counters, respectively, with the words shifted so that the 9 bits of each of sixteen 3.times.3 neighborhoods are simultaneously accumulated in the sixteen counters. Each counter is constructed so that when a predetermined number of ONEs is accumulated from the 3.times.3 neighborhoods, the most significant counter stage goes to ONE and remains at ONE irrespective of further accumulation. One of the three words is the word to be smoothed.

Abstract: A ring-type magnetic recording and reading head having a saturable pole tip that defines a narrow gap for reading and saturates in response to normal write current so as to define a wide gap for recording.

Abstract: Range gate delay is effected by serially connected coarse and fine programmable delay lines. The radar transmit trigger pulse is propagated through the programmable delay lines to provide a delayed trigger pulse. The delayed trigger pulse triggers a range gate generator for generating the range gate. The delay effected by the coarse and fine programmable delay lines is controlled from the system CPU. The range gate generator comprises a D-type flip-flop with the Q output thereof connected as the input to a further programmable delay line. The delayed trigger pulse sets the flip-flop and the output of the further programmable delay line resets the flip-flop. The range gate is provided by the Q output of the flip-flop. The width of the range gate is determined by the delay set into the further programmable delay line by the system CPU.

Abstract: Interprocessor message communication and synchronization apparatus and method for a plurality of processors connected to a system bus. The message communication photocol involves utilizing an array of mailbox locations associated with the processors, respectively, and located in common memory accessible to all of the processors. A processor desiring to send a message to another processor inserts the message into its mailbox along with the address of the other processor. The sending processor interrupts the receiving processor which, in response to the interrupt, scans the mailboxes to find the mailbox with its address therein thereby receiving the message. The interrupt is effected by the sending processor broadcasting an input/output write instruction on the system bus along with the address of the receiving processor and a data field representative of the interrupt to be transmitted.