Abstract: A method for forming a magnetically biased magnetoresistive (MR) layer. There is first provided a substrate. There is then formed over the substrate a ferromagnetic magnetoresistive (MR) material layer. There is then forming contacting the ferromagnetic magnetoresistive (MR) material layer a magnetic material layer formed of a first crystalline phase, where the magnetic material layer is formed of a crystalline multiphasic magnetic material having the first crystalline phase which does not appreciably antiferromagnetically exchange couple with the ferromagnetic magnetoresistive (MR) material layer and a second crystalline phase which does appreciably antiferromagnetically exchange couple with the ferromagnetic magnetoresistive (MR) material layer.
Abstract: A spin-on-glass sandwich layer planarization process where the spin-on-glass layer within the sandwich has been ion implanted through its entire thickness. The spin-on-glass sandwich layer is formed by successive deposition of a silicon oxide layer, followed by a spin-on-glass layer. The spin-on-glass layer is then thermally cured and ion implanted throughout its entire thickness. Various combinations of implanting ions, ion doses and implantation energies are used to implant the spin-on-glass layer. Finally, a second silicon oxide layer is formed upon the surface of the spin-on-glass layer to complete the spin-on-glass sandwich layer.
Type:
Grant
Filed:
April 27, 1995
Date of Patent:
March 5, 1996
Assignee:
United Microelectronics Corporation
Inventors:
Sun-Cheih Chien, Chen-Chiu Hsue, Yu-Ju Liu
Abstract: A field effect transistor which is not susceptible to mask edge defects at its gate spacer oxides. The transistor is formed upon a (100) silicon semiconductor substrate through successive layering of a gate oxide, and a gate electrode. A pair of gate spacer oxides is then formed covering opposite edges of the gate oxide and the gate electrode. A screen oxide is then formed over the surface of the semiconductor substrate, the gate and the gate spacer oxides. The upper surface of the screen oxide has an angle of elevation not exceeding 54.44 degrees with respect to the semiconductor substrate. The screen oxide also smoothly flows from thicker regions at the junctures of the gate spacer oxides and the semiconductor substrate to thinner regions over the surface of the semiconductor substrate. The semiconductor substrate adjoining the gate spacer oxides is then ion implanted through the screen oxide to form amorphous source/drain electrodes.