Abstract: An electrical component is provided that has a plurality of electrical leads. Further, an electromagnetic interference shield and ground cage is provided which has a plurality of conductive walls connected together to form an enclosure having an open bottom. One of the walls has a plurality of openings formed therein to allow the plurality of leads to be passed into the enclosure. The electromagnetic interference shield and ground cage further has at least two ground connection pins attached to a lower edge of the walls. One of the leads is a ground lead that is electrically coupled to the electromagnetic interference shield and ground cage at one of the openings, thus reducing the length, inductance and impedance of the ground lead.

Abstract: Weighting coefficients for a phased array antenna are iteratively refined to optimal values by a ‘bootstrapped’ process that starts with a coarse set of weighting coefficients, to which received signals are subjected, to produce a first set of signal estimates. These estimates and the received signals are iteratively processed a prescribed number of times to refine the weighting coefficients, such that the gain and/or nulls of antenna's directivity pattern will maximize the signal to noise ratio. Such improved functionality is particularly useful in association with the phased array antenna of a base station of a time division multiple access (TDMA) cellular communication system, where it is necessary to cancel interference from co-channel users located in cells adjacent to the cell containing a desired user and the base station.

Abstract: To provide either or both multiplexed and non-multiplexed (loop repeater) mode communications in the same equipment shelf between a network and plural subscriber circuits, a multi-mode backplane architecture includes a network interface multiplexer that provides time division multiplexed signal connectivity and point-to-point multiplexed signal connectivity between the network and line circuit access modules, to which the subscriber circuits are selectively ported. Each of a plurality of non-multiplexed interface connectors is configured for external connection to non-multiplexed communication links of the network and non-multiplexed communication links of the subscriber circuits. A plurality of access module card slots receive line circuit access modules that are individually programmable to provide a selected one of a plurality of diverse modes of telecommunication connectivity between the network and a subscriber circuit.

Abstract: A compensation circuit for minimizing undesirable effects of parasitic components, such as a parasitic capacitance of a controlled electronic device (e.g., transistor) is coupled in parallel with the controlled electronic device in a manner that is effective to decrease the spurious AC signal-coupling of the parasitic component, such that the amplitude of the unwanted AC noise voltage across the load element is very significantly reduced, or effectively minimized. The parametric values of the transfer function of the electronic device in the by-pass compensation circuit are such as to attenuate the unwanted AC noise voltage across the load, by a factor that approximates the amplitude of the spurious signal, thereby effectively minimizing its unwanted contribution to the load voltage.

Abstract: The range of digital data communication services, such as a basic rate 2B1Q ISDN channel, to customer premises located beyond the industry standard achievable range of a two-wire loop can be extended by increasing the capacity of the ISDN line code from two information bits per symbol to three information bits per symbol, so as to reduce the effective symbol rate, which is error correction encoded to an effective 4B1H line code for defining a sixteen level PAM signal waveform, and employing enhanced low signal-to-noise ratio signal processing techniques in both the transmitter and receiver to accommodate the increased insertion loss of the two-wire line resulting from its extended length. Such enhanced low signal-to-noise ratio signal processing techniques include a Tomlinson precoder in the transmitter, and an adaptive linear equalizer and a module unit in the receiver.

Abstract: A simple network management protocol (SNMP) agent is distributed among individual channel units of frame relay switching system, rather than in a proxy device. The SNMP agent is implemented by encoding the identity of an individual channel device for whom a data packet is intended in the community data string portion of an SNMP packet. For a read request, the address of a channel unit is encoded as an augmented community string, such as “public.#”. For a write request, the address is encoded as an augmented community string, such as “private.#”.

Abstract: A buffer delay control mechanism controls the operation of a packet buffer of a digitized packet-based transmission network. The packet buffer receives packets from the network and controllably reads out packets for application to a digitized packet signal processor. A nominal buffer delay is maintained in the absence of an increase in delay in receipt of packets from the network. In response to an increase in network delay, the buffer delay is increased, and thereafter maintained at the increased value in the absence of a further increase in delay in receipt of packets from the network. For any further increase in throughput delay, the buffer delay is again updated, so as to maintain the value of buffer delay at a value associated with maximum encountered transport delay through the network.

Abstract: An image processing system renders, displays and provides virtual user navigation through multiple size and aspect views of a three-dimensional (3D) geometric model of an object, such as an urban scene. A user interface, such as a mouse or joystick device, is coupled to a digital image processor and is employed to supply image manipulation signals to the digital image processor for manipulating images displayed upon a digital image display device. The digital image display device contains an overview display window that displays the object from a ‘bird's eye’ or map perspective, and an inset display window that displays the object from a ‘down inside the scene’ perspective. In response to user interface-sourced commands, the processor can swap the two image perspectives and/or controllably navigate through the inset image.

Abstract: To mitigate against base current errors in a current mirror circuit that has limited overhead voltage, a compensated current mirror circuit includes complementary polarity, base current error compensation circuits coupled to a current mirror control node, referenced to the collector-emitter current path of an input transistor. To compensate for total number of base current error components in the output transistor-based mirror circuit, auxiliary transistors are coupled in the collector-emitter paths of the current mirror output transistors, referenced to a relatively large voltage well in excess of the supply rail, to provide ample output current path headroom for the insertion of the auxiliary transistors. By summing and mirroring the base offset currents of these auxiliary transistors back to the control node, the output current mirror transistors are driven with a composite current that makes their output currents equal with the input current and effectively free of base current errors.