Patents Represented by Attorney, Agent or Law Firm Andrew L. Filler
-
Patent number: 7473943Abstract: Methods, systems, and apparatuses for electronic devices having improved gate structures are described. An electronic device includes at least one nanowire. A gate contact is positioned along at least a portion of a length of the at least one nanowire. A dielectric material layer is between the gate contact and the at least one nanowire. A source contact and a drain contact are in contact with the at least one nanowire. At least a portion of the source contact and/or the drain contact overlaps with the gate contact along the nanowire the length. In another aspect, an electronic device includes a nanowire having a semiconductor core surrounded by an insulating shell layer. A ring shaped first gate region surrounds the nanowire along a portion of the length of the nanowire. A second gate region is positioned along the length of the nanowire between the nanowire and the substrate.Type: GrantFiled: September 22, 2005Date of Patent: January 6, 2009Assignee: Nanosys, Inc.Inventors: Shahriar Mostarshed, Jian Chen, Francisco Leon, Yaoling Pan, Linda T. Romano
-
Patent number: 7468315Abstract: The present invention relates to a system and process for producing a nanowire-material composite. A substrate having nanowires attached to a portion of at least one surface is provided. A material is deposited over the portion to form the nanowire-material composite. The process further optionally includes separating the nanowire-material composite from the substrate to form a freestanding nanowire-material composite. The freestanding nanowire material composite is optionally further processed into an electronic substrate. A variety of electronic substrates can be produced using the methods described herein. For example, a multi-color light-emitting diode can be produced from multiple, stacked layers of nanowire-material composites, each composite layer emitting light at a different wavelength.Type: GrantFiled: September 14, 2005Date of Patent: December 23, 2008Assignee: Nanosys, Inc.Inventors: Mihai A. Buretea, Jian Chen, Calvin Y. H. Chow, Chunming Niu, Yaoling Pan, J. Wallace Parce, Linda T. Romano, David P. Stumbo
-
Patent number: 7466533Abstract: This invention provides novel capacitors comprising nanofiber enhanced surface area substrates and structures comprising such capacitors, as well as methods and uses for such capacitors.Type: GrantFiled: August 17, 2007Date of Patent: December 16, 2008Assignee: Nanosys, IncInventors: Calvin Y.H. Chow, Robert S. Dubrow
-
Patent number: 7438833Abstract: The present invention provides compositions (small molecules, oligomers and polymers) that can be used to modify charge transport across a nanocrystal surface or within a nanocrystal-containing matrix, as well as methods for making and using the novel compositions.Type: GrantFiled: May 16, 2005Date of Patent: October 21, 2008Assignee: Nanosys, Inc.Inventors: Jeffery A. Whiteford, Mihai A. Buretea, Erik C. Scher
-
Patent number: 7427328Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.Type: GrantFiled: November 21, 2006Date of Patent: September 23, 2008Assignee: Nanosys, Inc.Inventors: Xiangfeng Duan, Chunming Niu, Stephen A. Empedocles, Linda T. Romano, Jian Chen, Vijendra Sahi, Lawrence A. Bock, David P. Stumbo, J. Wallace Parce, Jay L. Goldman
-
Patent number: 7422980Abstract: Methods of positioning and orienting nanostructures, and particularly nanowires, on surfaces for subsequent use or integration. The methods utilize mask based processes alone or in combination with flow based alignment of the nanostructures to provide oriented and positioned nanostructures on surfaces. Also provided are populations of positioned and/or oriented nanostructures, devices that include populations of positioned and/or oriented nanostructures, systems for positioning and/or orienting nanostructures, and related devices, systems and methods.Type: GrantFiled: November 21, 2006Date of Patent: September 9, 2008Assignee: Nanosys, Inc.Inventors: Xiangfeng Duan, R. Hugh Daniels, Chunming Niu, Vijendra Sahi, James M. Hamilton, Linda T. Romano
-
Patent number: 7391018Abstract: The present invention generally discloses the use of a nanostructured non-silicon thin film (such as an alumina or aluminum thin film) on a supporting substrate which is subsequently coated with an active layer of a material such as silicon or tungsten. The base, underlying non-silicon material generates enhanced surface area while the active layer assists in incorporating and transferring energy to one or more analytes adsorbed on the active layer when irradiated with a laser during laser desorption of the analyte(s). The present invention provides substrate surfaces that can be produced by relatively straightforward and inexpensive manufacturing processes and which can be used for a variety of applications such as mass spectrometry, hydrophobic or hydrophilic coatings, medical device applications, electronics, catalysis, protection, data storage, optics, and sensors.Type: GrantFiled: September 14, 2005Date of Patent: June 24, 2008Assignee: Nanosys, Inc.Inventors: Chunming Niu, Robert Hugh Daniels, Robert S. Dubrow, Jay L. Goldman
-
Patent number: 7382017Abstract: Methods and apparatuses for nanoenabled memory devices and anisotropic charge carrying arrays are described. In an aspect, a memory device includes a substrate, a source region of the substrate, and a drain region of the substrate. A population of nanoelements is deposited on the substrate above a channel region, the population of nanolements in one embodiment including metal quantum dots. A tunnel dielectric layer is formed on the substrate overlying the channel region, and a metal migration barrier layer is deposited over the dielectric layer. A gate contact is formed over the thin film of nanoelements. The nanoelements allow for reduced lateral charge transfer. The memory device may be a single or multistate memory device.Type: GrantFiled: April 3, 2007Date of Patent: June 3, 2008Assignee: Nanosys, IncInventors: Xiangfeng Duan, Calvin Y. H. Cho, David L. Heald, Chunming Niu, J. Wallace Parce, David P. Stumbo
-
Patent number: 7345307Abstract: The present invention is directed to thin film transistors using nanowires (or other nanostructures such as nanoribbons, nanotubes and the like) incorporated in and/or disposed proximal to conductive polymer layer(s), and production scalable methods to produce such transistors. In particular, a composite material comprising a conductive polymeric material such as polyaniline (PANI) or polypyrrole (PPY) and one or more nanowires incorporated therein is disclosed.Type: GrantFiled: September 22, 2005Date of Patent: March 18, 2008Assignee: Nanosys, Inc.Inventors: Yaoling Pan, Francisco Leon, David P. Stumbo
-
Patent number: 7344617Abstract: This invention provides novel nanofibers and nanofiber structures which posses adherent properties, as well as the use of such nanofibers and nanofiber comprising structures in the coupling and/or joining together of articles or material.Type: GrantFiled: March 14, 2006Date of Patent: March 18, 2008Assignee: Nanosys, Inc.Inventor: Robert Dubrow
-
Patent number: 7295419Abstract: This invention provides novel capacitors comprising nanofiber enhanced surface area substrates and structures comprising such capacitors, as well as methods and uses for such capacitors.Type: GrantFiled: August 21, 2006Date of Patent: November 13, 2007Assignee: Nanosys, Inc.Inventors: Calvin Y. H. Chow, Robert S. Dubrow
-
Patent number: 7273732Abstract: The present invention is directed to systems and methods for nanowire growth and harvesting. In an embodiment, methods for nanowire growth and doping are provided, including methods for epitaxial oriented nanowire growth using a combination of silicon precursors. In a further aspect of the invention, methods to improve nanowire quality through the use of sacrifical growth layers are provided. In another aspect of the invention, methods for transferring nanowires from one substrate to another substrate are provided.Type: GrantFiled: July 21, 2006Date of Patent: September 25, 2007Assignee: Nanosys, Inc.Inventors: Yaoling Pan, Xiangfeng Duan, Robert S. Dubrow, Jay L. Goldman, Shahriar Mostarshed, Chunming Niu, Linda T. Romano, Dave Stumbo
-
Patent number: 7262501Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.Type: GrantFiled: April 18, 2006Date of Patent: August 28, 2007Assignee: Nanosys, Inc.Inventors: Xiangfeng Duan, Chunming Niu, Stephen Empedocles
-
Patent number: 7233041Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.Type: GrantFiled: July 21, 2006Date of Patent: June 19, 2007Assignee: Nanosys, Inc.Inventors: Xiangfeng Duan, Chunming Niu, Stephen A. Empedocles, Linda T. Romano, Jian Chen, Vijendra Sahi, Lawrence A. Bock, David P. Stumbo, Parce J. Wallace, Jay L. Goldman
-
Patent number: 7179561Abstract: The present invention discloses nanowires for use in a fuel cell comprising a metal catalyst deposited on a surface of the nanowires. A membrane electrode assembly for a fuel cell is disclosed which generally comprises a proton exchange membrane, an anode electrode, and a cathode electrode, wherein at least one or more of the anode electrode and cathode electrode comprise an interconnected network of the catalyst supported nanowires. Methods are also disclosed for preparing a membrane electrode assembly and fuel cell based upon an interconnected network of nanowires.Type: GrantFiled: December 6, 2005Date of Patent: February 20, 2007Assignee: Nanosys, Inc.Inventors: Chunming Niu, Calvin Y. H. Chow, Stephen A. Empedocles, J. Wallace Parce
-
Patent number: 7164209Abstract: Methods of positioning and orienting nanostructures, and particularly nanowires, on surfaces for subsequent use or integration. The methods utilize mask based processes alone or in combination with flow based alignment of the nanostructures to provide oriented and positioned nanostructures on surfaces. Also provided are populations of positioned and/or oriented nanostructures, devices that include populations of positioned and/or oriented nanostructures, systems for positioning and/or orienting nanostructures, and related devices, systems and methods.Type: GrantFiled: December 1, 2004Date of Patent: January 16, 2007Assignee: Nanosys, Inc.Inventors: Xiangfeng Duan, R. Hugh Daniels, Chunming Niu, Vijendra Sahi, James M. Hamilton, Linda T. Romano
-
Patent number: 7151209Abstract: Nanostructure manufacturing methods and methods for assembling nanostructures into functional elements such as junctions, arrays and devices are provided. Systems for practicing the methods are also provided.Type: GrantFiled: May 31, 2005Date of Patent: December 19, 2006Assignee: Nanosys, Inc.Inventors: Stephen Empedocles, Larry Bock, Calvin Y. H. Chow, Xianfeng Duan, Chunming Niu, George Pontis, Vijendra Sahi, Linda T. Romano, David Stumbo
-
Patent number: 7135728Abstract: A method and apparatus for an electronic substrate having a plurality of semiconductor devices is described. A thin film of nanowires is formed on a substrate. The thin film of nanowires is formed to have a sufficient density of nanowires to achieve an operational current level. A plurality of semiconductor regions are defined in the thin film of nanowires. Contacts are formed at the semiconductor device regions to thereby provide electrical connectivity to the plurality of semiconductor devices. Furthermore, various materials for fabricating nanowires, thin films including p-doped nanowires and n-doped nanowires, nanowire heterostructures, light emitting nanowire heterostructures, flow masks for positioning nanowires on substrates, nanowire spraying techniques for depositing nanowires, techniques for reducing or eliminating phonon scattering of electrons in nanowires, and techniques for reducing surface states in nanowires are described.Type: GrantFiled: April 13, 2005Date of Patent: November 14, 2006Assignee: Nanosys, Inc.Inventors: Xiangfeng Duan, Chunming Niu, Stephen A. Empedocles, Linda T. Romano, Jian Chen, Vijendra Sahi, Lawrence A. Bock, David P. Stumbo, Parce J. Wallace, Jay L. Goldman
-
Patent number: 7116546Abstract: This invention provides novel capacitors comprising nanofiber enhanced surface area substrates and structures comprising such capacitors, as well as methods and uses for such capacitors.Type: GrantFiled: January 12, 2006Date of Patent: October 3, 2006Assignee: Nanosys, Inc.Inventors: Calvin Y. H. Chow, Robert S. Dubrow
-
Patent number: 7087832Abstract: Nanocomposite photovoltaic devices are provided that generally include semiconductor nanocrystals as at least a portion of a photoactive layer. Photovoltaic devices and other layered devices that comprise core-shell nanostructures and/or two populations of nanostructures, where the nanostructures are not necessarily part of a nanocomposite, are also features of the invention. Varied architectures for such devices are also provided including flexible and rigid architectures, planar and non-planar architectures and the like, as are systems incorporating such devices, and methods and systems for fabricating such devices. Compositions comprising two populations of nanostructures of different materials are also a feature of the invention.Type: GrantFiled: December 9, 2004Date of Patent: August 8, 2006Assignee: Nanosys, Inc.Inventors: Erik C. Scher, Mihai Buretea, Calvin Y. H. Chow, Stephen A. Empedocles, Andreas P. Meisel, J. Wallace Parce