Patents Represented by Attorney Angus C. Fox
  • Patent number: 5261776
    Abstract: The apparatus transfers a quantity of wafers from a first wafer boat to a second wafer boat. A wafer platform positioned beneath a wafer boat rises and transports the wafers to a pair of wafer grips which hold the wafers until the wafer platform is lowered and a second wafer about is in position to receive the wafers. The wafer platform is actuated by the negative pressure applied to alternating sides of a stage which divides a sealed cabinet into two portions. A vacuum is applied to alternating sides of the stage, while ambient air is introduced into the other side, causing the stage to move in the direction of lower pressure. The platform is affixed to the stage on at least two points.
    Type: Grant
    Filed: April 27, 1989
    Date of Patent: November 16, 1993
    Assignee: Micron Technology, Inc.
    Inventors: Ross H. Burck, Ernest E. Marks, Scott E. Moore
  • Patent number: 5033834
    Abstract: Apparatus to convert a single-mount SEM microscope stage into a multi-mount SEM microscope stage. The apparatus interfits onto the conventional center-aperture SEM microscope stage, and provides a mounting face having apertures for multiple-specimen mounts. The device is able to provide top or side views of the specimen with only a 45.degree. rotation of the microscope stage from its starting point.
    Type: Grant
    Filed: January 30, 1989
    Date of Patent: July 23, 1991
    Assignee: Micron Technology, Inc.
    Inventors: Loren D. Corder, Burgess G. Gudmundson
  • Patent number: 5025178
    Abstract: A fault-resistant, solid-state line driver having a pair of P-type transistors in series between a bus output and a voltage source, a pair of N-type transistors in series between the bus output and a connection to ground, and a pair of input lines, one of the input lines being connected to both the gate of the P-type transistor closest to the voltage source and the gate of the N-type transistor closest to the bus output, the other input line being connected to both the gate of the P-type transistor closest to the bus output and the gate of the N-type transistor closest to the connection to ground. Such a line driver is particularly useful in devices utilizing wafer-scale levels of integration, as the failure of any one of the driver's transistors will not result in a shorting of the bus output to either ground or the voltage source.
    Type: Grant
    Filed: October 18, 1988
    Date of Patent: June 18, 1991
    Assignee: General Dynamics Corp., Pomona Div.
    Inventor: Patrick O. Nunally
  • Patent number: 5001369
    Abstract: A low-noise output buffer circuit that activates and deactivates the output by means of a two stage NAND and FET circuit, which senses a low voltage in a first stage pull-up (pull-down) NAND output before activating pull-down (pull-up) devices and the second stage, thereby minimizing the power supply current spike that normally appears during input and output switching operations.
    Type: Grant
    Filed: July 2, 1990
    Date of Patent: March 19, 1991
    Assignee: Micron Technology, Inc.
    Inventor: Terry R. Lee
  • Patent number: 4967262
    Abstract: A semiconductor package having a gull-wing, zig-zag, inline-lead configuration and end-of-package anchoring devices for rigidly affixing the package to a circuit board such that each lead is in compressibe contact with its associated mounting pad on the board. The anchoring devices of a first embodiment comprise anchoring pins having fish-hook-type barbs which lock against the under side of the board when the pegs are inserted through holes in the board; a second embodiment utilizes anchoring pins which are adhesively bonded in recesses that have been drilled or molded into the board; a third embodiment utilizes anchoring pins, the ends of which can be bonded directly to planar peg-bonding regions on the surface of the board; and a fourth utilizes tapered anchoring ping which may be inserted with an interference fit into holes in the board. The invention eliminates the need for mechanical support of the packages during solder reflow operations used during board assembly and repair.
    Type: Grant
    Filed: November 6, 1989
    Date of Patent: October 30, 1990
    Assignee: Micron Technology, Inc.
    Inventor: Warren M. Farnsworth
  • Patent number: 4961232
    Abstract: An underhood includes a helmet portion and a mask portion. The helmet portion consists of a loosely fitted bonnet which is attached to an elastic lower section. The elastic fabric (two-way stretch) substantially surrounds the bottom of the headdress in the manner of a headband, but is open below that location. A face mask secures the lower section around the user's face. The face mask is made of highly breathable fabric and relies on the elasticity of the stretch fabric in the lower part of the helmet portion for elastic fit around the user's face. Therefore, the face mask is relatively inelastic, while permitting elastic fit around the face.
    Type: Grant
    Filed: June 26, 1989
    Date of Patent: October 9, 1990
    Assignee: Micron Technology, Inc.
    Inventor: David A. Hulsey
  • Patent number: 4959325
    Abstract: The present invention constitutes an improvement of the Local Encroachment Reduction (LER) process developed by Tyler Lowrey at Micron Technology, Inc. of Boise, Idaho. LER consists of selectively etching a portion of the field oxide which has encroached into a DRAM cell's active area and then subjecting the cell to a high-energy boron implant to maintain adequate active area isolation. Although the boron implant effectively decreases the width of the depletion region between n+ active areas and p+ substrate, it has the undesirable effect of reducing the breakdown voltage at the n-p junctions in the bird's beak regions at the edges of the active regions, thus increasing the cell's susceptibility to gated-diode breakdown following creation of the cell plate. The present invention solves this problem by creating a graded junction in the bird's beak regions of the cell. The graded junction reduces the electric field intensity in the junction region, resulting in an increase in the breakdown voltage.
    Type: Grant
    Filed: February 24, 1989
    Date of Patent: September 25, 1990
    Assignee: Micron Technology, Inc.
    Inventors: Ruojia R. Lee, D. M. Durcan
  • Patent number: 4958088
    Abstract: A CMOS low power Schmitt type input buffer for a dynamic random access memory (DRAM) circuit. This buffer is further characterized in that a falling edge on the input has better than average noise immunity and has a slightly longer propagation time through the buffer than a rising edge.
    Type: Grant
    Filed: June 19, 1989
    Date of Patent: September 18, 1990
    Assignee: Micron Technology, Inc.
    Inventors: Mohammad H. Farah-Bakhsh, Stephen L. Casper
  • Patent number: 4944446
    Abstract: A method and apparatus for feeding preform wire into a preform dispenser, cutting a piece of preform, transferring the preform to a location over an integrated circuit ceramic package, and placing the preform in the package prior to placing and attaching a die in the ceramic package.
    Type: Grant
    Filed: November 2, 1989
    Date of Patent: July 31, 1990
    Assignee: Micron Technology, Inc.
    Inventor: Ted L. Thompson
  • Patent number: 4943148
    Abstract: A holder for positioning silicon wafers on a microscope stage for uniform and repeatable viewing under the microscope. The holder comprises a circumferential rib having an arc of from about 60.degree.-180.degree. diametrically opposed to a radially aligned slit within which a bracket member is positioned. Actuation of the bracket member pushes against a major flat on the silicon wafer, causing the leading edge of the wafer to bear against the abutment. The holder, or platen, is provided with calibration standards on a circumferential edge portion, and is also provided with at least one access port permitting access to the underside of the wafer with vacuum wands.
    Type: Grant
    Filed: October 20, 1988
    Date of Patent: July 24, 1990
    Assignee: Micron Technology, Inc.
    Inventors: Carl W. Mondragon, David A. Sperry
  • Patent number: 4939105
    Abstract: The present invention is a contact etch method which simultaneously smoothes a reflowed oxide profile so that separate phanarization photoresist coat and etch steps are unnecessary. This method is characterized in that it is fast, uses only one photoresist mask layer, etches contacts to poly and to substrate simultaneously, is done entirely with plasma etch technology in a single reactor, and builds up less polymer in the plasma reactor. The novel method eliminates a coat and an etch step, improving yield and reducing fabrication time. Lower polymer buildup means higher yields due to a cleaner process, and less downtime for reactor chamber cleaning.
    Type: Grant
    Filed: August 3, 1989
    Date of Patent: July 3, 1990
    Assignee: Micron Technology, Inc.
    Inventor: Rod C. Langley
  • Patent number: 4937465
    Abstract: One or more selected fuses among a plurality of fuses are blown by using electronic means to discharge a capacitor and route the resulting current spike to the selected fuse. Also, a driver output current is approximated by measuring suply currents for an unloaded output and for a loaded output and comparing the two supply currents. If the driver output is connected to the active end of a fuse, the supply current demanded by the driver indicates a state of the fuse. The invention finds particular utility when used on an integrated circuit memory array with fuse activated redundancy.
    Type: Grant
    Filed: December 8, 1988
    Date of Patent: June 26, 1990
    Assignee: Micron Technology, Inc.
    Inventors: Gary M. Johnson, Jon P. Busack
  • Patent number: 4926117
    Abstract: A two-piece burn-in board is used in semiconductor testing. The board can be disassembled so that it has ability to act as a device carrier wherein each individual device is completely isolated and as a standard burn-in board wherein all devices share the common signals. This ability to isolate or combine signals makes the board useable for functional device test/characterization and burn-in.
    Type: Grant
    Filed: May 2, 1988
    Date of Patent: May 15, 1990
    Assignee: Micron Technology, Inc.
    Inventor: Leland R. Nevill
  • Patent number: 4914269
    Abstract: A method of sealing a ceramic lid on a ceramic semiconductor package with a high-power laser beam. As an aid to package assembly prior to the fusion of the package lid to the package body, a lid recess is created around the die installation cavity of the package body. Following the installation of a die within a package cavity, the package body is retrieved from a process tray by a pick and place robot and placed in a position locating fixture. The same robot then retrieves a ceramic lid from an automatic lid dispensing unit, and places it within the lid recess of the package body. With the lid positioned within the recess, a Yttrium-Aluminum-Garnet (YAG) laser with beam splitter optics is moved by an X-Y table arm precisely over the top of the package. Moving with a linear speed of approximately 2.1 cm/sec. and with a power setting of approximately 170 watts, the split beam YAG laser simultaneously fuses a pair of opposite edges of the lid to the adjacent edges of the recess.
    Type: Grant
    Filed: July 24, 1989
    Date of Patent: April 3, 1990
    Assignee: Micron Technology, Inc.
    Inventors: Larry D. Kinsman, Steven H. Laney, Wade D. Jorgensen
  • Patent number: 4910866
    Abstract: A method of manufacturing a series of leadframe strip carriers, the individual members of the series having common external dimensions to facilitate production handling equipment setup and internal slot dimensions which vary to accommodate the various widths of available leadframe strips. This new method of manufacturing leadframe strip carriers results in a much lower unit cost, as compared to carriers manufactured from aluminum extrusions. This has been achieved using an injection molding process employing a single mold which produces constant length, width and height dimensions throughout the series, and which has an internal form die, the position of which can be varied with spacing inserts that can be either removed or transferred to the other side of the mold cavity as the mold is modified for progressively-narrower leadframe strips. To ensure durability, highly-abrasion resistant, fiber-reinforced plastic material is used to create the carriers.
    Type: Grant
    Filed: February 21, 1989
    Date of Patent: March 27, 1990
    Assignee: Micron Technology, Inc.
    Inventor: Timothy J. Allen
  • Patent number: 4906314
    Abstract: A process for simultaneously applying precut protective swatches of precured polymer film to each semiconductor die on a wafer, whereby an indexed greater-than wafer-width strip of precured polyimide film having a heat-attach adhesive on its lower surface is die punched to remove essentially half of the scrap film, material between each of the individual portions on the film which dimensionally correspond to the areas of individual dies on a silicon wafer requiring protection. Each punched area corresponds to areas on the wafer die matrix that are to remain unprotected. Following this first punching, a strip of dimensionally-stable backing paper coated with heat-release adhesive is bonded to the upper surface of the polyimide strip in the region which will become matrices of swatches. The double layer strip is then subjected to second die-punch process which removes the remaining scrap film material between the individual swatches.
    Type: Grant
    Filed: December 30, 1988
    Date of Patent: March 6, 1990
    Assignee: Micron Technology, Inc.
    Inventors: Warren M. Farnworth, Alan G. Wood
  • Patent number: 4864464
    Abstract: A low-profile, folded-plate, dynamic random access memory (DRAM) cell capacitor which can be fabicated with only two photoresist masks using equipment and processes identical to those used for the fabrication of DRAM cells having planar capacitors. The n+ silicon substrate, which is an extension of the cell's field-effect transistor drain, functions as the lower half of the capacitor's storage-node plate. The capacitor's field plate is comprised of a doped polycrystalline silicon-2 (poly-2) layer. The field plate is insulated on its lower surface from the n+ silicon substrate by a first dielectric layer of silicon nitride; it is insulated on its edges with a silicon oxide dielectric and on its upper surface with a second dielectric layer of silicon nitride from the upper half of the storage-node plate, which is comprised of a sandwich of n-type poly-3 and poly-4 layers. The upper half of the storage-node plate is tied to the n+ silicon substrate with a buried contact which is an extension of the poly-4-layer.
    Type: Grant
    Filed: January 9, 1989
    Date of Patent: September 5, 1989
    Assignee: Micron Technology, Inc.
    Inventor: Fernando Gonzalez
  • Patent number: 4794800
    Abstract: A wire sensing and measurement apparatus comprises an optical fiber having a hook shape formed at one end and connected to an optical pulse generator at the opposite end for transmitting a continuous stream of optical pulses to the free end of the hook. An optical detector is positioned opposite the free end of the hook to detect pulses emitted from the hook, and is connected to a missing pulse monitor for monitoriing the output of the detector to detect any missing pulses in the sequence. The monitor produces an output pulse for each missing pulse detected. The hook is moved beneath expected wire positions and any wire passing between the free end of the hook and the detector will interrupt the stream of pulses, allowing the wire position to be located. The fiber optic hook may be used as part of a wire pull test machine for testing the strength of electrical circuit wires.
    Type: Grant
    Filed: October 1, 1987
    Date of Patent: January 3, 1989
    Assignee: General Dynamics Corporation
    Inventor: Bobby Atkinson
  • Patent number: 4782577
    Abstract: An apparatus for seating and tightening clamps around joints between tubular sections comprises an elongate flexible member such as a chain for extending around a clamp positioned over a joint, the member having rollers spaced along its length, and a tightening device for applying tension to the member to tighten it around the clamp so that the rollers roll around the surface of the clamp and apply a radial force to the clamp.
    Type: Grant
    Filed: December 10, 1987
    Date of Patent: November 8, 1988
    Assignee: General Dynamics Corporation
    Inventor: David C. Bahler