Patents Represented by Attorney Ann Livingston

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  • CMOS memory cell array
    Patent number: 5350706
    Abstract: A CMOS memory cell array and a method of forming it, which avoids problems caused by field oxide corner-rounding. A moat pattern defines alternating columns of active areas and field oxide regions. A source line pattern defines rows of source lines. Silicon dopant is implanted in areas not covered by the source line pattern to form buried n+ source lines. The field oxide regions are formed in areas not covered by the moat pattern. Subsequent fabrication steps may be in accordance with conventional CMOS fabrication techniques.
    Type: Grant
    Filed: September 30, 1992
    Date of Patent: September 27, 1994
    Assignee: Texas Instruments Incorporated
    Inventors: Dave J. McElroy, Manzur Gill, Pradeep L. Shah
  • Method of making virtual ground memory cell array
    Patent number: 5306658
    Abstract: A memory cell array for a nonvolatile memory device having single-transistor cells (10). Row lines (15) connect the control gates of each row of cells. Column lines (17) connect the drain regions (11) and source regions (12) of columns of cells, such that pairs of row-adjacent cells share a column line (17). Each shared column line (17) has two junctions for each pair of cells that share the column line. One junction is graded for source regions (12) and the other is abrupt for drain regions (11).
    Type: Grant
    Filed: May 27, 1993
    Date of Patent: April 26, 1994
    Assignee: Texas Instruments Incorporated
    Inventor: Manzur Gill