Abstract: A method for inverse dithering a dithered image using a filter selected from a set of filters arranged in a preselected order is disclosed. Upon receipt of a selected portion of a dithered image, the selected portion is up-multiplied from a first amplitude resolution to a second amplitude resolution. The up-multiplied dithered image at the second amplitude resolution is then filtered by the selected filter coefficients to generate the inverse dithered image.

Abstract: Dynamic tournament gaming method and system, including the provision of a plurality of gaming terminals selectively interlinkable together with a host terminal so that current players of the terminals desiring to participate in group tournament play can be notified of the opportunity and provided with the choice to play or not. If a current player chooses to play, he so signifies, enters his entry fee into the terminal, and awaits start of the event. Upon start of the tournament by the host terminal, the player will play the tournament game over and over as fast as possible to accumulate as many points as possible during a particular pre-announced tournament period. The host terminal will continuously monitor the terminals of all play participants, dynamically record play status, and control termination of the game period. It will also conduct an accounting of the results, issue win results notification, and perhaps provide remote pay-out of game winnings.

Abstract: A fabrication method is disclosed for fabricating a memory cell comprised of three regions of a first-type deposited on a substrate of a second-type, a first insulating layer deposited over the substrate, a floating gate disposed over the first insulating layer, a second insulating layer disposed over the floating gate and the first insulating layer, a control gate disposed over the second insulating layer and partially extending over the floating gate, and a select gate disposed over the second insulating layer. The memory cell can be configured in four different ways. When placed in a memory array, a predefined number of memory cells can be grouped into blocks. By using a byte(block)-select transistor, the memory cells can be accessed and altered on block by block basis. The novel memory cells can be manufactured without requiring additional processing steps aside from those required in the manufacturing of the comparable flash memory cells.