Abstract: Multiselection of word lines is eliminated in a memory array which includes a word line generation circuit which inhibits line selection until a latest address bit is received.
Type:
Grant
Filed:
June 19, 1995
Date of Patent:
October 22, 1996
Assignee:
International Business Machines Corporation
Abstract: An input/output channel controller includes a storage array for temporarily storing data and multiple clocks to access or update the data. One or more array clock signals are generated from a system clock combined with other clock signals to generate a single clock signal which is positioned in time by a clock positioning circuit to accommodate circuit throughput delay variations and to effectively reduce hold time to zero. Storage arrays may be clocked at significantly higher frequencies and arrays may have multiple gated clocks without incurring the hold time problems.
Type:
Grant
Filed:
October 3, 1994
Date of Patent:
August 20, 1996
Assignee:
International Business Machines Corporation
Inventors:
Ravi K. Arimilli, John S. Dodson, Jerry D. Lewis