Abstract: The switching of the positive (or pullup power) and negative (or pulldown power) semiconductor elements, are controlled by driving circuits which are in turn controlled by level shift circuits which have a first current control circuit and a second current control circuit coupled in parallel and this parallel connection is coupled in series with the control N-channel MOSFET of a current mirror circuit in a circuit loop arrangement with a control power supply. The first and second current control circuits are responsive to first and second control pulses of pulse widths t.sub.1 and t.sub.1 +t.sub.2, in accordance with a driving signal such that the first current control circuit supplies a first current level to the control N-channel MOSFET during the first time period t.sub.1 and the second current control circuit supplies a second current level, smaller than that of the first current level, thereto for a predetermined time period t.sub.1 +t.sub.