Abstract: A passenger transportation conveyor apparatus features a minimized space for installation thereof by reducing the height of the machine room for accommodating the support frame structure, a smooth transition of step boards between the forward and the return routes or vice versa enabled by a unique arrangement of the plurality of step boards connected endlessly and transfer mechanisms for allowing a circular travel with an upper surface of each step board constantly facing upward.
Type:
Grant
Filed:
December 15, 1999
Date of Patent:
May 22, 2001
Assignees:
Nippon Fillestar Co., Hitachi, Ltd., Hitachi Building Systems Co.
Abstract: A multiport memory is provided which permits both random access and serial access. In order to reduce parasitic capacitance and improve operating speed, the serial input/output lines are each divided into two parts at their middle points. Sense amplifiers for the serial input/output lines are provided at upper and lower ends of the serial access memory elements to respectively amplify signals from the divided lines. Additional features are provided for improving both the serial and random operation. For example, during the serial read mode, the column selector for random access is simultaneously operated, and read data passing through the random access column selector is used as head data for the serial output operation to be delivered through the serial output circuit. Also, a serial selector can be controlled by a select signal formed by a Gray Code counter to improve operating speed.
Abstract: In a single chip processor which can be provided with an extended program memory, a high-speed access can be executed without being restricted by the access time for the external program memory when an internal program memory is employed, by varying the effective instruction cycle, and thus a high-speed processing performance for a single chip processor of a stored program type can be attained.