Abstract: An improved DRAM which includes a plurality of main amplifiers for amplifying and storing signals read out to a plurality of common data lines in accordance with an internal address signal, a main amplifier control circuit for outputting the outputs of the main amplifiers sequentially in synchronism with changes in a column address strobe signal and an address counter for performing an addressing operation midway in the sequential reading operations of the plural main amplifiers. The present invention also includes a column selecting circuit for switching column switches in accordance with the address counter to cause data to be read out continuously at a high speed by extending a nibble mode.