Abstract: The present invention relates generally to an improved process for providing uniform step coverage on a substrate and planarization of metal layers to form continuous, void-free contacts or vias in sub-half micron applications. In one aspect of the invention, a refractory layer is deposited onto a substrate having high aspect ratio contacts or vias formed thereon. A CVD metal layer is then deposited onto the refractory layer at low temperatures to provide a conformal wetting layer for a PVD metal. Next, a PVD metal is deposited onto the previously formed CVD metal layer at a temperature below that of the melting point temperature of the metal. The resulting CVD/PVD metal layer is substantially void-free.

Abstract: Apparatus for lifting a wafer, or other such workpiece, from the surface of pedestal in a semiconductor wafer processing system. More specifically, the apparatus relates to a lift pin that is guided by a guide bushing and a guide pin. Preferably, the lift pin is hollow and is slideably engaged with a guide pin. The guide pin is fixed relative to the pedestal and coaxially aligned with a lift pin bore in the pedestal. An actuator drives the lift pin along the guide pin from a fully retracted lift pin position to a fully extended lift pin position. A guide bushing, located in the pedestal proximate the lift pin, also guides the lift pin as the pin passes through the lift pin bore. The guide bushing forms a lip seal between the lift pin and the pedestal. Furthermore, a bellows surrounding the lift pin and the guide pin, can also be used to preserve the integrity of the chamber environment.