Patents Represented by Attorney, Agent or Law Firm Ardeshir Tabibi
  • Patent number: 6798008
    Abstract: In accordance with the present invention, a memory cell includes a non-volatile device and a DRAM cell. The DRAM cell further includes an MOS transistor and a capacitor. The non-volatile device include a control gate region and a guiding gate region that may partially overlap. The non-volatile device is erased prior to being programmed. Programming of the non-volatile device may be done via hot-electron injection or Fowler-Nordheim tunneling. When a power failure occurs, the data stored in the DRAM is loaded in the non-volatile devices. After the power is restored, the data stored in the non-volatile device is restored in the DRAM cell.
    Type: Grant
    Filed: March 19, 2003
    Date of Patent: September 28, 2004
    Assignee: 02IC, Inc.
    Inventor: Kyu Hyun Choi