Abstract: Disclosed is an art making it possible that, in a reference cell circuit for outputting a plurality of different reference level signals, even if the number of transistors serving as reference cells and each having a floating gate increases, the time required for setting channel currents of the transistors will not increase. The floating gates of a plurality of transistors for generating different reference signal levels are connected in common so that the channel currents of all the transistors can be set simultaneously. The transistors have the channel lengths thereof, channel widths thereof, or both of them made different. The channel currents of the transistors are therefore mutually different. An error in all reference levels dependent on a manufacturing process is compensated for by adjusting an amount of charge to be injected into the floating gates.