Abstract: A semiconductor memory includes memory cell blocks, a burst-length information generating circuit which generates burst-length information based on a burst length, and a block enable circuit which receives the burst-length information. The block enable circuit selectively enables one of the memory cell blocks when the burst length is equal to or shorter than a predetermined burst length and selectively enables a plurality of memory cell blocks based on the burst length when the burst length is longer than the predetermined burst length. Data are read from the above-mentioned one or plurality of memory cell blocks.

Abstract: A static protection circuit has a first MOS transistor of a P-channel type whose source-drain channel is connected between a signal line leading to an external connection terminal and ground; it also has a second MOS transistor of a P-channel type. This second MOS transistor has its drain connected to the gate of the first MOS transistor, has its source connected through a first resistor to a power source line, and has its gate connected through a second resistor to ground.

Abstract: Around hearths 30a and 30b placed inside a vacuum chamber 11, auxiliary hearths 31a and 31b with annular permanent magnets included therein are arranged. Orientations of magnetic poles of annular permanent magnets 21a and 21b provided in two adjacent plasma guns 1A and 2B, orientations of magnetic poles of two adjacent electromagnetic coils 22a and 22b, orientations of two adjacent steering coils 24a and 24b, and orientations of magnetic poles of the two adjacent annular permanent magnets included in the two hearths are reversed from each other.

Abstract: Disclosed is an improved semiconductor wafer grinding apparatus comprising at least wafer holding means and wafer grinding means. The wafer holding means comprises a holder having a wafer-gripping surface for sucking and holding a selected semiconductor wafer and liquid bearing means for rotatably supporting the holder. The liquid bearing means has inclination control means formed therein, and the inclination control means includes discrete inclination controlling areas for suspending the holder at upper and lower levels. Each inclination controlling area has flow rate control means connected thereto. The parallelism of the wafer-gripping surface relative to the wafer grinding means is assured by controlling the flow rate of the liquid to each inclination controlling area.

Abstract: An angled illumination tube is capable of reducing a dark spot behind the reflector, while illuminating the tube uniformly over the length of the tube. The tube is used in combination with a light source providing a light beam and comprises an angled transparent tubular conduit having a first end and a second end on opposite longitudinal ends of the conduit. The conduit has a bend between the first and second longitudinal ends, and is used with the first end receiving the light beam from the light source in order to guide the light beam along the length of the conduit. A reflector is disposed within the bend to reflect the light beam from the first end to direct a reflected light beam towards the second end. The reflector defines an incident light axis along which the light beam is guided to the reflector, and a reflected light axis along which the reflected light beam is directed to said second end.

Abstract: The present invention has an object to produce a pixel array comprising an organic EL device and a peripheral driving circuit on the same substrate, to facilitate the fabrication of an organic EL display device and miniaturize the display device.In the organic EL display device according to the present invention, a pixel array 2 composed of an organic EL device is provided on a semiconductor substrate 1, a driving integrated circuit 3 for driving the organic EL device is formed in the periphery of the pixel array 2 on the semiconductor substrate 1, and the pixel array 2 and the driving integrated circuit 3 are integrated.

Abstract: A silicon wafer sliced from a silicon single crystal having a low oxygen concentration is used as an epitaxial substrate to provide semiconductor silicon single crystal wafers exhibiting good electrical characteristics at a low cost. A semiconductor silicon single crystal having a resistivity in a range of 0.005 to 0.02 .OMEGA..multidot.cm and an oxygen concentration of 12.times.10.sup.17 atoms/cm.sup.3 (ASTM'79) or less is manufactured by a Czochralski (CZ) method. The resulting silicon single crystal is shaped into a silicon single crystal substrate on which a silicon single crystal is epitaxially grown.