Patents Represented by Attorney, Agent or Law Firm Armstrong, Westerman, Hattori, McClelland & Naughton, LLP
  • Patent number: 6326254
    Abstract: Wells of n- and p-type are formed in a p-type substrate. Wells of p-type are also formed in the n-type well. Both the p-type wells are formed by the same process at the same time to make MOS transistors have different threshold voltages. MOS transistors having a long gate length and a low threshold voltage are formed in the p-well in the n-well, and MOS transistors having a short gate length and a high threshold voltage are formed in the p-well at the outside of the n-well. Fuses are formed over the p-type wells in the n-type well at a high density.
    Type: Grant
    Filed: May 1, 1998
    Date of Patent: December 4, 2001
    Assignees: Fujitsu Limited, Fujitsu VLSI Limited
    Inventors: Taiji Ema, Satoru Miyoshi, Tatsumi Tsutsui, Masaya Katayama, Masayoshi Asano, Kenichi Kanazawa