Patents Represented by Attorney Art Fisher
  • Patent number: 5802272
    Abstract: An operation of a processor is traced while fetching instructions from a memory to operate the processor. The tracing involves detecting an unpredictable fetching of instructions on the assumption that a predictable fetching can be reconstructed without any further input. The unpredictable fetching is identified as being due to either computable, conditional, or unanticipated events. Upon detecting the events, process control information, such as the next instruction to be fetched is recorded in a queue, and from the queue the information can be stored in a trace buffer. During reconstruction of the operation, the trace buffer, and the image including the instructions can be examined to analyze the real-time operation of the processor.
    Type: Grant
    Filed: December 19, 1994
    Date of Patent: September 1, 1998
    Assignee: Digital Equipment Corporation
    Inventors: Richard L. Sites, Sharon E. Perl, G. Michael Uhler, David G. Conroy
  • Patent number: 5729702
    Abstract: Arbitration means for arbitrating between computer devices A to F which compete for access to a common bus. The system provides cascaded round-robin units. Unit RR1 has ports A, B, C, and X in sequence, with port X coupled to round-robin unit RR2, which has ports D, E, F in sequence. On each cycling of unit RR1 past C to A, unit RR2 is checked and the next one of devices D to F (in the sequence determined by unit RR2) has the opportunity of bus access. A gating circuit 13 can further restrict bus accessing by unit RR2's devices, by timing or counter control. A third round-robin unit can be added coupled to unit RR1 (which would have ports A, B, C, X,Y) or to unit RR2 (which would have ports D, E, F, Y). The assignment of devices to ports can be controllable by a matrix switch and device assignment memory.
    Type: Grant
    Filed: December 24, 1996
    Date of Patent: March 17, 1998
    Assignee: Digital Equipment Corporation
    Inventors: Tadhg Creedon, Richard A. Gahan, Fearghal Morgan
  • Patent number: 5724033
    Abstract: In a computer implemented method for encoding digital values that are arranged in a successively increasing order, a delta value is determined for each pair of immediately successive values. The delta values are the differences between the pair of immediately successive values. For each delta value which can be encoded as a single byte, a logical zero is stored in the least significant bit of the single byte, and the delta value is stored in the most significant bits of the single byte. Otherwise, for each delta value which must be encoded as a plurality of bytes, a logical one is stored in the least significant bit of the first byte of the plurality of bytes, and a first portion of the delta value is stored in the most significant bits of the first byte. In this case, a logical zero is stored in the most significant bit of the next byte, and a next portion of the delta value is stored in the least significant bits of the next byte.
    Type: Grant
    Filed: August 9, 1996
    Date of Patent: March 3, 1998
    Assignee: Digital Equipment Corporation
    Inventor: Michael Burrows
  • Patent number: 5720009
    Abstract: A pattern match method is the primary component of any rule-based inference engine or database search method. Equivalence class projection is used in a discrimination match network, such that only equivalence class tokens (and not working memory objects) are propagated down the network, then only the first object which is a member of any specific equivalence class will cause an actual propagation down through the net. Subsequent changes which are either the creation of new objects which are members of a known equivalence class or the removal of any object but the last member of that equivalence class can totally avoid propagation downward in that section of the discrimination network.
    Type: Grant
    Filed: October 24, 1996
    Date of Patent: February 17, 1998
    Assignee: Digital Equipment Corporation
    Inventors: Steven A. Kirk, William Barabash, William S. Yerazunis
  • Patent number: 5420065
    Abstract: A process for filling an isolation trench with a dielectric is described. The deposition pressure of a gas from which a silicon dioxide dielectric is deposited in a trench is changed on a real-time basis during such deposition. Such pressure gradually increases from about 20 mTORR to 900 mTORR. The result is that particle generation during the initial stages of the deposition is maintained at a low rate, while the high pressure needed to provide deposition in a trench as it is filled is provided.
    Type: Grant
    Filed: May 28, 1993
    Date of Patent: May 30, 1995
    Assignee: Digital Equipment Corporation
    Inventor: Ara Philipossian
  • Patent number: D395297
    Type: Grant
    Filed: September 17, 1993
    Date of Patent: June 16, 1998
    Assignee: Digital Equipment Corp.
    Inventors: Hugo T. Cheng, Joseph M. Ballay, Peter Lucas