Patents Represented by Attorney ArtesynIP, Inc.
  • Patent number: 8309972
    Abstract: Aspects include electrodes that provide specified reflectivity attributes for light generated from an active region of a Light Emitting Diode (LED). LEDs that incorporate such electrode aspects. Other aspects include methods for forming such electrodes, LEDs including such electrodes, and structures including such LEDs.
    Type: Grant
    Filed: January 25, 2012
    Date of Patent: November 13, 2012
    Assignee: Bridgelux, Inc.
    Inventors: Frank T. Shum, William W. So, Steven D. Lester
  • Patent number: 8300049
    Abstract: Aspects comprise systems implementing 3-D graphics processing functionality in a multiprocessing system. Control flow structures are used in scheduling instances of computation in the multiprocessing system, where different points in the control flow structure serve as points where deferral of some instances of computation can be performed in favor of scheduling other instances of computation. In some examples, the control flow structure identifies particular tasks, such as intersection testing of a particular portion of an acceleration structure, and a particular element of shading code. In some examples, the aspects are used in 3-D graphics processing systems that can perform ray tracing based rendering.
    Type: Grant
    Filed: September 9, 2011
    Date of Patent: October 30, 2012
    Assignee: Caustic Graphics, Inc.
    Inventors: Luke Tilman Peterson, James Alexander McCombe, Ryan R. Salsbury, Steven John Clohset
  • Patent number: 8243638
    Abstract: Passive listening in wireless communication. An activity sensor device senses a packet. A medium access control (MAC) address parser receives the packet, processes a header of the packet, and activates a MAC device in response to recognizing a MAC address within the header, such that the MAC device is not activated if the MAC address parser does not recognize the MAC address.
    Type: Grant
    Filed: January 8, 2007
    Date of Patent: August 14, 2012
    Assignee: Hellosoft, Inc.
    Inventors: Luis Aldaz, Luis Aldaz, Sr., legal representative, Kaushik Barman, Allan A. Johnson, Raghavendra Malladi, Sriram Kankipati, Parag Ashok Dighe
  • Patent number: 8238278
    Abstract: Hardware-based beacon processing. A hardware-centric medium access control (MAC) device includes a packet receiver and a beacon processor. The packet receiver receives a plurality of packets comprising at least one beacon packet. The beacon processor receives packets of the plurality of packets and filters out unwanted packets of the plurality of packets without requiring the use of other components of the hardware-centric MAC device and without requiring the use of a microprocessor.
    Type: Grant
    Filed: January 8, 2007
    Date of Patent: August 7, 2012
    Assignee: Hellosoft, Inc.
    Inventors: Luis Aldaz, Luis Aldaz, Sr., legal representative, Kaushik Barman, Allan A. Johnson, Raghavendra Malladi
  • Patent number: 8237711
    Abstract: For ray tracing scenes composed of primitives, systems and methods accelerate ray/primitive intersection identification by testing rays against elements of geometry acceleration data (GAD) in a parallelized intersection testing resource. Groups of rays can be described as shared attribute information and individual ray data for efficient ray data transfer between a host processor and the testing resource. The host processor also hosts shading and/or management processes controlling the testing resource and adapting the ray tracing, as necessary or desirable, to meet criteria, while reducing degradation of rendering quality. The GAD elements can be arranged in a graph, and rays can be collected into collections based on whether a ray intersects a given element. When a collection is deemed ready for further testing, it is tested for intersection with GAD elements connected, in the graph, to the given element.
    Type: Grant
    Filed: November 19, 2007
    Date of Patent: August 7, 2012
    Assignee: Caustic Graphics, Inc.
    Inventors: James Alexander McCombe, Ryan R. Salsbury, Luke Tilman Peterson
  • Patent number: 8217935
    Abstract: Systems and methods include high throughput and/or parallelized ray/geometric shape intersection testing using intersection testing resources accepting and operating with block floating point data. Block floating point data sacrifices precision of scene location in ways that maintain precision where more beneficial, and allow reduced precision where beneficial. In particular, rays, acceleration structures, and primitives can be represented in a variety of block floating point formats, such that storage requirements for storing such data can be reduced. Hardware accelerated intersection testing can be provided with reduced sized math units, with reduced routing requirements. A driver for hardware accelerators can maintain full-precision versions of rays and primitives to allow reduced communication requirements for high throughput intersection testing in loosely coupled systems. Embodiments also can include using BFP formatted data in programmable test cells or more general purpose processing elements.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: July 10, 2012
    Assignee: Caustic Graphics, Inc.
    Inventors: Stephen Purcell, Ryan R. Salsbury, James Alexander McCombe, Sean Matthew Gies
  • Patent number: 8203559
    Abstract: Ray tracing scenes is accomplished using a plurality of intersection testing resources coupled with a plurality of shading resources, communicative in the aggregate through links/queues. A queue from testing to shading comprises respective ray/primitive intersection indications, comprising a ray identifier. A queue from shading to testing comprises identifiers of new rays to be tested, wherein data defining the rays is separately stored in memories distributed among the intersection testing resources. Ray definition data can be retained in distributed memories until rays complete intersection testing, and be selected for testing multiple times based on ray identifier. A structure of acceleration shapes can be used. Packets of ray identifiers and shape data can be passed among the intersection testing resources, and each resource can test rays identified in the packet, and for which definition data is present in its memory.
    Type: Grant
    Filed: November 8, 2010
    Date of Patent: June 19, 2012
    Assignee: Caustic Graphics, Inc.
    Inventors: Luke Tilman Peterson, James Alexander McCombe, Ryan R. Salsbury, Stephen Purcell
  • Patent number: 8203555
    Abstract: For ray tracing scenes composed of primitives, systems and methods can traverse rays through an acceleration structure. The traversal can be implemented by concurrently testing a plurality of nodes of the acceleration structure for intersection with a sequence of one or more rays. Such testing can occur in a plurality of test cells. Leaf nodes of the acceleration structure can bound primitives, and a sequence primitives can be tested concurrently for intersection in the test cells against a plurality of rays that have intersected a given leaf node. Intersection testing of a particular leaf node can be deferred until a sufficient quantity of rays have been collected for that node.
    Type: Grant
    Filed: July 16, 2009
    Date of Patent: June 19, 2012
    Assignee: Caustic Graphics, Inc.
    Inventors: Luke Tilman Peterson, James Alexander McCombe, Ryan R. Salsbury
  • Patent number: 8114690
    Abstract: Aspects concerning a method of making electrical contact to a region of semiconductor in which one or more LEDs are formed include that a dielectric region can be formed on a p region of the semiconductor, and that a metallic electrode can be formed on (at least partially on) the region of dielectric material. A transparent layer of a material such as Indium Tin Oxide can be used to make ohmic contact between the semiconductor and the metallic electrode, as the metallic electrode is separated from physical contact with the semiconductor by one or more of the dielectric material and the transparent ohmic contact layer (e.g., ITO layer). The dielectric material can enhance total internal reflection of light and reduce an amount of light that is absorbed by the metallic electrode.
    Type: Grant
    Filed: September 22, 2010
    Date of Patent: February 14, 2012
    Assignee: Bridgelux, Inc.
    Inventors: Frank T. Shum, William W. So, Steven D. Lester