Patents Represented by Attorney Arthur Ortega
  • Patent number: 8282406
    Abstract: An electrical connector having electrostatic discharge protection comprises a body and an electrostatic discharge dissipative element. The body defines a socket having electrical contacts configured to make electrical contact with electrical contacts along a bottom surface of a component module when the component module is inserted in the socket. The electrostatic discharge dissipative element is configured to make contact with the electrical contacts along the bottom surface of the component module before the electrical contacts along the bottom surface of the component module make contact with the electrical contacts of the socket.
    Type: Grant
    Filed: March 23, 2010
    Date of Patent: October 9, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: David A Pipho, David W Kuehl, Patrick R Conway
  • Patent number: 7617340
    Abstract: A data processing system and method of isolating a plurality of I/O adapters in the system. The data processing system also comprises a set of processors communicating with the I/O adapters using a PCIe protocol. Each of the I/O adapters has a respective ID. In the preferred embodiment the commands issued by the I/O adapters include a PCIe defined Requestor ID field including one or more of the Requestor IDs of I/O Adapters. The Req IDs can be used as an input to a CAM which provides an index to a TVT to identify a unique and independent system memory space for the I/O adapter.
    Type: Grant
    Filed: January 9, 2007
    Date of Patent: November 10, 2009
    Assignee: International Business Machines Corporation
    Inventor: Thomas A. Gregg
  • Patent number: 7581021
    Abstract: A processor node of a network is provided which includes one or more processors and a virtualized channel adapter. The virtualized channel adapter is operable to reference a table to determine whether a destination of the communication is supported by the virtualized channel adapter. When the destination is supported for routing via hardware, the virtualized channel adapter is operable to route the communication via hardware to at least one of a physical port and a logical port of the virtualized channel adapter. Otherwise, when the destination is not supported for routing via hardware, the virtualized channel adapter is operable to route the communication via firmware to a virtual port of the virtualized channel adapter. A corresponding method and a recording medium having information recorded thereon for performing such method are also provided herein.
    Type: Grant
    Filed: April 7, 2005
    Date of Patent: August 25, 2009
    Assignee: International Business Machines Corporation
    Inventors: Richard K. Errickson, David Craddock, Thomas A. Gregg, Donald W. Schmidt, Jeffrey M. Turner, Bruce M. Walk
  • Patent number: 7567995
    Abstract: A method, system and computer program product for the defragmentation of a file system with little or no free space. Defragmenting file fragments in a memory file system comprises determining a defragmentation sequence for re-ordering fragments of files in the file system; determining if at least one fragment in the file system is moved more than once in the defragmentation sequence; removing the at least one fragment from the file system if it is moved more than once in the sequence; determining the defragmentation sequence without considering the at least one removed file fragment; rearranging the remaining file fragments on the file system according to the determined defragmentation sequence; and replacing the removed file fragments in the file system after the defragmentation.
    Type: Grant
    Filed: August 22, 2006
    Date of Patent: July 28, 2009
    Assignee: International Business Machines Corporation
    Inventors: Nicholas C. Maynard, Kieran P. Scott
  • Patent number: 7515589
    Abstract: A network virtualization layer for an information handling system in which a physical machine coupled to a network is divided into a plurality of logical partitions, each of which has a host system residing thereon. In response to receiving a set command from one of the host systems specifying a data link layer (layer 2) address, the virtualization layer associates the data link layer address with the host system and forwards to the host system data packets specifying the data link layer address as a destination address. Unicast packets are forwarded to the single host system specifying the destination address as an individual MAC address, while multicast packets are forwarded to each host system specifying the destination address as a group MAC address. A host system may also specify a virtual LAN (VLAN) ID, which is used to scope the forwarding of packets to host systems sharing that VLAN ID.
    Type: Grant
    Filed: August 27, 2004
    Date of Patent: April 7, 2009
    Assignee: International Business Machines Corporation
    Inventors: Utz Bacher, Angelo Macchiano, Dennis R. Musselwhite, Bruce H. Ratcliff, Stephen R. Valley
  • Patent number: 7483363
    Abstract: A data storage device comprising a storage medium for storing data in the form of marks. An array of probes is mounted on a common frame. The common frame and the storage medium are designed for moving relative to each other for creating or detecting marks. Each probe is assigned a given field within the storage medium for creating or detecting marks in various tracks. A track density is representative of the distance between consecutive tracks. A linear density is representative of a minimum distance between consecutive marks within one track. The data storage device is designed for grouping the probes into various probe classes, each probe class being characterized in that all its assigned probes are controlled with a common track density and in that all its assigned probes are operated in respect of track movement simultaneously. Each probe class is controlled with a different combination of track density and linear density.
    Type: Grant
    Filed: October 13, 2005
    Date of Patent: January 27, 2009
    Assignee: International Business Machines Corporation
    Inventor: Thomas R. Albrecht
  • Patent number: 7484118
    Abstract: The present invention provides a new multi nodal computer system comprising a number of nodes on which chips of different types reside. The new multi nodal computer system is characterized in that there is one clock chip per node, each clock chip controlling only the chips residing on that node said chips being appropriate for sending a check stop request to the associated clock chip in case of a malfunction. A new check stop handling method is characterized in that depending on the source of the check stop request the clock chip that received the check stop request initiates a system check stop, a node check up, or a chip check stop.
    Type: Grant
    Filed: December 16, 2004
    Date of Patent: January 27, 2009
    Assignee: International Business Machines Corporation
    Inventors: Karin Rebmann, Dietmar Schmunkamp, Tobias Webel, Thomas E. Gilbert, Timothy G. McNamara, Patrick J. Meaney
  • Patent number: 7478139
    Abstract: A method and apparatus for creating a unique identification for each stack in partitions of a host data computer such that a plurality of partitions may share a single adapter card during an Input/Output operation wherein the adapter card is exchanging data between the host and a Local Area Network. The adapter card includes a unique identifier pool for maintaining values of unique identifiers which are available for identifying the stacks. The method and apparatus also provides that a deleted unique identifier for a stack may be reused by newly created stacks and may be reassigned to a recreated stack, if still available, when the stack had previously been deleted by the operating system, but is then recreated.
    Type: Grant
    Filed: April 29, 2002
    Date of Patent: January 13, 2009
    Assignee: International Business Machines Corporation
    Inventors: Frances C. Garofalo, Jeffrey D. Haggar, Bruce H. Ratcliff, Stephen R. Valley
  • Patent number: 7472209
    Abstract: A non-disruptive unassignment of an address from a fabric responsive to a request from a channel adapter. A logout command requests the fabric to unassign an address. The status of the address is thereby changed from active to unassigned and an acknowledgment sent back to the channel adapter.
    Type: Grant
    Filed: June 13, 2006
    Date of Patent: December 30, 2008
    Assignee: International Business Machines Corporation
    Inventors: Robert J. Dugan, Giles R. Frazier
  • Patent number: 7464260
    Abstract: A method for alternatively activating, in a data processing system, a replaceable hardware unit and providing a predetermined set of functional capabilities for configuring the data processing system to allow selectively electronically enabling at least a subset of its functional capabilities. Initially a replaceable hardware unit is provided to the data processing system, then its type is determined. If the replaceable hardware unit is of a first type, the subset of functional capabilities to be electronically enabled is determined. Alternatively, if the replaceable hardware unit is of another type, the entire functional capabilities of the replaceable hardware unit are enabled.
    Type: Grant
    Filed: June 20, 2005
    Date of Patent: December 9, 2008
    Assignee: International Business Machines Corporation
    Inventors: Charles H. Milligan, Juergen Probst
  • Patent number: 7437490
    Abstract: A bi-directional and full duplex facility for permitting both the IO processor and the Channel to write CCA messages on their respective queues at the same time. IOP messages to the channel are stored on the TO_CHN queue and Channel messages to the IOP on the TO_IOP queue. CCA Queues replace hardware CCAs due to increasing transmission capabilities of current IO processors and Channel processors. Even though the mechanism is similar, the present invention provides some benefits in the use of signaling. The IOP does not have to signal the Channel each time it puts something on its outbound queue. Each queue contains multiple slots. This allows the IOP and Channel to write multiple messages on the targeted queue without encountering a CCA busy signal. The actual queues are now structured in hardware system memory.
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: October 14, 2008
    Assignee: International Business Machines Corporation
    Inventors: Daniel F. Casper, John R. Flanagan, Paul S. Frazer, Kenneth J. Oakes, John S. Trotter
  • Patent number: 7392314
    Abstract: The idea of the present invention is to provide a challenge-response mechanism to acquire work scope split range information from the application's Work Scope Split component of the over-utilized resource. By using the work scope split range information, the provisioning system is able to add a new resource, install a new application for that new resource, configure the new and the over-utilized resource's application, and reconfigure the load-balancer in accordance with the work scope split range information. The present invention adds scalability to complex and stateful application programs and allows dynamic provisioning of resources for these application programs.
    Type: Grant
    Filed: August 12, 2004
    Date of Patent: June 24, 2008
    Assignee: International Business Machines Corporation
    Inventors: Boas Betzler, Steffen Rost
  • Patent number: 7392432
    Abstract: A few inexpensive hardware facilities are incorporated in a tightly synchronized cross checked design. These facilities allow initialization software to quickly bring the two processors to the same state by rapid, repeated resets and execution of the initialization software. The resets are done in a way as to be transparent to the rest of the system and to the end user.
    Type: Grant
    Filed: October 7, 2004
    Date of Patent: June 24, 2008
    Assignee: International Business Machines Corporation
    Inventors: Thomas D. Needham, Bryan K. Tanoue, Jeffrey M. Turner
  • Patent number: 7336115
    Abstract: A signal distribution tree structure for distributing signals within a plurality of signal tree branches to a plurality of signal sinks, wherein the signal in subsequent sub trees (11) is driven by a preceding amplifier (2), which is characterized in that the amplifiers are logic gates (3), which combines the signals of a preferred input (31) connected to a preceding logic gate in the signal path with a signal of a secondary input (32) connected to an adjacent tree (12) path of a neighboring and/or preceding sub tree.
    Type: Grant
    Filed: February 8, 2006
    Date of Patent: February 26, 2008
    Assignee: International Business Machines Corporation
    Inventors: Sebastian Ehrenreich, Juergen Koehl, Juergen Pille