Abstract: Sets of coefficient polynomials are used to design embedded-component architectures that have capability for asynchronous parallel execution at an advantageous arithmetic level where algebraic merging is realized with other operations, algorithms or applications. Because of the particular hardware structures made possible by the use of CPA, higher computational granularities and complex modules are more easily feasible than by using conventional arithmetic and, additionally, increased efficiency is obtained for algorithmic computations involving single and multiple operations. This is achieved by the merging of operations and the integration of algorithms, and thereby avoiding the necessity of performing the entire basic arithmetic separately for each operation or algorithm.