Patents Represented by Attorney B. P. Barndt
  • Patent number: 5047826
    Abstract: An integrated circuit including a high value resistor (17d) is formed by using an amorphous silicon layer. The amorphous silicon layer may also be used to form the second plate (34) of a capacitor (17c) and a fuse (30). In the second embodiment of the invention, the amorphous silicon layer (92) is formed after the formation of the devices to avoid any additional high temperature cycles.
    Type: Grant
    Filed: June 30, 1989
    Date of Patent: September 10, 1991
    Assignee: Texas Instruments Incorporated
    Inventors: Stephen A. Keller, Rajiv R. Shah