Abstract: A high performance test head (18) communicates test signals between integrated circuit test pads and integrated circuit tester. Test head (18) comprises metal bumps (22) that electrically couple with test pads to communicate test signals between test pads and test circuitry. Planar foundation plate (30) provides structural support. Compliant material layer (26) associates with metal bumps (22) and compresses to assure positive contact between metal bumps (22) and test pads. Compliant material layer (26) is positioned between foundation plate (30) and metal bumps (22). Interconnection line (20) adjoins test head (18) to connect metal bumps (22) between test circuitry and integrated circuits. The present invention includes a method for high performance communication of test signals between test pads and test circuitry. The present invention further includes the method of applying semiconductor device fabrication techniques to produce a high performance test head (18).

Abstract: A read/write configuration (44) is provided for switching signals between a source (46) and either a single output (60) or a plurality of outputs (60) and (62). A control circuit (68) operates to control a signal switching circuit (64) and a power supply switching circuit (66) in response to a control signal input thereto. More particularly, in a reading mode, the switches within signal switching circuit (64) are opened while the switch within power supply switching circuit (66) is closed. Further, in a writing mode, the switches within signal switching circuit (64) are closed while the switch within power supply switching circuit (66) is opened.